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66f530ed | 1 | # FLASH layout file for ARM VE.\r |
2 | #\r | |
3 | # Copyright (c) 2011, ARM Limited. All rights reserved.\r | |
4 | # \r | |
5 | # This program and the accompanying materials \r | |
6 | # are licensed and made available under the terms and conditions of the BSD License \r | |
7 | # which accompanies this distribution. The full text of the license may be found at \r | |
8 | # http://opensource.org/licenses/bsd-license.php \r | |
9 | #\r | |
10 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
11 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
12 | #\r | |
13 | \r | |
14 | ################################################################################\r | |
15 | #\r | |
16 | # FD Section\r | |
17 | # The [FD] Section is made up of the definition statements and a\r | |
18 | # description of what goes into the Flash Device Image. Each FD section\r | |
19 | # defines one flash "device" image. A flash device image may be one of\r | |
20 | # the following: Removable media bootable image (like a boot floppy\r | |
21 | # image,) an Option ROM image (that would be "flashed" into an add-in\r | |
22 | # card,) a System "Flash" image (that would be burned into a system's\r | |
23 | # flash) or an Update ("Capsule") image that will be used to update and\r | |
24 | # existing system flash.\r | |
25 | #\r | |
26 | ################################################################################\r | |
27 | \r | |
28 | [FD.Sec_ArmVExpress_EFI]\r | |
29 | BaseAddress = 0x44000000|gArmTokenSpaceGuid.PcdSecureFdBaseAddress #The base address of the Secure FLASH Device.\r | |
30 | Size = 0x00080000|gArmTokenSpaceGuid.PcdSecureFdSize #The size in bytes of the Secure FLASH Device\r | |
31 | ErasePolarity = 1\r | |
32 | BlockSize = 0x00001000\r | |
33 | NumBlocks = 0x80\r | |
34 | \r | |
35 | ################################################################################\r | |
36 | #\r | |
37 | # Following are lists of FD Region layout which correspond to the locations of different\r | |
38 | # images within the flash device.\r | |
39 | #\r | |
40 | # Regions must be defined in ascending order and may not overlap.\r | |
41 | #\r | |
42 | # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r | |
43 | # the pipe "|" character, followed by the size of the region, also in hex with the leading\r | |
44 | # "0x" characters. Like:\r | |
45 | # Offset|Size\r | |
46 | # PcdOffsetCName|PcdSizeCName\r | |
47 | # RegionType <FV, DATA, or FILE>\r | |
48 | #\r | |
49 | ################################################################################\r | |
50 | \r | |
51 | 0x00000000|0x00080000\r | |
ce5ed6c8 | 52 | gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize\r |
66f530ed | 53 | FV = FVMAIN_SEC\r |
54 | \r | |
55 | \r | |
56 | [FD.ArmVExpress_EFI]\r | |
57 | !if $(EDK2_ARMVE_STANDALONE) == 1\r | |
58 | BaseAddress = 0x45000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.\r | |
59 | !else\r | |
60 | BaseAddress = 0x80000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in remapped DRAM.\r | |
61 | !endif\r | |
62 | Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device\r | |
63 | ErasePolarity = 1\r | |
64 | \r | |
65 | # This one is tricky, it must be: BlockSize * NumBlocks = Size\r | |
66 | BlockSize = 0x00001000\r | |
67 | NumBlocks = 0x200\r | |
68 | \r | |
69 | ################################################################################\r | |
70 | #\r | |
71 | # Following are lists of FD Region layout which correspond to the locations of different\r | |
72 | # images within the flash device.\r | |
73 | #\r | |
74 | # Regions must be defined in ascending order and may not overlap.\r | |
75 | #\r | |
76 | # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r | |
77 | # the pipe "|" character, followed by the size of the region, also in hex with the leading\r | |
78 | # "0x" characters. Like:\r | |
79 | # Offset|Size\r | |
80 | # PcdOffsetCName|PcdSizeCName\r | |
81 | # RegionType <FV, DATA, or FILE>\r | |
82 | #\r | |
83 | ################################################################################\r | |
84 | \r | |
85 | 0x00000000|0x00200000\r | |
ce5ed6c8 | 86 | gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize\r |
66f530ed | 87 | FV = FVMAIN_COMPACT\r |
88 | \r | |
89 | \r | |
90 | ################################################################################\r | |
91 | #\r | |
92 | # FV Section\r | |
93 | #\r | |
94 | # [FV] section is used to define what components or modules are placed within a flash\r | |
95 | # device file. This section also defines order the components and modules are positioned\r | |
96 | # within the image. The [FV] section consists of define statements, set statements and\r | |
97 | # module statements.\r | |
98 | #\r | |
99 | ################################################################################\r | |
100 | \r | |
101 | [FV.FVMAIN_SEC]\r | |
102 | FvAlignment = 8\r | |
103 | ERASE_POLARITY = 1\r | |
104 | MEMORY_MAPPED = TRUE\r | |
105 | STICKY_WRITE = TRUE\r | |
106 | LOCK_CAP = TRUE\r | |
107 | LOCK_STATUS = TRUE\r | |
108 | WRITE_DISABLED_CAP = TRUE\r | |
109 | WRITE_ENABLED_CAP = TRUE\r | |
110 | WRITE_STATUS = TRUE\r | |
111 | WRITE_LOCK_CAP = TRUE\r | |
112 | WRITE_LOCK_STATUS = TRUE\r | |
113 | READ_DISABLED_CAP = TRUE\r | |
114 | READ_ENABLED_CAP = TRUE\r | |
115 | READ_STATUS = TRUE\r | |
116 | READ_LOCK_CAP = TRUE\r | |
117 | READ_LOCK_STATUS = TRUE\r | |
118 | \r | |
119 | INF ArmPlatformPkg/Sec/Sec.inf\r | |
120 | \r | |
121 | \r | |
122 | [FV.FvMain]\r | |
123 | BlockSize = 0x40\r | |
124 | NumBlocks = 0 # This FV gets compressed so make it just big enough\r | |
125 | FvAlignment = 8 # FV alignment and FV attributes setting.\r | |
126 | ERASE_POLARITY = 1\r | |
127 | MEMORY_MAPPED = TRUE\r | |
128 | STICKY_WRITE = TRUE\r | |
129 | LOCK_CAP = TRUE\r | |
130 | LOCK_STATUS = TRUE\r | |
131 | WRITE_DISABLED_CAP = TRUE\r | |
132 | WRITE_ENABLED_CAP = TRUE\r | |
133 | WRITE_STATUS = TRUE\r | |
134 | WRITE_LOCK_CAP = TRUE\r | |
135 | WRITE_LOCK_STATUS = TRUE\r | |
136 | READ_DISABLED_CAP = TRUE\r | |
137 | READ_ENABLED_CAP = TRUE\r | |
138 | READ_STATUS = TRUE\r | |
139 | READ_LOCK_CAP = TRUE\r | |
140 | READ_LOCK_STATUS = TRUE\r | |
141 | \r | |
142 | INF MdeModulePkg/Core/Dxe/DxeMain.inf \r | |
143 | \r | |
144 | #\r | |
145 | # PI DXE Drivers producing Architectural Protocols (EFI Services) \r | |
146 | #\r | |
147 | INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf\r | |
148 | INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r | |
149 | INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r | |
150 | INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r | |
151 | INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf\r | |
152 | INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r | |
153 | INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r | |
154 | INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf\r | |
155 | INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf\r | |
156 | INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf\r | |
157 | \r | |
158 | #\r | |
159 | # Multiple Console IO support\r | |
160 | #\r | |
161 | INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r | |
162 | INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r | |
163 | INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r | |
164 | INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r | |
165 | INF EmbeddedPkg/SerialDxe/SerialDxe.inf\r | |
166 | \r | |
167 | INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r | |
168 | \r | |
017baa1c | 169 | INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf\r |
66f530ed | 170 | INF ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf\r |
171 | INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf\r | |
172 | INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf\r | |
173 | INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf\r | |
174 | \r | |
175 | #\r | |
176 | \r | |
177 | !if $(EDK2_ARMVE_STANDALONE) != 1\r | |
178 | #\r | |
179 | # Semi-hosting filesystem (Required the Hardware Debugger to be connected)\r | |
180 | #\r | |
181 | INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf\r | |
182 | !endif\r | |
183 | \r | |
184 | #\r | |
185 | # FAT filesystem + GPT/MBR partitioning\r | |
186 | #\r | |
187 | INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r | |
188 | INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r | |
e1772adf | 189 | INF FatBinPkg/EnhancedFatDxe/Fat.inf\r |
66f530ed | 190 | INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r |
191 | \r | |
192 | #\r | |
193 | # Multimedia Card Interface\r | |
194 | #\r | |
195 | INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf\r | |
196 | INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf\r | |
197 | \r | |
198 | #\r | |
199 | # UEFI application (Shell Embedded Boot Loader) \r | |
200 | # \r | |
e1772adf | 201 | INF ShellBinPkg/UefiShell/UefiShell.inf \r |
66f530ed | 202 | \r |
66f530ed | 203 | #\r |
204 | # Bds\r | |
205 | #\r | |
206 | INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r | |
207 | INF ArmPlatformPkg/Bds/Bds.inf\r | |
208 | \r | |
209 | \r | |
210 | [FV.FVMAIN_COMPACT]\r | |
211 | FvAlignment = 8\r | |
212 | ERASE_POLARITY = 1\r | |
213 | MEMORY_MAPPED = TRUE\r | |
214 | STICKY_WRITE = TRUE\r | |
215 | LOCK_CAP = TRUE\r | |
216 | LOCK_STATUS = TRUE\r | |
217 | WRITE_DISABLED_CAP = TRUE\r | |
218 | WRITE_ENABLED_CAP = TRUE\r | |
219 | WRITE_STATUS = TRUE\r | |
220 | WRITE_LOCK_CAP = TRUE\r | |
221 | WRITE_LOCK_STATUS = TRUE\r | |
222 | READ_DISABLED_CAP = TRUE\r | |
223 | READ_ENABLED_CAP = TRUE\r | |
224 | READ_STATUS = TRUE\r | |
225 | READ_LOCK_CAP = TRUE\r | |
226 | READ_LOCK_STATUS = TRUE\r | |
227 | \r | |
228 | !if $(EDK2_SKIP_PEICORE) == 1\r | |
229 | INF ArmPlatformPkg/PrePi/PeiMPCore.inf\r | |
230 | !else\r | |
231 | INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf\r | |
232 | INF MdeModulePkg/Core/Pei/PeiMain.inf\r | |
233 | INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf\r | |
234 | INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf\r | |
235 | INF ArmPkg/Drivers/CpuPei/CpuPei.inf\r | |
236 | INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r | |
237 | INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r | |
238 | INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r | |
239 | INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r | |
240 | !endif\r | |
241 | \r | |
242 | FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r | |
243 | SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r | |
244 | SECTION FV_IMAGE = FVMAIN\r | |
245 | }\r | |
246 | }\r | |
247 | \r | |
248 | \r | |
249 | ################################################################################\r | |
250 | #\r | |
251 | # Rules are use with the [FV] section's module INF type to define\r | |
252 | # how an FFS file is created for a given INF file. The following Rule are the default\r | |
253 | # rules for the different module type. User can add the customized rules to define the\r | |
254 | # content of the FFS file.\r | |
255 | #\r | |
256 | ################################################################################\r | |
257 | \r | |
258 | \r | |
259 | ############################################################################\r | |
260 | # Example of a DXE_DRIVER FFS file with a Checksum encapsulation section # \r | |
261 | ############################################################################\r | |
262 | #\r | |
263 | #[Rule.Common.DXE_DRIVER]\r | |
264 | # FILE DRIVER = $(NAMED_GUID) {\r | |
265 | # DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r | |
266 | # COMPRESS PI_STD {\r | |
267 | # GUIDED {\r | |
268 | # PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
269 | # UI STRING="$(MODULE_NAME)" Optional\r | |
270 | # VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r | |
271 | # }\r | |
272 | # }\r | |
273 | # }\r | |
274 | #\r | |
275 | ############################################################################\r | |
276 | \r | |
277 | [Rule.Common.SEC]\r | |
278 | FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r | |
279 | TE TE Align = 32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
280 | }\r | |
281 | \r | |
282 | [Rule.Common.PEI_CORE]\r | |
283 | FILE PEI_CORE = $(NAMED_GUID) {\r | |
284 | TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
285 | UI STRING ="$(MODULE_NAME)" Optional \r | |
286 | }\r | |
287 | \r | |
288 | [Rule.Common.PEIM]\r | |
289 | FILE PEIM = $(NAMED_GUID) {\r | |
290 | PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r | |
291 | TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
292 | UI STRING="$(MODULE_NAME)" Optional \r | |
293 | }\r | |
294 | \r | |
295 | [Rule.Common.PEIM.TIANOCOMPRESSED]\r | |
296 | FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {\r | |
297 | PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r | |
298 | GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r | |
299 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
300 | UI STRING="$(MODULE_NAME)" Optional\r | |
301 | }\r | |
302 | }\r | |
303 | \r | |
304 | [Rule.Common.DXE_CORE]\r | |
305 | FILE DXE_CORE = $(NAMED_GUID) {\r | |
306 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
307 | UI STRING="$(MODULE_NAME)" Optional\r | |
308 | }\r | |
309 | \r | |
310 | [Rule.Common.UEFI_DRIVER]\r | |
311 | FILE DRIVER = $(NAMED_GUID) {\r | |
312 | DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r | |
313 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
314 | UI STRING="$(MODULE_NAME)" Optional\r | |
315 | }\r | |
316 | \r | |
317 | [Rule.Common.DXE_DRIVER]\r | |
318 | FILE DRIVER = $(NAMED_GUID) {\r | |
319 | DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r | |
320 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
321 | UI STRING="$(MODULE_NAME)" Optional\r | |
322 | }\r | |
323 | \r | |
324 | [Rule.Common.DXE_RUNTIME_DRIVER]\r | |
325 | FILE DRIVER = $(NAMED_GUID) {\r | |
326 | DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r | |
327 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
328 | UI STRING="$(MODULE_NAME)" Optional\r | |
329 | }\r | |
330 | \r | |
331 | [Rule.Common.UEFI_APPLICATION]\r | |
332 | FILE APPLICATION = $(NAMED_GUID) {\r | |
333 | UI STRING ="$(MODULE_NAME)" Optional \r | |
334 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
335 | }\r | |
e1772adf | 336 | \r |
337 | [Rule.Common.UEFI_DRIVER.BINARY]\r | |
338 | FILE DRIVER = $(NAMED_GUID) {\r | |
339 | DXE_DEPEX DXE_DEPEX Optional |.depex\r | |
340 | PE32 PE32 |.efi\r | |
341 | UI STRING="$(MODULE_NAME)" Optional\r | |
342 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r | |
343 | }\r | |
344 | \r | |
345 | [Rule.Common.UEFI_APPLICATION.BINARY]\r | |
346 | FILE APPLICATION = $(NAMED_GUID) {\r | |
347 | PE32 PE32 |.efi\r | |
348 | UI STRING="$(MODULE_NAME)" Optional\r | |
349 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r | |
350 | }\r |