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75f63034 | 1 | #\r |
04f1a709 | 2 | # Copyright (c) 2011 - 2015, ARM Limited. All rights reserved.\r |
921e987b | 3 | # Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r |
75f63034 OM |
4 | #\r |
5 | # This program and the accompanying materials\r | |
6 | # are licensed and made available under the terms and conditions of the BSD License\r | |
7 | # which accompanies this distribution. The full text of the license may be found at\r | |
8 | # http://opensource.org/licenses/bsd-license.php\r | |
9 | #\r | |
10 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | #\r | |
13 | \r | |
14 | ################################################################################\r | |
15 | #\r | |
16 | # FD Section\r | |
17 | # The [FD] Section is made up of the definition statements and a\r | |
18 | # description of what goes into the Flash Device Image. Each FD section\r | |
19 | # defines one flash "device" image. A flash device image may be one of\r | |
20 | # the following: Removable media bootable image (like a boot floppy\r | |
21 | # image,) an Option ROM image (that would be "flashed" into an add-in\r | |
22 | # card,) a System "Flash" image (that would be burned into a system's\r | |
23 | # flash) or an Update ("Capsule") image that will be used to update and\r | |
24 | # existing system flash.\r | |
25 | #\r | |
26 | ################################################################################\r | |
27 | \r | |
28 | [FD.FVP_AARCH64_EFI_SEC]\r | |
29 | BaseAddress = 0x00000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in SecureROM.\r | |
30 | Size = 0x04000000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the device (64MiB).\r | |
31 | ErasePolarity = 1\r | |
32 | \r | |
33 | # This one is tricky, it must be: BlockSize * NumBlocks = Size\r | |
34 | BlockSize = 0x00001000\r | |
35 | NumBlocks = 0x4000\r | |
36 | \r | |
37 | ################################################################################\r | |
38 | #\r | |
39 | # Following are lists of FD Region layout which correspond to the locations of different\r | |
40 | # images within the flash device.\r | |
41 | #\r | |
42 | # Regions must be defined in ascending order and may not overlap.\r | |
43 | #\r | |
44 | # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r | |
45 | # the pipe "|" character, followed by the size of the region, also in hex with the leading\r | |
46 | # "0x" characters. Like:\r | |
47 | # Offset|Size\r | |
48 | # PcdOffsetCName|PcdSizeCName\r | |
49 | # RegionType <FV, DATA, or FILE>\r | |
50 | #\r | |
51 | ################################################################################\r | |
52 | \r | |
53 | 0x00000000|0x00080000\r | |
54 | gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize\r | |
55 | FV = FVMAIN_SEC\r | |
56 | \r | |
57 | [FD.FVP_AARCH64_EFI]\r | |
da5ae569 | 58 | !ifdef ARM_FVP_RUN_NORFLASH\r |
75f63034 | 59 | BaseAddress = 0x08000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in Flash0.\r |
da5ae569 OM |
60 | !else\r |
61 | BaseAddress = 0x88000000|gArmTokenSpaceGuid.PcdFdBaseAddress # UEFI in DRAM + 128MB.\r | |
62 | !endif\r | |
75f63034 OM |
63 | Size = 0x04000000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the device (64MiB).\r |
64 | ErasePolarity = 1\r | |
65 | \r | |
66 | # This one is tricky, it must be: BlockSize * NumBlocks = Size\r | |
67 | BlockSize = 0x00001000\r | |
68 | NumBlocks = 0x4000\r | |
69 | \r | |
70 | 0x00000000|0x00280000\r | |
71 | gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize\r | |
72 | FV = FVMAIN_COMPACT\r | |
73 | \r | |
74 | ################################################################################\r | |
75 | #\r | |
76 | # FV Section\r | |
77 | #\r | |
78 | # [FV] section is used to define what components or modules are placed within a flash\r | |
79 | # device file. This section also defines order the components and modules are positioned\r | |
80 | # within the image. The [FV] section consists of define statements, set statements and\r | |
81 | # module statements.\r | |
82 | #\r | |
83 | ################################################################################\r | |
84 | \r | |
85 | [FV.FVMAIN_SEC]\r | |
86 | FvBaseAddress = 0x0 # Secure ROM\r | |
87 | FvForceRebase = TRUE\r | |
88 | FvAlignment = 16\r | |
89 | ERASE_POLARITY = 1\r | |
90 | MEMORY_MAPPED = TRUE\r | |
91 | STICKY_WRITE = TRUE\r | |
92 | LOCK_CAP = TRUE\r | |
93 | LOCK_STATUS = TRUE\r | |
94 | WRITE_DISABLED_CAP = TRUE\r | |
95 | WRITE_ENABLED_CAP = TRUE\r | |
96 | WRITE_STATUS = TRUE\r | |
97 | WRITE_LOCK_CAP = TRUE\r | |
98 | WRITE_LOCK_STATUS = TRUE\r | |
99 | READ_DISABLED_CAP = TRUE\r | |
100 | READ_ENABLED_CAP = TRUE\r | |
101 | READ_STATUS = TRUE\r | |
102 | READ_LOCK_CAP = TRUE\r | |
103 | READ_LOCK_STATUS = TRUE\r | |
104 | \r | |
105 | INF ArmPlatformPkg/Sec/Sec.inf\r | |
106 | \r | |
107 | \r | |
108 | [FV.FvMain]\r | |
109 | BlockSize = 0x40\r | |
110 | NumBlocks = 0 # This FV gets compressed so make it just big enough\r | |
111 | FvAlignment = 16 # FV alignment and FV attributes setting.\r | |
112 | ERASE_POLARITY = 1\r | |
113 | MEMORY_MAPPED = TRUE\r | |
114 | STICKY_WRITE = TRUE\r | |
115 | LOCK_CAP = TRUE\r | |
116 | LOCK_STATUS = TRUE\r | |
117 | WRITE_DISABLED_CAP = TRUE\r | |
118 | WRITE_ENABLED_CAP = TRUE\r | |
119 | WRITE_STATUS = TRUE\r | |
120 | WRITE_LOCK_CAP = TRUE\r | |
121 | WRITE_LOCK_STATUS = TRUE\r | |
122 | READ_DISABLED_CAP = TRUE\r | |
123 | READ_ENABLED_CAP = TRUE\r | |
124 | READ_STATUS = TRUE\r | |
125 | READ_LOCK_CAP = TRUE\r | |
126 | READ_LOCK_STATUS = TRUE\r | |
e6c51eaf | 127 | FvNameGuid = 87940482-fc81-41c3-87e6-399cf85ac8a0\r |
75f63034 | 128 | \r |
04f1a709 RC |
129 | APRIORI DXE {\r |
130 | INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r | |
131 | }\r | |
132 | \r | |
75f63034 | 133 | INF MdeModulePkg/Core/Dxe/DxeMain.inf\r |
04f1a709 | 134 | INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r |
75f63034 OM |
135 | \r |
136 | #\r | |
137 | # PI DXE Drivers producing Architectural Protocols (EFI Services)\r | |
138 | #\r | |
139 | INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf\r | |
140 | INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r | |
141 | INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r | |
142 | INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r | |
465be78e AB |
143 | !if $(SECURE_BOOT_ENABLE) == TRUE\r |
144 | INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf\r | |
145 | !endif\r | |
75f63034 OM |
146 | INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf\r |
147 | INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r | |
148 | INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r | |
149 | INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf\r | |
150 | INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf\r | |
151 | INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf\r | |
152 | \r | |
153 | INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r | |
154 | \r | |
155 | #\r | |
156 | # Multiple Console IO support\r | |
157 | #\r | |
158 | INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r | |
159 | INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r | |
160 | INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r | |
161 | INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r | |
921e987b | 162 | INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf\r |
75f63034 OM |
163 | \r |
164 | INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf\r | |
165 | INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf\r | |
465be78e AB |
166 | !if $(SECURE_BOOT_ENABLE) == TRUE\r |
167 | INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashAuthenticatedDxe.inf\r | |
168 | !else\r | |
75f63034 | 169 | INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf\r |
465be78e | 170 | !endif\r |
75f63034 | 171 | INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf\r |
75f63034 OM |
172 | INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf\r |
173 | \r | |
174 | #\r | |
175 | # Semi-hosting filesystem\r | |
176 | #\r | |
177 | INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf\r | |
178 | \r | |
179 | #\r | |
180 | # FAT filesystem + GPT/MBR partitioning\r | |
181 | #\r | |
182 | INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r | |
183 | INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r | |
184 | INF FatBinPkg/EnhancedFatDxe/Fat.inf\r | |
185 | INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r | |
186 | \r | |
75f63034 OM |
187 | #\r |
188 | # Multimedia Card Interface\r | |
189 | #\r | |
190 | INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf\r | |
191 | INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf\r | |
75f63034 | 192 | \r |
e94784c6 OM |
193 | #\r |
194 | # Platform Driver\r | |
195 | #\r | |
a4ab7df4 | 196 | INF ArmPlatformPkg/ArmVExpressPkg/ArmVExpressDxe/ArmFvpDxe.inf\r |
e94784c6 | 197 | INF OvmfPkg/VirtioBlkDxe/VirtioBlk.inf\r |
974d6117 | 198 | \r |
75f63034 OM |
199 | #\r |
200 | # UEFI application (Shell Embedded Boot Loader)\r | |
201 | #\r | |
202 | INF ShellBinPkg/UefiShell/UefiShell.inf\r | |
203 | \r | |
204 | #\r | |
205 | # Bds\r | |
206 | #\r | |
207 | INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r | |
f46ac5fb | 208 | !if $(USE_ARM_BDS) == TRUE\r |
75f63034 | 209 | INF ArmPlatformPkg/Bds/Bds.inf\r |
f46ac5fb AB |
210 | !else\r |
211 | INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf\r | |
212 | INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf\r | |
213 | INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf\r | |
214 | \r | |
215 | #\r | |
216 | # TianoCore logo (splash screen)\r | |
217 | #\r | |
218 | FILE FREEFORM = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile) {\r | |
219 | SECTION RAW = MdeModulePkg/Logo/Logo.bmp\r | |
220 | }\r | |
221 | !endif\r | |
75f63034 | 222 | \r |
0ead5ec4 RC |
223 | # Legacy Linux Loader\r |
224 | INF ArmPkg/Application/LinuxLoader/LinuxLoader.inf\r | |
225 | \r | |
901b4516 OM |
226 | # FV Filesystem\r |
227 | INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf\r | |
f066ab4e OM |
228 | \r |
229 | #\r | |
230 | # FDT installation\r | |
231 | #\r | |
232 | # The UEFI driver is at the end of the list of the driver to be dispatched\r | |
233 | # after the device drivers (eg: Ethernet) to ensure we have support for them.\r | |
234 | INF EmbeddedPkg/Drivers/FdtPlatformDxe/FdtPlatformDxe.inf\r | |
75f63034 | 235 | \r |
0ee59fd7 AB |
236 | !ifdef $(DTB_DIR)\r |
237 | #\r | |
238 | # Embed flattened device tree (FDT) images for all known\r | |
239 | # variants of this platform\r | |
240 | #\r | |
241 | FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpBaseAEMv8x4GicV2) {\r | |
242 | $(DTB_DIR)/fvp-base-gicv2-psci.dtb\r | |
243 | }\r | |
244 | FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpBaseAEMv8x4GicV2Legacy) {\r | |
245 | $(DTB_DIR)/fvp-base-gicv2legacy-psci.dtb\r | |
246 | }\r | |
247 | FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpBaseAEMv8x4GicV3) {\r | |
248 | $(DTB_DIR)/fvp-base-gicv3-psci.dtb\r | |
249 | }\r | |
250 | FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpFoundationGicV2) {\r | |
251 | $(DTB_DIR)/fvp-foundation-gicv2-psci.dtb\r | |
252 | }\r | |
253 | FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpFoundationGicV2Legacy) {\r | |
254 | $(DTB_DIR)/fvp-foundation-gicv2legacy-psci.dtb\r | |
255 | }\r | |
256 | FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpFoundationGicV3) {\r | |
257 | $(DTB_DIR)/fvp-foundation-gicv3-psci.dtb\r | |
258 | }\r | |
259 | !endif\r | |
260 | \r | |
75f63034 OM |
261 | [FV.FVMAIN_COMPACT]\r |
262 | FvAlignment = 16\r | |
263 | ERASE_POLARITY = 1\r | |
264 | MEMORY_MAPPED = TRUE\r | |
265 | STICKY_WRITE = TRUE\r | |
266 | LOCK_CAP = TRUE\r | |
267 | LOCK_STATUS = TRUE\r | |
268 | WRITE_DISABLED_CAP = TRUE\r | |
269 | WRITE_ENABLED_CAP = TRUE\r | |
270 | WRITE_STATUS = TRUE\r | |
271 | WRITE_LOCK_CAP = TRUE\r | |
272 | WRITE_LOCK_STATUS = TRUE\r | |
273 | READ_DISABLED_CAP = TRUE\r | |
274 | READ_ENABLED_CAP = TRUE\r | |
275 | READ_STATUS = TRUE\r | |
276 | READ_LOCK_CAP = TRUE\r | |
277 | READ_LOCK_STATUS = TRUE\r | |
278 | \r | |
da5ae569 OM |
279 | !if $(EDK2_SKIP_PEICORE) == 1\r |
280 | INF ArmPlatformPkg/PrePi/PeiMPCore.inf\r | |
281 | !else\r | |
75f63034 OM |
282 | INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf\r |
283 | INF MdeModulePkg/Core/Pei/PeiMain.inf\r | |
284 | INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf\r | |
285 | INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf\r | |
286 | INF ArmPkg/Drivers/CpuPei/CpuPei.inf\r | |
287 | INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r | |
288 | INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r | |
289 | INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r | |
290 | INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r | |
da5ae569 | 291 | !endif\r |
75f63034 OM |
292 | \r |
293 | FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r | |
294 | SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r | |
295 | SECTION FV_IMAGE = FVMAIN\r | |
296 | }\r | |
297 | }\r | |
298 | \r | |
299 | \r | |
300 | ################################################################################\r | |
301 | #\r | |
302 | # Rules are use with the [FV] section's module INF type to define\r | |
303 | # how an FFS file is created for a given INF file. The following Rule are the default\r | |
304 | # rules for the different module type. User can add the customized rules to define the\r | |
305 | # content of the FFS file.\r | |
306 | #\r | |
307 | ################################################################################\r | |
308 | \r | |
309 | \r | |
310 | ############################################################################\r | |
311 | # Example of a DXE_DRIVER FFS file with a Checksum encapsulation section #\r | |
312 | ############################################################################\r | |
313 | #\r | |
314 | #[Rule.Common.DXE_DRIVER]\r | |
315 | # FILE DRIVER = $(NAMED_GUID) {\r | |
316 | # DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r | |
317 | # COMPRESS PI_STD {\r | |
318 | # GUIDED {\r | |
319 | # PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
320 | # UI STRING="$(MODULE_NAME)" Optional\r | |
321 | # VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r | |
322 | # }\r | |
323 | # }\r | |
324 | # }\r | |
325 | #\r | |
326 | ############################################################################\r | |
327 | \r | |
328 | [Rule.Common.SEC]\r | |
16d11eed AB |
329 | FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED FIXED {\r |
330 | TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
75f63034 OM |
331 | }\r |
332 | \r | |
333 | [Rule.Common.PEI_CORE]\r | |
16d11eed AB |
334 | FILE PEI_CORE = $(NAMED_GUID) FIXED {\r |
335 | TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
75f63034 OM |
336 | UI STRING ="$(MODULE_NAME)" Optional\r |
337 | }\r | |
338 | \r | |
339 | [Rule.Common.PEIM]\r | |
16d11eed | 340 | FILE PEIM = $(NAMED_GUID) FIXED {\r |
75f63034 | 341 | PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r |
16d11eed | 342 | TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r |
75f63034 OM |
343 | UI STRING="$(MODULE_NAME)" Optional\r |
344 | }\r | |
345 | \r | |
346 | [Rule.Common.PEIM.TIANOCOMPRESSED]\r | |
347 | FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {\r | |
348 | PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r | |
349 | GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r | |
350 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
351 | UI STRING="$(MODULE_NAME)" Optional\r | |
352 | }\r | |
353 | }\r | |
354 | \r | |
355 | [Rule.Common.DXE_CORE]\r | |
356 | FILE DXE_CORE = $(NAMED_GUID) {\r | |
357 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
358 | UI STRING="$(MODULE_NAME)" Optional\r | |
359 | }\r | |
360 | \r | |
361 | [Rule.Common.UEFI_DRIVER]\r | |
362 | FILE DRIVER = $(NAMED_GUID) {\r | |
363 | DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r | |
364 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
365 | UI STRING="$(MODULE_NAME)" Optional\r | |
366 | }\r | |
367 | \r | |
368 | [Rule.Common.DXE_DRIVER]\r | |
369 | FILE DRIVER = $(NAMED_GUID) {\r | |
370 | DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r | |
371 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
372 | UI STRING="$(MODULE_NAME)" Optional\r | |
373 | }\r | |
374 | \r | |
375 | [Rule.Common.DXE_RUNTIME_DRIVER]\r | |
376 | FILE DRIVER = $(NAMED_GUID) {\r | |
377 | DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r | |
378 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
379 | UI STRING="$(MODULE_NAME)" Optional\r | |
380 | }\r | |
381 | \r | |
382 | [Rule.Common.UEFI_APPLICATION]\r | |
383 | FILE APPLICATION = $(NAMED_GUID) {\r | |
384 | UI STRING ="$(MODULE_NAME)" Optional\r | |
385 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r | |
386 | }\r | |
387 | \r | |
388 | [Rule.Common.UEFI_DRIVER.BINARY]\r | |
389 | FILE DRIVER = $(NAMED_GUID) {\r | |
390 | DXE_DEPEX DXE_DEPEX Optional |.depex\r | |
391 | PE32 PE32 |.efi\r | |
392 | UI STRING="$(MODULE_NAME)" Optional\r | |
393 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r | |
394 | }\r | |
395 | \r | |
396 | [Rule.Common.UEFI_APPLICATION.BINARY]\r | |
397 | FILE APPLICATION = $(NAMED_GUID) {\r | |
398 | PE32 PE32 |.efi\r | |
399 | UI STRING="$(MODULE_NAME)" Optional\r | |
400 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r | |
401 | }\r |