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Commit | Line | Data |
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dbf61676 | 1 | Porting UEFI to a ARM platform :\r |
2 | --------------------------------\r | |
1d5d0ae9 | 3 | 1. Create the new platform directory under ArmPlatformPkg\r |
4 | \r | |
5 | 2. Create its DSC and FDF files into this new directory. These files can be copied from ArmVExpress-CTA9x4.dsc and ArmVExpress-CTA9x4.fdf; and adapted following the requirement of your platform. \r | |
6 | \r | |
7 | 3. Set up the PCDs required by ArmPlatformPkg in your FDF or DSC files \r | |
8 | \r | |
1d5d0ae9 | 9 | 4. Implement 'ArmPlatformLib' for your platform following the interface defined by ArmPlatformPkg\Include\Library\ArmPlatformLib.h.\r |
10 | \r | |
dbf61676 | 11 | \r |
12 | PCDs Description :\r | |
13 | -------------------\r | |
14 | \r | |
15 | # Firmware Device / Volume\r | |
16 | gArmTokenSpaceGuid.PcdSecureFdBaseAddress : Base address of your Secure Firmware Device \r | |
17 | gArmTokenSpaceGuid.PcdSecureFdSize : Size in byte of your Secure Firmware Device.\r | |
f92b93c9 | 18 | gArmTokenSpaceGuid.PcdFdBaseAddress : Base Address of your Non-Secure/Normal World Firmware Device.\r |
19 | gArmTokenSpaceGuid.PcdFdSize : Size in bytes of your Non-Secure/Normal World Firmware Device \r | |
dbf61676 | 20 | \r |
21 | # Stacks\r | |
2dbcb8f0 | 22 | gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase : Base of Secure Stack for Secure World\r |
23 | gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize : Size of the stack for the Primary Core in Secure World\r | |
24 | gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize : Size of the stack for the Secondary Cores in Secure World\r | |
25 | gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase : Base of Stack for Monitor World\r | |
26 | gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize : Size of the stack for each cores\r | |
27 | gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase : Base of SEC Stack for Normal World\r | |
28 | gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize : Size of the stack for the Primary Core\r | |
29 | gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize : Size of the stack for the Secondary Core\r | |
dbf61676 | 30 | \r |
31 | # CPU / Architectural controllers\r | |
32 | gArmTokenSpaceGuid.PcdGicDistributorBase : Base address of the Distributor of your General Interrupt Controller\r | |
33 | gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase : Base address of the Interface of your General Interrupt Controller\r | |
dbf61676 | 34 | \r |
35 | # Memory Regions\r | |
36 | gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize : Size of the region reserve for PI & UEFI\r | |
37 | gArmTokenSpaceGuid.PcdSystemMemoryBase : Base Address of the System Memory (DRAM)\r | |
38 | gArmTokenSpaceGuid.PcdSystemMemorySize : Size of the System Memory (DRAM)\r | |
39 | \r | |
40 | # Features\r | |
41 | gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec : TRUE if System Memory initialized by the SEC phase\r | |
42 | gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores : TRUE if the PrePi or PrePeiCore modules have to send an SGI to resume the excution of the secondary cores \r | |
43 | \r | |
44 | # Boot Manager\r | |
45 | gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription : Description of the Default Boot Entry\r | |
46 | gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath : DevicePath of the Default Boot Entry\r | |
47 | gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument : Argument for the Default Boot Entry\r | |
48 | gArmPlatformTokenSpaceGuid.PcdDefaultBootType : Define the binary type of the Default Boot Entry (0=EFI application, 1=Linux kernel with ATAG support, 2=Linux Kernel with FDT support) \r | |
49 | gArmPlatformTokenSpaceGuid.PcdFdtDevicePath : DevicePath of the Platform Device Tree\r | |
50 | gArmPlatformTokenSpaceGuid.PcdPlatformBootTimeOut : Timeout before booting on the Device Boot entry (by default the auto boot is skipped)\r | |
51 | gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths : List of Device Path use for the Console Input\r | |
52 | gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths : List of Device Path use for the Console Output\r | |
53 | \r | |
54 | \r | |
55 | FAQ :\r | |
56 | -----\r | |
57 | # When to use PrePi or PrePeiCore ?\r | |
58 | - PrePi: when the memory has already been initialized by the first stage boot loader\r | |
59 | Boot sequence: PlatformFirmware/PrePi/Dxe/Bds\r | |
60 | Example: Beagle Board\r | |
61 | \r | |
62 | - PrePeiCore: when the firmware is started from XIP memory and in Secure world. The PeiCore shadows the firmware itself in System Memory (DRAM)\r | |
63 | Boot sequence: Sec/PrePiCore/PeiCore/Dxe/Bds\r | |
64 | Example: ARM Versatile Express\r | |
65 | \r | |
e5bdb129 | 66 | See:\r |
67 | - ArmPlatformPkg/Documentation/ARM-EDK2-Overview.png\r | |
68 | - ArmPlatformPkg/Documentation/ArmPlatformLib-Full-Boot.png\r | |
69 | - ArmPlatformPkg/Documentation/ArmPlatformLib-2nd-Stage.png\r | |
70 | \r | |
dbf61676 | 71 | # What is the PcdStandalone\r |
72 | gArmPlatformTokenSpaceGuid.PcdStandalone=FALSE is used on ARM Development Platforms during the development stage.\r | |
73 | To avoid to reflash the NOR Flash after each build, the SEC (in NOR Flash) intializes thd DRAM and wait until the Normal World firmware is copied into the DRAM.\r | |
74 | Copying the firmware in DRAM is much faster than reflashing the NOR Flash. It is also more convenient to debug the firmware form DRAM than NOR Flash (eg: use of software breakpoint)\r | |
75 | \r |