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2 | How To Write Linux PCI Drivers |
3 | ||
4 | by Martin Mares <mj@ucw.cz> on 07-Feb-2000 | |
5 | updated by Grant Grundler <grundler@parisc-linux.org> on 23-Dec-2006 | |
1da177e4 LT |
6 | |
7 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
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8 | The world of PCI is vast and full of (mostly unpleasant) surprises. |
9 | Since each CPU architecture implements different chip-sets and PCI devices | |
10 | have different requirements (erm, "features"), the result is the PCI support | |
11 | in the Linux kernel is not as trivial as one would wish. This short paper | |
12 | tries to introduce all potential driver authors to Linux APIs for | |
13 | PCI device drivers. | |
14 | ||
15 | A more complete resource is the third edition of "Linux Device Drivers" | |
16 | by Jonathan Corbet, Alessandro Rubini, and Greg Kroah-Hartman. | |
17 | LDD3 is available for free (under Creative Commons License) from: | |
18 | ||
19 | http://lwn.net/Kernel/LDD3/ | |
20 | ||
21 | However, keep in mind that all documents are subject to "bit rot". | |
22 | Refer to the source code if things are not working as described here. | |
23 | ||
24 | Please send questions/comments/patches about Linux PCI API to the | |
25 | "Linux PCI" <linux-pci@atrey.karlin.mff.cuni.cz> mailing list. | |
26 | ||
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27 | |
28 | ||
29 | 0. Structure of PCI drivers | |
30 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
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31 | PCI drivers "discover" PCI devices in a system via pci_register_driver(). |
32 | Actually, it's the other way around. When the PCI generic code discovers | |
33 | a new device, the driver with a matching "description" will be notified. | |
34 | Details on this below. | |
35 | ||
36 | pci_register_driver() leaves most of the probing for devices to | |
37 | the PCI layer and supports online insertion/removal of devices [thus | |
38 | supporting hot-pluggable PCI, CardBus, and Express-Card in a single driver]. | |
39 | pci_register_driver() call requires passing in a table of function | |
40 | pointers and thus dictates the high level structure of a driver. | |
41 | ||
42 | Once the driver knows about a PCI device and takes ownership, the | |
43 | driver generally needs to perform the following initialization: | |
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44 | |
45 | Enable the device | |
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46 | Request MMIO/IOP resources |
47 | Set the DMA mask size (for both coherent and streaming DMA) | |
48 | Allocate and initialize shared control data (pci_allocate_coherent()) | |
49 | Access device configuration space (if needed) | |
50 | Register IRQ handler (request_irq()) | |
51 | Initialize non-PCI (i.e. LAN/SCSI/etc parts of the chip) | |
52 | Enable DMA/processing engines | |
53 | ||
54 | When done using the device, and perhaps the module needs to be unloaded, | |
55 | the driver needs to take the follow steps: | |
56 | Disable the device from generating IRQs | |
57 | Release the IRQ (free_irq()) | |
58 | Stop all DMA activity | |
59 | Release DMA buffers (both streaming and coherent) | |
60 | Unregister from other subsystems (e.g. scsi or netdev) | |
61 | Release MMIO/IOP resources | |
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62 | Disable the device |
63 | ||
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64 | Most of these topics are covered in the following sections. |
65 | For the rest look at LDD3 or <linux/pci.h> . | |
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66 | |
67 | If the PCI subsystem is not configured (CONFIG_PCI is not set), most of | |
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68 | the PCI functions described below are defined as inline functions either |
69 | completely empty or just returning an appropriate error codes to avoid | |
70 | lots of ifdefs in the drivers. | |
71 | ||
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72 | |
73 | ||
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74 | 1. pci_register_driver() call |
75 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
1da177e4 | 76 | |
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77 | PCI device drivers call pci_register_driver() during their |
78 | initialization with a pointer to a structure describing the driver | |
79 | (struct pci_driver): | |
80 | ||
81 | field name Description | |
82 | ---------- ------------------------------------------------------ | |
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83 | id_table Pointer to table of device ID's the driver is |
84 | interested in. Most drivers should export this | |
85 | table using MODULE_DEVICE_TABLE(pci,...). | |
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86 | |
87 | probe This probing function gets called (during execution | |
88 | of pci_register_driver() for already existing | |
89 | devices or later if a new device gets inserted) for | |
90 | all PCI devices which match the ID table and are not | |
91 | "owned" by the other drivers yet. This function gets | |
92 | passed a "struct pci_dev *" for each device whose | |
93 | entry in the ID table matches the device. The probe | |
94 | function returns zero when the driver chooses to | |
95 | take "ownership" of the device or an error code | |
96 | (negative number) otherwise. | |
97 | The probe function always gets called from process | |
98 | context, so it can sleep. | |
99 | ||
100 | remove The remove() function gets called whenever a device | |
101 | being handled by this driver is removed (either during | |
102 | deregistration of the driver or when it's manually | |
103 | pulled out of a hot-pluggable slot). | |
104 | The remove function always gets called from process | |
105 | context, so it can sleep. | |
106 | ||
1da177e4 | 107 | suspend Put device into low power state. |
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108 | suspend_late Put device into low power state. |
109 | ||
110 | resume_early Wake device from low power state. | |
1da177e4 | 111 | resume Wake device from low power state. |
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112 | |
113 | (Please see Documentation/power/pci.txt for descriptions | |
114 | of PCI Power Management and the related functions.) | |
115 | ||
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116 | shutdown Hook into reboot_notifier_list (kernel/sys.c). |
117 | Intended to stop any idling DMA operations. | |
118 | Useful for enabling wake-on-lan (NIC) or changing | |
119 | the power state of a device before reboot. | |
120 | e.g. drivers/net/e100.c. | |
121 | ||
4b5ff469 | 122 | err_handler See Documentation/PCI/pci-error-recovery.txt |
74da15eb | 123 | |
1da177e4 | 124 | |
74da15eb | 125 | The ID table is an array of struct pci_device_id entries ending with an |
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126 | all-zero entry. Definitions with static const are generally preferred. |
127 | Use of the deprecated macro DEFINE_PCI_DEVICE_TABLE should be avoided. | |
128 | ||
129 | Each entry consists of: | |
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130 | |
131 | vendor,device Vendor and device ID to match (or PCI_ANY_ID) | |
1da177e4 | 132 | |
1da177e4 | 133 | subvendor, Subsystem vendor and device ID to match (or PCI_ANY_ID) |
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134 | subdevice, |
135 | ||
136 | class Device class, subclass, and "interface" to match. | |
137 | See Appendix D of the PCI Local Bus Spec or | |
138 | include/linux/pci_ids.h for a full list of classes. | |
139 | Most drivers do not need to specify class/class_mask | |
140 | as vendor/device is normally sufficient. | |
141 | ||
142 | class_mask limit which sub-fields of the class field are compared. | |
143 | See drivers/scsi/sym53c8xx_2/ for example of usage. | |
144 | ||
1da177e4 | 145 | driver_data Data private to the driver. |
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146 | Most drivers don't need to use driver_data field. |
147 | Best practice is to use driver_data as an index | |
148 | into a static list of equivalent device types, | |
149 | instead of using it as a pointer. | |
1da177e4 | 150 | |
1da177e4 | 151 | |
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152 | Most drivers only need PCI_DEVICE() or PCI_DEVICE_CLASS() to set up |
153 | a pci_device_id table. | |
1da177e4 | 154 | |
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155 | New PCI IDs may be added to a device driver pci_ids table at runtime |
156 | as shown below: | |
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157 | |
158 | echo "vendor device subvendor subdevice class class_mask driver_data" > \ | |
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159 | /sys/bus/pci/drivers/{driver}/new_id |
160 | ||
161 | All fields are passed in as hexadecimal values (no leading 0x). | |
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162 | The vendor and device fields are mandatory, the others are optional. Users |
163 | need pass only as many optional fields as necessary: | |
164 | o subvendor and subdevice fields default to PCI_ANY_ID (FFFFFFFF) | |
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165 | o class and classmask fields default to 0 |
166 | o driver_data defaults to 0UL. | |
167 | ||
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168 | Note that driver_data must match the value used by any of the pci_device_id |
169 | entries defined in the driver. This makes the driver_data field mandatory | |
170 | if all the pci_device_id entries have a non-zero driver_data value. | |
171 | ||
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172 | Once added, the driver probe routine will be invoked for any unclaimed |
173 | PCI devices listed in its (newly updated) pci_ids list. | |
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174 | |
175 | When the driver exits, it just calls pci_unregister_driver() and the PCI layer | |
176 | automatically calls the remove hook for all devices handled by the driver. | |
177 | ||
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178 | |
179 | 1.1 "Attributes" for driver functions/data | |
180 | ||
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181 | Please mark the initialization and cleanup functions where appropriate |
182 | (the corresponding macros are defined in <linux/init.h>): | |
183 | ||
184 | __init Initialization code. Thrown away after the driver | |
185 | initializes. | |
186 | __exit Exit code. Ignored for non-modular drivers. | |
74da15eb | 187 | |
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188 | Tips on when/where to use the above attributes: |
189 | o The module_init()/module_exit() functions (and all | |
190 | initialization functions called _only_ from these) | |
191 | should be marked __init/__exit. | |
1da177e4 | 192 | |
74da15eb | 193 | o Do not mark the struct pci_driver. |
1da177e4 | 194 | |
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195 | o Do NOT mark a function if you are not sure which mark to use. |
196 | Better to not mark the function than mark the function wrong. | |
197 | ||
198 | ||
199 | ||
200 | 2. How to find PCI devices manually | |
201 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
202 | ||
203 | PCI drivers should have a really good reason for not using the | |
204 | pci_register_driver() interface to search for PCI devices. | |
205 | The main reason PCI devices are controlled by multiple drivers | |
206 | is because one PCI device implements several different HW services. | |
207 | E.g. combined serial/parallel port/floppy controller. | |
208 | ||
209 | A manual search may be performed using the following constructs: | |
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210 | |
211 | Searching by vendor and device ID: | |
212 | ||
213 | struct pci_dev *dev = NULL; | |
214 | while (dev = pci_get_device(VENDOR_ID, DEVICE_ID, dev)) | |
215 | configure_device(dev); | |
216 | ||
217 | Searching by class ID (iterate in a similar way): | |
218 | ||
219 | pci_get_class(CLASS_ID, dev) | |
220 | ||
221 | Searching by both vendor/device and subsystem vendor/device ID: | |
222 | ||
74da15eb | 223 | pci_get_subsys(VENDOR_ID,DEVICE_ID, SUBSYS_VENDOR_ID, SUBSYS_DEVICE_ID, dev). |
1da177e4 | 224 | |
74da15eb | 225 | You can use the constant PCI_ANY_ID as a wildcard replacement for |
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226 | VENDOR_ID or DEVICE_ID. This allows searching for any device from a |
227 | specific vendor, for example. | |
228 | ||
74da15eb | 229 | These functions are hotplug-safe. They increment the reference count on |
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230 | the pci_dev that they return. You must eventually (possibly at module unload) |
231 | decrement the reference count on these devices by calling pci_dev_put(). | |
232 | ||
233 | ||
1da177e4 | 234 | |
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235 | 3. Device Initialization Steps |
236 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
237 | ||
238 | As noted in the introduction, most PCI drivers need the following steps | |
239 | for device initialization: | |
1da177e4 | 240 | |
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241 | Enable the device |
242 | Request MMIO/IOP resources | |
243 | Set the DMA mask size (for both coherent and streaming DMA) | |
244 | Allocate and initialize shared control data (pci_allocate_coherent()) | |
245 | Access device configuration space (if needed) | |
246 | Register IRQ handler (request_irq()) | |
247 | Initialize non-PCI (i.e. LAN/SCSI/etc parts of the chip) | |
248 | Enable DMA/processing engines. | |
249 | ||
250 | The driver can access PCI config space registers at any time. | |
251 | (Well, almost. When running BIST, config space can go away...but | |
252 | that will just result in a PCI Bus Master Abort and config reads | |
253 | will return garbage). | |
254 | ||
255 | ||
256 | 3.1 Enable the PCI device | |
257 | ~~~~~~~~~~~~~~~~~~~~~~~~~ | |
258 | Before touching any device registers, the driver needs to enable | |
259 | the PCI device by calling pci_enable_device(). This will: | |
260 | o wake up the device if it was in suspended state, | |
261 | o allocate I/O and memory regions of the device (if BIOS did not), | |
262 | o allocate an IRQ (if BIOS did not). | |
263 | ||
264 | NOTE: pci_enable_device() can fail! Check the return value. | |
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265 | |
266 | [ OS BUG: we don't check resource allocations before enabling those | |
267 | resources. The sequence would make more sense if we called | |
268 | pci_request_resources() before calling pci_enable_device(). | |
269 | Currently, the device drivers can't detect the bug when when two | |
270 | devices have been allocated the same range. This is not a common | |
271 | problem and unlikely to get fixed soon. | |
272 | ||
273 | This has been discussed before but not changed as of 2.6.19: | |
274 | http://lkml.org/lkml/2006/3/2/194 | |
275 | ] | |
276 | ||
277 | pci_set_master() will enable DMA by setting the bus master bit | |
278 | in the PCI_COMMAND register. It also fixes the latency timer value if | |
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279 | it's set to something bogus by the BIOS. pci_clear_master() will |
280 | disable DMA by clearing the bus master bit. | |
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281 | |
282 | If the PCI device can use the PCI Memory-Write-Invalidate transaction, | |
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283 | call pci_set_mwi(). This enables the PCI_COMMAND bit for Mem-Wr-Inval |
284 | and also ensures that the cache line size register is set correctly. | |
74da15eb | 285 | Check the return value of pci_set_mwi() as not all architectures |
694625c0 RD |
286 | or chip-sets may support Memory-Write-Invalidate. Alternatively, |
287 | if Mem-Wr-Inval would be nice to have but is not required, call | |
288 | pci_try_set_mwi() to have the system do its best effort at enabling | |
289 | Mem-Wr-Inval. | |
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290 | |
291 | ||
292 | 3.2 Request MMIO/IOP resources | |
293 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
294 | Memory (MMIO), and I/O port addresses should NOT be read directly | |
295 | from the PCI device config space. Use the values in the pci_dev structure | |
296 | as the PCI "bus address" might have been remapped to a "host physical" | |
297 | address by the arch/chip-set specific kernel support. | |
1da177e4 | 298 | |
395cf969 | 299 | See Documentation/io-mapping.txt for how to access device registers |
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300 | or device memory. |
301 | ||
302 | The device driver needs to call pci_request_region() to verify | |
303 | no other device is already using the same address resource. | |
304 | Conversely, drivers should call pci_release_region() AFTER | |
1da177e4 | 305 | calling pci_disable_device(). |
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306 | The idea is to prevent two devices colliding on the same address range. |
307 | ||
308 | [ See OS BUG comment above. Currently (2.6.19), The driver can only | |
309 | determine MMIO and IO Port resource availability _after_ calling | |
310 | pci_enable_device(). ] | |
311 | ||
312 | Generic flavors of pci_request_region() are request_mem_region() | |
313 | (for MMIO ranges) and request_region() (for IO Port ranges). | |
314 | Use these for address resources that are not described by "normal" PCI | |
315 | BARs. | |
316 | ||
317 | Also see pci_request_selected_regions() below. | |
318 | ||
319 | ||
320 | 3.3 Set the DMA mask size | |
321 | ~~~~~~~~~~~~~~~~~~~~~~~~~ | |
322 | [ If anything below doesn't make sense, please refer to | |
323 | Documentation/DMA-API.txt. This section is just a reminder that | |
324 | drivers need to indicate DMA capabilities of the device and is not | |
325 | an authoritative source for DMA interfaces. ] | |
326 | ||
327 | While all drivers should explicitly indicate the DMA capability | |
328 | (e.g. 32 or 64 bit) of the PCI bus master, devices with more than | |
329 | 32-bit bus master capability for streaming data need the driver | |
330 | to "register" this capability by calling pci_set_dma_mask() with | |
331 | appropriate parameters. In general this allows more efficient DMA | |
332 | on systems where System RAM exists above 4G _physical_ address. | |
333 | ||
334 | Drivers for all PCI-X and PCIe compliant devices must call | |
335 | pci_set_dma_mask() as they are 64-bit DMA devices. | |
336 | ||
337 | Similarly, drivers must also "register" this capability if the device | |
338 | can directly address "consistent memory" in System RAM above 4G physical | |
339 | address by calling pci_set_consistent_dma_mask(). | |
340 | Again, this includes drivers for all PCI-X and PCIe compliant devices. | |
341 | Many 64-bit "PCI" devices (before PCI-X) and some PCI-X devices are | |
342 | 64-bit DMA capable for payload ("streaming") data but not control | |
343 | ("consistent") data. | |
344 | ||
345 | ||
346 | 3.4 Setup shared control data | |
347 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
348 | Once the DMA masks are set, the driver can allocate "consistent" (a.k.a. shared) | |
349 | memory. See Documentation/DMA-API.txt for a full description of | |
350 | the DMA APIs. This section is just a reminder that it needs to be done | |
351 | before enabling DMA on the device. | |
352 | ||
353 | ||
354 | 3.5 Initialize device registers | |
355 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
356 | Some drivers will need specific "capability" fields programmed | |
357 | or other "vendor specific" register initialized or reset. | |
358 | E.g. clearing pending interrupts. | |
359 | ||
360 | ||
361 | 3.6 Register IRQ handler | |
362 | ~~~~~~~~~~~~~~~~~~~~~~~~ | |
59c51591 | 363 | While calling request_irq() is the last step described here, |
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364 | this is often just another intermediate step to initialize a device. |
365 | This step can often be deferred until the device is opened for use. | |
366 | ||
367 | All interrupt handlers for IRQ lines should be registered with IRQF_SHARED | |
368 | and use the devid to map IRQs to devices (remember that all PCI IRQ lines | |
369 | can be shared). | |
370 | ||
371 | request_irq() will associate an interrupt handler and device handle | |
372 | with an interrupt number. Historically interrupt numbers represent | |
373 | IRQ lines which run from the PCI device to the Interrupt controller. | |
374 | With MSI and MSI-X (more below) the interrupt number is a CPU "vector". | |
375 | ||
376 | request_irq() also enables the interrupt. Make sure the device is | |
377 | quiesced and does not have any interrupts pending before registering | |
378 | the interrupt handler. | |
379 | ||
380 | MSI and MSI-X are PCI capabilities. Both are "Message Signaled Interrupts" | |
381 | which deliver interrupts to the CPU via a DMA write to a Local APIC. | |
382 | The fundamental difference between MSI and MSI-X is how multiple | |
383 | "vectors" get allocated. MSI requires contiguous blocks of vectors | |
384 | while MSI-X can allocate several individual ones. | |
385 | ||
386 | MSI capability can be enabled by calling pci_enable_msi() or | |
387 | pci_enable_msix() before calling request_irq(). This causes | |
388 | the PCI support to program CPU vector data into the PCI device | |
389 | capability registers. | |
390 | ||
391 | If your PCI device supports both, try to enable MSI-X first. | |
392 | Only one can be enabled at a time. Many architectures, chip-sets, | |
393 | or BIOSes do NOT support MSI or MSI-X and the call to pci_enable_msi/msix | |
394 | will fail. This is important to note since many drivers have | |
395 | two (or more) interrupt handlers: one for MSI/MSI-X and another for IRQs. | |
396 | They choose which handler to register with request_irq() based on the | |
397 | return value from pci_enable_msi/msix(). | |
398 | ||
399 | There are (at least) two really good reasons for using MSI: | |
400 | 1) MSI is an exclusive interrupt vector by definition. | |
401 | This means the interrupt handler doesn't have to verify | |
402 | its device caused the interrupt. | |
403 | ||
404 | 2) MSI avoids DMA/IRQ race conditions. DMA to host memory is guaranteed | |
405 | to be visible to the host CPU(s) when the MSI is delivered. This | |
406 | is important for both data coherency and avoiding stale control data. | |
407 | This guarantee allows the driver to omit MMIO reads to flush | |
408 | the DMA stream. | |
409 | ||
410 | See drivers/infiniband/hw/mthca/ or drivers/net/tg3.c for examples | |
411 | of MSI/MSI-X usage. | |
412 | ||
413 | ||
414 | ||
415 | 4. PCI device shutdown | |
416 | ~~~~~~~~~~~~~~~~~~~~~~~ | |
417 | ||
418 | When a PCI device driver is being unloaded, most of the following | |
419 | steps need to be performed: | |
420 | ||
421 | Disable the device from generating IRQs | |
422 | Release the IRQ (free_irq()) | |
423 | Stop all DMA activity | |
424 | Release DMA buffers (both streaming and consistent) | |
425 | Unregister from other subsystems (e.g. scsi or netdev) | |
426 | Disable device from responding to MMIO/IO Port addresses | |
427 | Release MMIO/IO Port resource(s) | |
428 | ||
429 | ||
430 | 4.1 Stop IRQs on the device | |
431 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
432 | How to do this is chip/device specific. If it's not done, it opens | |
433 | the possibility of a "screaming interrupt" if (and only if) | |
434 | the IRQ is shared with another device. | |
435 | ||
436 | When the shared IRQ handler is "unhooked", the remaining devices | |
437 | using the same IRQ line will still need the IRQ enabled. Thus if the | |
438 | "unhooked" device asserts IRQ line, the system will respond assuming | |
439 | it was one of the remaining devices asserted the IRQ line. Since none | |
440 | of the other devices will handle the IRQ, the system will "hang" until | |
441 | it decides the IRQ isn't going to get handled and masks the IRQ (100,000 | |
442 | iterations later). Once the shared IRQ is masked, the remaining devices | |
443 | will stop functioning properly. Not a nice situation. | |
444 | ||
445 | This is another reason to use MSI or MSI-X if it's available. | |
446 | MSI and MSI-X are defined to be exclusive interrupts and thus | |
447 | are not susceptible to the "screaming interrupt" problem. | |
448 | ||
449 | ||
450 | 4.2 Release the IRQ | |
451 | ~~~~~~~~~~~~~~~~~~~ | |
452 | Once the device is quiesced (no more IRQs), one can call free_irq(). | |
453 | This function will return control once any pending IRQs are handled, | |
454 | "unhook" the drivers IRQ handler from that IRQ, and finally release | |
455 | the IRQ if no one else is using it. | |
456 | ||
457 | ||
458 | 4.3 Stop all DMA activity | |
459 | ~~~~~~~~~~~~~~~~~~~~~~~~~ | |
460 | It's extremely important to stop all DMA operations BEFORE attempting | |
461 | to deallocate DMA control data. Failure to do so can result in memory | |
462 | corruption, hangs, and on some chip-sets a hard crash. | |
1da177e4 | 463 | |
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464 | Stopping DMA after stopping the IRQs can avoid races where the |
465 | IRQ handler might restart DMA engines. | |
466 | ||
467 | While this step sounds obvious and trivial, several "mature" drivers | |
468 | didn't get this step right in the past. | |
469 | ||
470 | ||
471 | 4.4 Release DMA buffers | |
472 | ~~~~~~~~~~~~~~~~~~~~~~~ | |
473 | Once DMA is stopped, clean up streaming DMA first. | |
474 | I.e. unmap data buffers and return buffers to "upstream" | |
475 | owners if there is one. | |
476 | ||
477 | Then clean up "consistent" buffers which contain the control data. | |
478 | ||
479 | See Documentation/DMA-API.txt for details on unmapping interfaces. | |
480 | ||
481 | ||
482 | 4.5 Unregister from other subsystems | |
483 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
484 | Most low level PCI device drivers support some other subsystem | |
485 | like USB, ALSA, SCSI, NetDev, Infiniband, etc. Make sure your | |
486 | driver isn't losing resources from that other subsystem. | |
487 | If this happens, typically the symptom is an Oops (panic) when | |
488 | the subsystem attempts to call into a driver that has been unloaded. | |
489 | ||
490 | ||
491 | 4.6 Disable Device from responding to MMIO/IO Port addresses | |
492 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
493 | io_unmap() MMIO or IO Port resources and then call pci_disable_device(). | |
494 | This is the symmetric opposite of pci_enable_device(). | |
495 | Do not access device registers after calling pci_disable_device(). | |
496 | ||
497 | ||
498 | 4.7 Release MMIO/IO Port Resource(s) | |
499 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
500 | Call pci_release_region() to mark the MMIO or IO Port range as available. | |
501 | Failure to do so usually results in the inability to reload the driver. | |
502 | ||
503 | ||
504 | ||
505 | 5. How to access PCI config space | |
1da177e4 | 506 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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507 | |
508 | You can use pci_(read|write)_config_(byte|word|dword) to access the config | |
1da177e4 LT |
509 | space of a device represented by struct pci_dev *. All these functions return 0 |
510 | when successful or an error code (PCIBIOS_...) which can be translated to a text | |
511 | string by pcibios_strerror. Most drivers expect that accesses to valid PCI | |
512 | devices don't fail. | |
513 | ||
74da15eb | 514 | If you don't have a struct pci_dev available, you can call |
1da177e4 LT |
515 | pci_bus_(read|write)_config_(byte|word|dword) to access a given device |
516 | and function on that bus. | |
517 | ||
74da15eb | 518 | If you access fields in the standard portion of the config header, please |
1da177e4 LT |
519 | use symbolic names of locations and bits declared in <linux/pci.h>. |
520 | ||
74da15eb | 521 | If you need to access Extended PCI Capability registers, just call |
1da177e4 LT |
522 | pci_find_capability() for the particular capability and it will find the |
523 | corresponding register block for you. | |
524 | ||
525 | ||
1da177e4 LT |
526 | |
527 | 6. Other interesting functions | |
528 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
74da15eb | 529 | |
a37bee79 YW |
530 | pci_get_domain_bus_and_slot() Find pci_dev corresponding to given domain, |
531 | bus and slot and number. If the device is | |
532 | found, its reference count is increased. | |
1da177e4 LT |
533 | pci_set_power_state() Set PCI Power Management state (0=D0 ... 3=D3) |
534 | pci_find_capability() Find specified capability in device's capability | |
535 | list. | |
1da177e4 LT |
536 | pci_resource_start() Returns bus start address for a given PCI region |
537 | pci_resource_end() Returns bus end address for a given PCI region | |
538 | pci_resource_len() Returns the byte length of a PCI region | |
539 | pci_set_drvdata() Set private driver data pointer for a pci_dev | |
540 | pci_get_drvdata() Return private driver data pointer for a pci_dev | |
541 | pci_set_mwi() Enable Memory-Write-Invalidate transactions. | |
542 | pci_clear_mwi() Disable Memory-Write-Invalidate transactions. | |
543 | ||
544 | ||
74da15eb | 545 | |
1da177e4 LT |
546 | 7. Miscellaneous hints |
547 | ~~~~~~~~~~~~~~~~~~~~~~ | |
74da15eb GG |
548 | |
549 | When displaying PCI device names to the user (for example when a driver wants | |
550 | to tell the user what card has it found), please use pci_name(pci_dev). | |
1da177e4 LT |
551 | |
552 | Always refer to the PCI devices by a pointer to the pci_dev structure. | |
553 | All PCI layer functions use this identification and it's the only | |
554 | reasonable one. Don't use bus/slot/function numbers except for very | |
555 | special purposes -- on systems with multiple primary buses their semantics | |
556 | can be pretty complex. | |
557 | ||
1da177e4 LT |
558 | Don't try to turn on Fast Back to Back writes in your driver. All devices |
559 | on the bus need to be capable of doing it, so this is something which needs | |
560 | to be handled by platform and generic code, not individual drivers. | |
561 | ||
562 | ||
74da15eb | 563 | |
9b860b8c IO |
564 | 8. Vendor and device identifications |
565 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
9b860b8c | 566 | |
37a9c502 MT |
567 | Do not add new device or vendor IDs to include/linux/pci_ids.h unless they |
568 | are shared across multiple drivers. You can add private definitions in | |
569 | your driver if they're helpful, or just use plain hex constants. | |
74da15eb | 570 | |
37a9c502 MT |
571 | The device IDs are arbitrary hex numbers (vendor controlled) and normally used |
572 | only in a single location, the pci_device_id table. | |
74da15eb | 573 | |
37a9c502 | 574 | Please DO submit new vendor/device IDs to http://pciids.sourceforge.net/. |
74da15eb | 575 | |
9b860b8c | 576 | |
9b860b8c IO |
577 | |
578 | 9. Obsolete functions | |
1da177e4 | 579 | ~~~~~~~~~~~~~~~~~~~~~ |
74da15eb | 580 | |
1da177e4 LT |
581 | There are several functions which you might come across when trying to |
582 | port an old driver to the new PCI interface. They are no longer present | |
583 | in the kernel as they aren't compatible with hotplug or PCI domains or | |
584 | having sane locking. | |
585 | ||
74da15eb GG |
586 | pci_find_device() Superseded by pci_get_device() |
587 | pci_find_subsys() Superseded by pci_get_subsys() | |
a37bee79 YW |
588 | pci_find_slot() Superseded by pci_get_domain_bus_and_slot() |
589 | pci_get_slot() Superseded by pci_get_domain_bus_and_slot() | |
74da15eb GG |
590 | |
591 | ||
592 | The alternative is the traditional PCI device driver that walks PCI | |
593 | device lists. This is still possible but discouraged. | |
594 | ||
595 | ||
596 | ||
d48b5d3a | 597 | 10. MMIO Space and "Write Posting" |
74da15eb GG |
598 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
599 | ||
600 | Converting a driver from using I/O Port space to using MMIO space | |
601 | often requires some additional changes. Specifically, "write posting" | |
602 | needs to be handled. Many drivers (e.g. tg3, acenic, sym53c8xx_2) | |
603 | already do this. I/O Port space guarantees write transactions reach the PCI | |
604 | device before the CPU can continue. Writes to MMIO space allow the CPU | |
605 | to continue before the transaction reaches the PCI device. HW weenies | |
606 | call this "Write Posting" because the write completion is "posted" to | |
607 | the CPU before the transaction has reached its destination. | |
608 | ||
609 | Thus, timing sensitive code should add readl() where the CPU is | |
610 | expected to wait before doing other work. The classic "bit banging" | |
611 | sequence works fine for I/O Port space: | |
612 | ||
613 | for (i = 8; --i; val >>= 1) { | |
614 | outb(val & 1, ioport_reg); /* write bit */ | |
615 | udelay(10); | |
616 | } | |
617 | ||
618 | The same sequence for MMIO space should be: | |
619 | ||
620 | for (i = 8; --i; val >>= 1) { | |
621 | writeb(val & 1, mmio_reg); /* write bit */ | |
622 | readb(safe_mmio_reg); /* flush posted write */ | |
623 | udelay(10); | |
624 | } | |
625 | ||
626 | It is important that "safe_mmio_reg" not have any side effects that | |
627 | interferes with the correct operation of the device. | |
628 | ||
629 | Another case to watch out for is when resetting a PCI device. Use PCI | |
630 | Configuration space reads to flush the writel(). This will gracefully | |
631 | handle the PCI master abort on all platforms if the PCI device is | |
632 | expected to not respond to a readl(). Most x86 platforms will allow | |
633 | MMIO reads to master abort (a.k.a. "Soft Fail") and return garbage | |
634 | (e.g. ~0). But many RISC platforms will crash (a.k.a."Hard Fail"). | |
635 |