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Commit | Line | Data |
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1478cebf LW |
1 | ARM System Controller ICST clocks |
2 | ||
3 | The ICS525 and ICS307 oscillators are produced by Integrated Devices | |
4 | Technology (IDT). ARM integrated these oscillators deeply into their | |
5 | reference designs by adding special control registers that manage such | |
6 | oscillators to their system controllers. | |
7 | ||
50581cc4 | 8 | The various ARM system controllers contain logic to serialize and initialize |
1478cebf LW |
9 | an ICST clock request after a write to the 32 bit register at an offset |
10 | into the system controller. Furthermore, to even be able to alter one of | |
11 | these frequencies, the system controller must first be unlocked by | |
12 | writing a special token to another offset in the system controller. | |
13 | ||
50581cc4 LW |
14 | Some ARM hardware contain special versions of the serial interface that only |
15 | connects the low 8 bits of the VDW (missing one bit), hardwires RDW to | |
16 | different values and sometimes also hardwire the output divider. They | |
17 | therefore have special compatible strings as per this table (the OD value is | |
18 | the value on the pins, not the resulting output divider): | |
19 | ||
20 | Hardware variant: RDW OD VDW | |
21 | ||
22 | Integrator/AP 22 1 Bit 8 0, rest variable | |
23 | integratorap-cm | |
24 | ||
25 | Integrator/AP 46 3 Bit 8 0, rest variable | |
26 | integratorap-sys | |
27 | ||
28 | Integrator/AP 22 or 1 17 or (33 or 25 MHz) | |
29 | integratorap-pci 14 1 14 | |
30 | ||
31 | Integrator/CP 22 variable Bit 8 0, rest variable | |
32 | integratorcp-cm-core | |
33 | ||
34 | Integrator/CP 22 variable Bit 8 0, rest variable | |
35 | integratorcp-cm-mem | |
36 | ||
1478cebf LW |
37 | The ICST oscillator must be provided inside a system controller node. |
38 | ||
39 | Required properties: | |
50581cc4 LW |
40 | - compatible: must be one of |
41 | "arm,syscon-icst525" | |
42 | "arm,syscon-icst307" | |
43 | "arm,syscon-icst525-integratorap-cm" | |
44 | "arm,syscon-icst525-integratorap-sys" | |
45 | "arm,syscon-icst525-integratorap-pci" | |
46 | "arm,syscon-icst525-integratorcp-cm-core" | |
47 | "arm,syscon-icst525-integratorcp-cm-mem" | |
1478cebf LW |
48 | - lock-offset: the offset address into the system controller where the |
49 | unlocking register is located | |
50 | - vco-offset: the offset address into the system controller where the | |
51 | ICST control register is located (even 32 bit address) | |
1478cebf LW |
52 | - #clock-cells: must be <0> |
53 | - clocks: parent clock, since the ICST needs a parent clock to derive its | |
54 | frequency from, this attribute is compulsory. | |
55 | ||
56 | Example: | |
57 | ||
58 | syscon: syscon@10000000 { | |
59 | compatible = "syscon"; | |
60 | reg = <0x10000000 0x1000>; | |
61 | ||
62 | oscclk0: osc0@0c { | |
63 | compatible = "arm,syscon-icst307"; | |
64 | #clock-cells = <0>; | |
65 | lock-offset = <0x20>; | |
66 | vco-offset = <0x0c>; | |
67 | clocks = <&xtal24mhz>; | |
68 | }; | |
69 | (...) | |
70 | }; |