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Commit | Line | Data |
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06dda9d7 TF |
1 | * Samsung S3C64xx Clock Controller |
2 | ||
3 | The S3C64xx clock controller generates and supplies clock to various controllers | |
4 | within the SoC. The clock binding described here is applicable to all SoCs in | |
5 | the S3C64xx family. | |
6 | ||
7 | Required Properties: | |
8 | ||
9 | - compatible: should be one of the following. | |
10 | - "samsung,s3c6400-clock" - controller compatible with S3C6400 SoC. | |
11 | - "samsung,s3c6410-clock" - controller compatible with S3C6410 SoC. | |
12 | ||
13 | - reg: physical base address of the controller and length of memory mapped | |
14 | region. | |
15 | ||
16 | - #clock-cells: should be 1. | |
17 | ||
18 | Each clock is assigned an identifier and client nodes can use this identifier | |
19 | to specify the clock which they consume. Some of the clocks are available only | |
20 | on a particular S3C64xx SoC and this is specified where applicable. | |
21 | ||
22 | All available clocks are defined as preprocessor macros in | |
23 | dt-bindings/clock/samsung,s3c64xx-clock.h header and can be used in device | |
24 | tree sources. | |
25 | ||
26 | External clocks: | |
27 | ||
28 | There are several clocks that are generated outside the SoC. It is expected | |
29 | that they are defined using standard clock bindings with following | |
30 | clock-output-names: | |
31 | - "fin_pll" - PLL input clock (xtal/extclk) - required, | |
32 | - "xusbxti" - USB xtal - required, | |
33 | - "iiscdclk0" - I2S0 codec clock - optional, | |
34 | - "iiscdclk1" - I2S1 codec clock - optional, | |
35 | - "iiscdclk2" - I2S2 codec clock - optional, | |
36 | - "pcmcdclk0" - PCM0 codec clock - optional, | |
37 | - "pcmcdclk1" - PCM1 codec clock - optional, only S3C6410. | |
38 | ||
39 | Example: Clock controller node: | |
40 | ||
41 | clock: clock-controller@7e00f000 { | |
42 | compatible = "samsung,s3c6410-clock"; | |
43 | reg = <0x7e00f000 0x1000>; | |
44 | #clock-cells = <1>; | |
45 | }; | |
46 | ||
47 | Example: Required external clocks: | |
48 | ||
49 | fin_pll: clock-fin-pll { | |
50 | compatible = "fixed-clock"; | |
51 | clock-output-names = "fin_pll"; | |
52 | clock-frequency = <12000000>; | |
53 | #clock-cells = <0>; | |
54 | }; | |
55 | ||
56 | xusbxti: clock-xusbxti { | |
57 | compatible = "fixed-clock"; | |
58 | clock-output-names = "xusbxti"; | |
59 | clock-frequency = <48000000>; | |
60 | #clock-cells = <0>; | |
61 | }; | |
62 | ||
63 | Example: UART controller node that consumes the clock generated by the clock | |
64 | controller (refer to the standard clock bindings for information about | |
65 | "clocks" and "clock-names" properties): | |
66 | ||
67 | uart0: serial@7f005000 { | |
68 | compatible = "samsung,s3c6400-uart"; | |
69 | reg = <0x7f005000 0x100>; | |
70 | interrupt-parent = <&vic1>; | |
71 | interrupts = <5>; | |
72 | clock-names = "uart", "clk_uart_baud2", | |
73 | "clk_uart_baud3"; | |
74 | clocks = <&clock PCLK_UART0>, <&clocks PCLK_UART0>, | |
75 | <&clock SCLK_UART>; | |
76 | status = "disabled"; | |
77 | }; |