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ccec4c39 | 1 | #------------------------------------------------------------------------------\r |
2 | #*\r | |
e7c4ef5e | 3 | #* Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>\r |
b1f700a8 | 4 | #* This program and the accompanying materials \r |
ccec4c39 | 5 | #* are licensed and made available under the terms and conditions of the BSD License \r |
6 | #* which accompanies this distribution. The full text of the license may be found at \r | |
7 | #* http://opensource.org/licenses/bsd-license.php \r | |
8 | #* \r | |
9 | #* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
10 | #* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
11 | #* \r | |
12 | #* start32.asm\r | |
13 | #* \r | |
14 | #* Abstract:\r | |
15 | #*\r | |
16 | #------------------------------------------------------------------------------\r | |
17 | \r | |
18 | #.MODEL small\r | |
19 | .stack: \r | |
20 | .486p: \r | |
697ecfd3 | 21 | .code16\r |
ccec4c39 | 22 | \r |
23 | .equ FAT_DIRECTORY_ENTRY_SIZE, 0x020\r | |
24 | .equ FAT_DIRECTORY_ENTRY_SHIFT, 5\r | |
25 | .equ BLOCK_SIZE, 0x0200\r | |
26 | .equ BLOCK_MASK, 0x01ff\r | |
27 | .equ BLOCK_SHIFT, 9\r | |
28 | \r | |
f3eb2131 | 29 | .org 0x0\r |
30 | \r | |
31 | .global _start\r | |
32 | _start:\r | |
ae3d1e91 | 33 | \r |
ccec4c39 | 34 | Ia32Jump: \r |
35 | jmp BootSectorEntryPoint # JMP inst - 3 bytes\r | |
36 | nop\r | |
37 | \r | |
38 | OemId: .ascii "INTEL " # OemId - 8 bytes\r | |
39 | SectorSize: .word 0 # Sector Size - 2 bytes\r | |
40 | SectorsPerCluster: .byte 0 # Sector Per Cluster - 1 byte\r | |
41 | ReservedSectors: .word 0 # Reserved Sectors - 2 bytes\r | |
42 | NoFats: .byte 0 # Number of FATs - 1 byte\r | |
43 | RootEntries: .word 0 # Root Entries - 2 bytes\r | |
44 | Sectors: .word 0 # Number of Sectors - 2 bytes\r | |
45 | Media: .byte 0 # Media - 1 byte\r | |
46 | SectorsPerFat16: .word 0 # Sectors Per FAT for FAT12/FAT16 - 2 byte\r | |
47 | SectorsPerTrack: .word 0 # Sectors Per Track - 2 bytes\r | |
48 | Heads: .word 0 # Heads - 2 bytes\r | |
49 | HiddenSectors: .long 0 # Hidden Sectors - 4 bytes\r | |
50 | LargeSectors: .long 0 # Large Sectors - 4 bytes\r | |
51 | \r | |
52 | #******************************************************************************\r | |
53 | #\r | |
54 | #The structure for FAT32 starting at offset 36 of the boot sector. (At this point, \r | |
55 | #the BPB/boot sector for FAT12 and FAT16 differs from the BPB/boot sector for FAT32.)\r | |
56 | #\r | |
57 | #******************************************************************************\r | |
58 | \r | |
59 | SectorsPerFat32: .long 0 # Sectors Per FAT for FAT32 - 4 bytes\r | |
60 | ExtFlags: .word 0 # Mirror Flag - 2 bytes\r | |
61 | FSVersion: .word 0 # File System Version - 2 bytes\r | |
62 | RootCluster: .long 0 # 1st Cluster Number of Root Dir - 4 bytes\r | |
63 | FSInfo: .word 0 # Sector Number of FSINFO - 2 bytes\r | |
64 | BkBootSector: .word 0 # Sector Number of Bk BootSector - 2 bytes\r | |
65 | Reserved: .fill 12,1,0 # Reserved Field - 12 bytes\r | |
66 | PhysicalDrive: .byte 0 # Physical Drive Number - 1 byte\r | |
67 | Reserved1: .byte 0 # Reserved Field - 1 byte\r | |
68 | Signature: .byte 0 # Extended Boot Signature - 1 byte\r | |
69 | VolId: .ascii " " # Volume Serial Number - 4 bytes\r | |
70 | FatLabel: .ascii " " # Volume Label - 11 bytes\r | |
71 | FileSystemType: .ascii "FAT32 " # File System Type - 8 bytes\r | |
72 | \r | |
73 | BootSectorEntryPoint: \r | |
74 | #ASSUME ds:@code\r | |
75 | #ASSUME ss:@code\r | |
76 | # ds = 1000, es = 2000 + x (size of first cluster >> 4)\r | |
77 | # cx = Start Cluster of EfiLdr\r | |
78 | # dx = Start Cluster of Efivar.bin\r | |
79 | \r | |
80 | # Re use the BPB data stored in Boot Sector\r | |
81 | movw $0x7c00, %bp\r | |
82 | \r | |
83 | \r | |
84 | pushw %cx\r | |
85 | # Read Efivar.bin\r | |
86 | # 1000:dx = DirectoryEntry of Efivar.bin -> BS.com has filled already\r | |
87 | movw $0x1900, %ax\r | |
88 | movw %ax, %es\r | |
89 | testw %dx, %dx\r | |
90 | jnz CheckVarStoreSize\r | |
91 | \r | |
92 | movb $1, %al\r | |
93 | NoVarStore: \r | |
94 | pushw %es\r | |
95 | # Set the 5th byte start @ 0:19000 to non-zero indicating we should init var store header in DxeIpl\r | |
fd549a4d | 96 | movb %al, %es:4\r |
ccec4c39 | 97 | jmp SaveVolumeId\r |
98 | \r | |
99 | CheckVarStoreSize: \r | |
100 | movw %dx, %di\r | |
101 | cmpl $0x4000, %ds:2(%di)\r | |
102 | movb $2, %al\r | |
103 | jne NoVarStore\r | |
104 | \r | |
105 | LoadVarStore: \r | |
106 | movb $0, %al\r | |
fd549a4d | 107 | movb %al, %es:4\r |
ccec4c39 | 108 | movw (%di), %cx\r |
109 | # ES:DI = 1500:0\r | |
110 | xorw %di, %di\r | |
111 | pushw %es\r | |
112 | movw $0x1500, %ax\r | |
113 | movw %ax, %es\r | |
114 | call ReadFile\r | |
115 | SaveVolumeId: \r | |
116 | popw %es\r | |
117 | movw VolId(%bp), %ax\r | |
fd549a4d | 118 | movw %ax, %es:0 # Save Volume Id to 0:19000. we will find the correct volume according to this VolumeId\r |
ccec4c39 | 119 | movw VolId+2(%bp), %ax\r |
fd549a4d | 120 | movw %ax, %es:2\r |
ccec4c39 | 121 | \r |
122 | # Read Efildr\r | |
123 | popw %cx\r | |
124 | # cx = Start Cluster of Efildr -> BS.com has filled already\r | |
125 | # ES:DI = 2000:0, first cluster will be read again\r | |
126 | xorw %di, %di # di = 0\r | |
127 | movw $0x2000, %ax\r | |
128 | movw %ax, %es\r | |
129 | call ReadFile\r | |
130 | movw %cs, %ax\r | |
131 | movw %ax, %cs:JumpSegment\r | |
132 | JumpFarInstruction: \r | |
133 | .byte 0xea\r | |
134 | JumpOffset: \r | |
135 | .word 0x200\r | |
136 | JumpSegment: \r | |
137 | .word 0x2000\r | |
138 | \r | |
139 | \r | |
140 | \r | |
141 | \r | |
142 | # ****************************************************************************\r | |
143 | # ReadFile\r | |
144 | #\r | |
145 | # Arguments:\r | |
146 | # CX = Start Cluster of File\r | |
147 | # ES:DI = Buffer to store file content read from disk\r | |
148 | #\r | |
149 | # Return:\r | |
150 | # (ES << 4 + DI) = end of file content Buffer\r | |
151 | #\r | |
152 | # ****************************************************************************\r | |
153 | ReadFile: \r | |
154 | # si = NumberOfClusters\r | |
155 | # cx = ClusterNumber\r | |
156 | # dx = CachedFatSectorNumber\r | |
157 | # ds:0000 = CacheFatSectorBuffer\r | |
158 | # es:di = Buffer to load file\r | |
159 | # bx = NextClusterNumber\r | |
160 | pusha\r | |
161 | movw $1, %si # NumberOfClusters = 1\r | |
162 | pushw %cx # Push Start Cluster onto stack\r | |
163 | movw $0xfff, %dx # CachedFatSectorNumber = 0xfff\r | |
164 | FatChainLoop: \r | |
165 | movw %cx, %ax # ax = ClusterNumber \r | |
166 | andw $0xfff8, %ax # ax = ax & 0xfff8\r | |
167 | cmpw $0xfff8, %ax # See if this is the last cluster\r | |
168 | je FoundLastCluster # Jump if last cluster found\r | |
169 | movw %cx, %ax # ax = ClusterNumber\r | |
170 | shlw $2, %ax # FatOffset = ClusterNumber * 4\r | |
171 | pushw %si # Save si\r | |
172 | movw %ax, %si # si = FatOffset\r | |
173 | shrw $BLOCK_SHIFT, %ax # ax = FatOffset >> BLOCK_SHIFT\r | |
174 | addw ReservedSectors(%bp), %ax # ax = FatSectorNumber = ReservedSectors + (FatOffset >> BLOCK_OFFSET)\r | |
175 | andw $BLOCK_MASK, %si # si = FatOffset & BLOCK_MASK\r | |
176 | cmpw %dx, %ax # Compare FatSectorNumber to CachedFatSectorNumber\r | |
177 | je SkipFatRead\r | |
178 | movw $2, %bx\r | |
179 | pushw %es\r | |
180 | pushw %ds\r | |
181 | popw %es\r | |
182 | call ReadBlocks # Read 2 blocks starting at AX storing at ES:DI\r | |
183 | popw %es\r | |
184 | movw %ax, %dx # CachedFatSectorNumber = FatSectorNumber\r | |
185 | SkipFatRead: \r | |
186 | movw (%si), %bx # bx = NextClusterNumber\r | |
187 | movw %cx, %ax # ax = ClusterNumber\r | |
188 | popw %si # Restore si\r | |
189 | decw %bx # bx = NextClusterNumber - 1\r | |
190 | cmpw %cx, %bx # See if (NextClusterNumber-1)==ClusterNumber\r | |
191 | jne ReadClusters\r | |
192 | incw %bx # bx = NextClusterNumber\r | |
193 | incw %si # NumberOfClusters++\r | |
194 | movw %bx, %cx # ClusterNumber = NextClusterNumber\r | |
195 | jmp FatChainLoop\r | |
196 | ReadClusters: \r | |
197 | incw %bx\r | |
198 | popw %ax # ax = StartCluster\r | |
199 | pushw %bx # StartCluster = NextClusterNumber\r | |
200 | movw %bx, %cx # ClusterNumber = NextClusterNumber\r | |
201 | subw $2, %ax # ax = StartCluster - 2\r | |
202 | xorb %bh, %bh\r | |
203 | movb SectorsPerCluster(%bp), %bl # bx = SectorsPerCluster\r | |
204 | mulw %bx # ax = (StartCluster - 2) * SectorsPerCluster\r | |
205 | addw (%bp), %ax # ax = FirstClusterLBA + (StartCluster-2)*SectorsPerCluster\r | |
206 | pushw %ax # save start sector\r | |
207 | movw %si, %ax # ax = NumberOfClusters\r | |
208 | mulw %bx # ax = NumberOfClusters * SectorsPerCluster\r | |
209 | movw %ax, %bx # bx = Number of Sectors\r | |
210 | popw %ax # ax = Start Sector\r | |
211 | call ReadBlocks\r | |
212 | movw $1, %si # NumberOfClusters = 1\r | |
213 | jmp FatChainLoop\r | |
214 | FoundLastCluster: \r | |
215 | popw %cx\r | |
216 | popa\r | |
217 | ret\r | |
218 | \r | |
219 | \r | |
220 | # ****************************************************************************\r | |
221 | # ReadBlocks - Reads a set of blocks from a block device\r | |
222 | #\r | |
223 | # AX = Start LBA\r | |
224 | # BX = Number of Blocks to Read\r | |
225 | # ES:DI = Buffer to store sectors read from disk\r | |
226 | # ****************************************************************************\r | |
227 | \r | |
228 | # cx = Blocks\r | |
229 | # bx = NumberOfBlocks\r | |
230 | # si = StartLBA\r | |
231 | \r | |
232 | ReadBlocks: \r | |
233 | pusha\r | |
234 | addl LBAOffsetForBootSector(%bp), %eax # Add LBAOffsetForBootSector to Start LBA\r | |
235 | addl HiddenSectors(%bp), %eax # Add HiddenSectors to Start LBA\r | |
236 | movl %eax, %esi # esi = Start LBA\r | |
237 | movw %bx, %cx # cx = Number of blocks to read\r | |
238 | ReadCylinderLoop: \r | |
239 | movw $0x7bfc, %bp # bp = 0x7bfc\r | |
240 | movl %esi, %eax # eax = Start LBA\r | |
241 | xorl %edx, %edx # edx = 0\r | |
242 | movzwl (%bp), %ebx # bx = MaxSector\r | |
243 | divl %ebx # ax = StartLBA / MaxSector\r | |
244 | incw %dx # dx = (StartLBA % MaxSector) + 1\r | |
245 | \r | |
246 | movw (%bp), %bx # bx = MaxSector\r | |
247 | subw %dx, %bx # bx = MaxSector - Sector\r | |
248 | incw %bx # bx = MaxSector - Sector + 1\r | |
249 | cmpw %bx, %cx # Compare (Blocks) to (MaxSector - Sector + 1)\r | |
250 | jg LimitTransfer\r | |
251 | movw %cx, %bx # bx = Blocks\r | |
252 | LimitTransfer: \r | |
253 | pushw %ax # save ax\r | |
254 | movw %es, %ax # ax = es\r | |
255 | shrw $(BLOCK_SHIFT-4), %ax # ax = Number of blocks into mem system\r | |
256 | andw $0x7f, %ax # ax = Number of blocks into current seg\r | |
257 | addw %bx, %ax # ax = End Block number of transfer\r | |
258 | cmpw $0x80, %ax # See if it crosses a 64K boundry\r | |
259 | jle NotCrossing64KBoundry # Branch if not crossing 64K boundry\r | |
260 | subw $0x80, %ax # ax = Number of blocks past 64K boundry\r | |
261 | subw %ax, %bx # Decrease transfer size by block overage\r | |
262 | NotCrossing64KBoundry: \r | |
263 | popw %ax # restore ax\r | |
264 | \r | |
265 | pushw %cx\r | |
266 | movb %dl, %cl # cl = (StartLBA % MaxSector) + 1 = Sector\r | |
267 | xorw %dx, %dx # dx = 0\r | |
268 | divw 2(%bp) # ax = ax / (MaxHead + 1) = Cylinder \r | |
269 | # dx = ax % (MaxHead + 1) = Head\r | |
270 | \r | |
271 | pushw %bx # Save number of blocks to transfer\r | |
272 | movb %dl, %dh # dh = Head\r | |
273 | movw $0x7c00, %bp # bp = 0x7c00\r | |
274 | movb PhysicalDrive(%bp), %dl # dl = Drive Number\r | |
275 | movb %al, %ch # ch = Cylinder\r | |
276 | movb %bl, %al # al = Blocks\r | |
277 | movb $2, %ah # ah = Function 2\r | |
278 | movw %di, %bx # es:bx = Buffer address\r | |
279 | int $0x13\r | |
280 | jc DiskError\r | |
281 | popw %bx\r | |
282 | popw %cx\r | |
283 | movzwl %bx, %ebx\r | |
284 | addl %ebx, %esi # StartLBA = StartLBA + NumberOfBlocks\r | |
285 | subw %bx, %cx # Blocks = Blocks - NumberOfBlocks\r | |
286 | movw %es, %ax\r | |
287 | shlw $(BLOCK_SHIFT-4), %bx\r | |
288 | addw %bx, %ax\r | |
289 | movw %ax, %es # es:di = es:di + NumberOfBlocks*BLOCK_SIZE\r | |
290 | cmpw $0, %cx\r | |
291 | jne ReadCylinderLoop\r | |
292 | popa\r | |
293 | ret\r | |
294 | \r | |
295 | DiskError: \r | |
296 | pushw %cs\r | |
297 | popw %ds\r | |
298 | leaw ErrorString, %si\r | |
299 | movw $7, %cx\r | |
300 | jmp PrintStringAndHalt\r | |
301 | \r | |
302 | PrintStringAndHalt: \r | |
303 | movw $0xb800, %ax\r | |
304 | movw %ax, %es\r | |
305 | movw $160, %di\r | |
306 | rep\r | |
307 | movsw\r | |
308 | Halt: \r | |
309 | jmp Halt\r | |
310 | \r | |
311 | ErrorString: \r | |
312 | .byte 'S', 0x0c, 'E', 0x0c, 'r', 0x0c, 'r', 0x0c, 'o', 0x0c, 'r', 0x0c, '!', 0x0c\r | |
313 | \r | |
e7c4ef5e | 314 | .org 0x01fa\r |
ccec4c39 | 315 | LBAOffsetForBootSector: \r |
316 | .long 0x0\r | |
317 | \r | |
e7c4ef5e | 318 | .org 0x01fe\r |
ccec4c39 | 319 | .word 0xaa55\r |
320 | \r | |
321 | #******************************************************************************\r | |
322 | #******************************************************************************\r | |
323 | #******************************************************************************\r | |
324 | \r | |
325 | .equ DELAY_PORT, 0x0ed # Port to use for 1uS delay\r | |
326 | .equ KBD_CONTROL_PORT, 0x060 # 8042 control port \r | |
327 | .equ KBD_STATUS_PORT, 0x064 # 8042 status port \r | |
328 | .equ WRITE_DATA_PORT_CMD, 0x0d1 # 8042 command to write the data port\r | |
329 | .equ ENABLE_A20_CMD, 0x0df # 8042 command to enable A20\r | |
330 | \r | |
e7c4ef5e | 331 | .org 0x200\r |
ccec4c39 | 332 | jmp start\r |
333 | Em64String: \r | |
334 | .byte 'E', 0x0c, 'm', 0x0c, '6', 0x0c, '4', 0x0c, 'T', 0x0c, ' ', 0x0c, 'U', 0x0c, 'n', 0x0c, 's', 0x0c, 'u', 0x0c, 'p', 0x0c, 'p', 0x0c, 'o', 0x0c, 'r', 0x0c, 't', 0x0c, 'e', 0x0c, 'd', 0x0c, '!', 0x0c\r | |
335 | \r | |
336 | start: \r | |
337 | movw %cs, %ax\r | |
338 | movw %ax, %ds\r | |
339 | movw %ax, %es\r | |
340 | movw %ax, %ss\r | |
341 | movw $MyStack, %sp\r | |
342 | \r | |
343 | # mov ax,0b800h\r | |
344 | # mov es,ax\r | |
345 | # mov byte ptr es:[160],'a'\r | |
346 | # mov ax,cs\r | |
347 | # mov es,ax\r | |
348 | \r | |
349 | movl $0, %ebx\r | |
350 | leal MemoryMap, %edi\r | |
351 | MemMapLoop: \r | |
352 | movl $0xe820, %eax\r | |
353 | movl $20, %ecx\r | |
354 | movl $0x534d4150, %edx # 0x534d4150 = 'SMAP' \r | |
355 | int $0x15\r | |
356 | jc MemMapDone\r | |
357 | addl $20, %edi\r | |
358 | cmpl $0, %ebx\r | |
359 | je MemMapDone\r | |
360 | jmp MemMapLoop\r | |
361 | MemMapDone: \r | |
362 | leal MemoryMap, %eax\r | |
363 | subl %eax, %edi # Get the address of the memory map\r | |
364 | movl %edi, MemoryMapSize # Save the size of the memory map\r | |
365 | \r | |
366 | xorl %ebx, %ebx\r | |
367 | movw %cs, %bx # BX=segment\r | |
368 | shll $4, %ebx # BX="linear" address of segment base\r | |
369 | leal GDT_BASE(%ebx), %eax # EAX=PHYSICAL address of gdt\r | |
370 | movl %eax, gdtr + 2 # Put address of gdt into the gdtr\r | |
371 | leal IDT_BASE(%ebx), %eax # EAX=PHYSICAL address of idt\r | |
372 | movl %eax, idtr + 2 # Put address of idt into the idtr\r | |
373 | leal MemoryMapSize(%ebx), %edx # Physical base address of the memory map\r | |
374 | \r | |
375 | addl $0x1000, %ebx # Source of EFI32\r | |
376 | movl %ebx, JUMP+2\r | |
377 | addl $0x1000, %ebx\r | |
378 | movl %ebx, %esi # Source of EFILDR32\r | |
379 | \r | |
380 | # mov ax,0b800h\r | |
381 | # mov es,ax\r | |
382 | # mov byte ptr es:[162],'b'\r | |
383 | # mov ax,cs\r | |
384 | # mov es,ax\r | |
385 | \r | |
386 | #\r | |
387 | # Enable A20 Gate \r | |
388 | #\r | |
389 | \r | |
390 | movw $0x2401, %ax # Enable A20 Gate\r | |
391 | int $0x15\r | |
392 | jnc A20GateEnabled # Jump if it suceeded\r | |
393 | \r | |
394 | #\r | |
395 | # If INT 15 Function 2401 is not supported, then attempt to Enable A20 manually.\r | |
396 | #\r | |
397 | \r | |
398 | call Empty8042InputBuffer # Empty the Input Buffer on the 8042 controller\r | |
399 | jnz Timeout8042 # Jump if the 8042 timed out\r | |
400 | outw %ax, $DELAY_PORT # Delay 1 uS\r | |
401 | movb $WRITE_DATA_PORT_CMD, %al # 8042 cmd to write output port\r | |
402 | outb %al, $KBD_STATUS_PORT # Send command to the 8042\r | |
403 | call Empty8042InputBuffer # Empty the Input Buffer on the 8042 controller\r | |
404 | jnz Timeout8042 # Jump if the 8042 timed out\r | |
405 | movb $ENABLE_A20_CMD, %al # gate address bit 20 on\r | |
406 | outb %al, $KBD_CONTROL_PORT # Send command to thre 8042\r | |
407 | call Empty8042InputBuffer # Empty the Input Buffer on the 8042 controller\r | |
408 | movw $25, %cx # Delay 25 uS for the command to complete on the 8042\r | |
409 | Delay25uS: \r | |
410 | outw %ax, $DELAY_PORT # Delay 1 uS\r | |
411 | loopl Delay25uS\r | |
412 | Timeout8042: \r | |
413 | \r | |
414 | \r | |
415 | A20GateEnabled: \r | |
3a4b9eba | 416 | movw $0x0008, %bx # Flat data descriptor\r |
ccec4c39 | 417 | #\r |
418 | # DISABLE INTERRUPTS - Entering Protected Mode\r | |
419 | #\r | |
420 | \r | |
421 | cli\r | |
422 | \r | |
423 | # mov ax,0b800h\r | |
424 | # mov es,ax\r | |
425 | # mov byte ptr es:[164],'c'\r | |
426 | # mov ax,cs\r | |
427 | # mov es,ax\r | |
428 | \r | |
429 | .byte 0x66\r | |
430 | lgdt gdtr\r | |
431 | .byte 0x66\r | |
432 | lidt idtr\r | |
433 | \r | |
434 | movl %cr0, %eax\r | |
435 | orb $1, %al\r | |
436 | movl %eax, %cr0\r | |
ccec4c39 | 437 | JUMP: \r |
438 | # jmp far 0010:00020000\r | |
439 | .byte 0x66\r | |
440 | .byte 0xea\r | |
441 | .long 0x00020000\r | |
442 | .word 0x0010\r | |
443 | \r | |
444 | Empty8042InputBuffer: \r | |
445 | movw $0, %cx\r | |
446 | Empty8042Loop: \r | |
447 | outw %ax, $DELAY_PORT # Delay 1us\r | |
448 | inb $KBD_STATUS_PORT, %al # Read the 8042 Status Port\r | |
449 | andb $0x2, %al # Check the Input Buffer Full Flag\r | |
450 | loopnz Empty8042Loop # Loop until the input buffer is empty or a timout of 65536 uS\r | |
451 | ret\r | |
452 | \r | |
453 | ##############################################################################\r | |
454 | # data\r | |
455 | ##############################################################################\r | |
456 | \r | |
9811c392 | 457 | .p2align 1\r |
ccec4c39 | 458 | \r |
459 | gdtr: .word GDT_END - GDT_BASE - 1 \r | |
460 | .long 0 # (GDT base gets set above)\r | |
461 | ##############################################################################\r | |
462 | # global descriptor table (GDT)\r | |
463 | ##############################################################################\r | |
464 | \r | |
9811c392 | 465 | .p2align 1\r |
ccec4c39 | 466 | \r |
467 | GDT_BASE: \r | |
468 | # null descriptor\r | |
469 | .equ NULL_SEL, .-GDT_BASE\r | |
470 | .word 0 # limit 15:0\r | |
471 | .word 0 # base 15:0\r | |
472 | .byte 0 # base 23:16\r | |
473 | .byte 0 # type\r | |
474 | .byte 0 # limit 19:16, flags\r | |
475 | .byte 0 # base 31:24\r | |
476 | \r | |
477 | # linear data segment descriptor\r | |
478 | .equ LINEAR_SEL, .-GDT_BASE\r | |
479 | .word 0xFFFF # limit 0xFFFFF\r | |
480 | .word 0 # base 0\r | |
481 | .byte 0\r | |
482 | .byte 0x92 # present, ring 0, data, expand-up, writable\r | |
483 | .byte 0xCF # page-granular, 32-bit\r | |
484 | .byte 0\r | |
485 | \r | |
486 | # linear code segment descriptor\r | |
487 | .equ LINEAR_CODE_SEL, .-GDT_BASE\r | |
488 | .word 0xFFFF # limit 0xFFFFF\r | |
489 | .word 0 # base 0\r | |
490 | .byte 0\r | |
491 | .byte 0x9A # present, ring 0, data, expand-up, writable\r | |
492 | .byte 0xCF # page-granular, 32-bit\r | |
493 | .byte 0\r | |
494 | \r | |
495 | # system data segment descriptor\r | |
496 | .equ SYS_DATA_SEL, .-GDT_BASE\r | |
497 | .word 0xFFFF # limit 0xFFFFF\r | |
498 | .word 0 # base 0\r | |
499 | .byte 0\r | |
500 | .byte 0x92 # present, ring 0, data, expand-up, writable\r | |
501 | .byte 0xCF # page-granular, 32-bit\r | |
502 | .byte 0\r | |
503 | \r | |
504 | # system code segment descriptor\r | |
505 | .equ SYS_CODE_SEL, .-GDT_BASE\r | |
506 | .word 0xFFFF # limit 0xFFFFF\r | |
507 | .word 0 # base 0\r | |
508 | .byte 0\r | |
509 | .byte 0x9A # present, ring 0, data, expand-up, writable\r | |
510 | .byte 0xCF # page-granular, 32-bit\r | |
511 | .byte 0\r | |
512 | \r | |
513 | # spare segment descriptor\r | |
514 | .equ SPARE3_SEL, .-GDT_BASE\r | |
515 | .word 0 # limit 0xFFFFF\r | |
516 | .word 0 # base 0\r | |
517 | .byte 0\r | |
518 | .byte 0 # present, ring 0, data, expand-up, writable\r | |
519 | .byte 0 # page-granular, 32-bit\r | |
520 | .byte 0\r | |
521 | \r | |
522 | # spare segment descriptor\r | |
523 | .equ SPARE4_SEL, .-GDT_BASE\r | |
524 | .word 0 # limit 0xFFFFF\r | |
525 | .word 0 # base 0\r | |
526 | .byte 0\r | |
527 | .byte 0 # present, ring 0, data, expand-up, writable\r | |
528 | .byte 0 # page-granular, 32-bit\r | |
529 | .byte 0\r | |
530 | \r | |
531 | # spare segment descriptor\r | |
532 | .equ SPARE5_SEL, .-GDT_BASE\r | |
533 | .word 0 # limit 0xFFFFF\r | |
534 | .word 0 # base 0\r | |
535 | .byte 0\r | |
536 | .byte 0 # present, ring 0, data, expand-up, writable\r | |
537 | .byte 0 # page-granular, 32-bit\r | |
538 | .byte 0\r | |
539 | \r | |
540 | GDT_END: \r | |
541 | \r | |
9811c392 | 542 | .p2align 1\r |
ccec4c39 | 543 | \r |
544 | \r | |
545 | \r | |
546 | idtr: .word IDT_END - IDT_BASE - 1 \r | |
547 | .long 0 # (IDT base gets set above)\r | |
548 | ##############################################################################\r | |
549 | # interrupt descriptor table (IDT)\r | |
550 | #\r | |
551 | # Note: The hardware IRQ's specified in this table are the normal PC/AT IRQ\r | |
552 | # mappings. This implementation only uses the system timer and all other\r | |
553 | # IRQs will remain masked. The descriptors for vectors 33+ are provided\r | |
554 | # for convenience.\r | |
555 | ##############################################################################\r | |
556 | \r | |
557 | #idt_tag db "IDT",0 \r | |
9811c392 | 558 | .p2align 1\r |
ccec4c39 | 559 | \r |
560 | IDT_BASE: \r | |
561 | # divide by zero (INT 0)\r | |
562 | .equ DIV_ZERO_SEL, .-IDT_BASE\r | |
563 | .word 0 # offset 15:0\r | |
564 | .word SYS_CODE_SEL # selector 15:0\r | |
565 | .byte 0 # 0 for interrupt gate\r | |
566 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
567 | .word 0 # offset 31:16\r | |
568 | \r | |
569 | # debug exception (INT 1)\r | |
570 | .equ DEBUG_EXCEPT_SEL, .-IDT_BASE\r | |
571 | .word 0 # offset 15:0\r | |
572 | .word SYS_CODE_SEL # selector 15:0\r | |
573 | .byte 0 # 0 for interrupt gate\r | |
574 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
575 | .word 0 # offset 31:16\r | |
576 | \r | |
577 | # NMI (INT 2)\r | |
578 | .equ NMI_SEL, .-IDT_BASE\r | |
579 | .word 0 # offset 15:0\r | |
580 | .word SYS_CODE_SEL # selector 15:0\r | |
581 | .byte 0 # 0 for interrupt gate\r | |
582 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
583 | .word 0 # offset 31:16\r | |
584 | \r | |
585 | # soft breakpoint (INT 3)\r | |
586 | .equ BREAKPOINT_SEL, .-IDT_BASE\r | |
587 | .word 0 # offset 15:0\r | |
588 | .word SYS_CODE_SEL # selector 15:0\r | |
589 | .byte 0 # 0 for interrupt gate\r | |
590 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
591 | .word 0 # offset 31:16\r | |
592 | \r | |
593 | # overflow (INT 4)\r | |
594 | .equ OVERFLOW_SEL, .-IDT_BASE\r | |
595 | .word 0 # offset 15:0\r | |
596 | .word SYS_CODE_SEL # selector 15:0\r | |
597 | .byte 0 # 0 for interrupt gate\r | |
598 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
599 | .word 0 # offset 31:16\r | |
600 | \r | |
601 | # bounds check (INT 5)\r | |
602 | .equ BOUNDS_CHECK_SEL, .-IDT_BASE\r | |
603 | .word 0 # offset 15:0\r | |
604 | .word SYS_CODE_SEL # selector 15:0\r | |
605 | .byte 0 # 0 for interrupt gate\r | |
606 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
607 | .word 0 # offset 31:16\r | |
608 | \r | |
609 | # invalid opcode (INT 6)\r | |
610 | .equ INVALID_OPCODE_SEL, .-IDT_BASE\r | |
611 | .word 0 # offset 15:0\r | |
612 | .word SYS_CODE_SEL # selector 15:0\r | |
613 | .byte 0 # 0 for interrupt gate\r | |
614 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
615 | .word 0 # offset 31:16\r | |
616 | \r | |
617 | # device not available (INT 7)\r | |
618 | .equ DEV_NOT_AVAIL_SEL, .-IDT_BASE\r | |
619 | .word 0 # offset 15:0\r | |
620 | .word SYS_CODE_SEL # selector 15:0\r | |
621 | .byte 0 # 0 for interrupt gate\r | |
622 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
623 | .word 0 # offset 31:16\r | |
624 | \r | |
625 | # double fault (INT 8)\r | |
626 | .equ DOUBLE_FAULT_SEL, .-IDT_BASE\r | |
627 | .word 0 # offset 15:0\r | |
628 | .word SYS_CODE_SEL # selector 15:0\r | |
629 | .byte 0 # 0 for interrupt gate\r | |
630 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
631 | .word 0 # offset 31:16\r | |
632 | \r | |
633 | # Coprocessor segment overrun - reserved (INT 9)\r | |
634 | .equ RSVD_INTR_SEL1, .-IDT_BASE\r | |
635 | .word 0 # offset 15:0\r | |
636 | .word SYS_CODE_SEL # selector 15:0\r | |
637 | .byte 0 # 0 for interrupt gate\r | |
638 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
639 | .word 0 # offset 31:16\r | |
640 | \r | |
641 | # invalid TSS (INT 0ah)\r | |
642 | .equ INVALID_TSS_SEL, .-IDT_BASE\r | |
643 | .word 0 # offset 15:0\r | |
644 | .word SYS_CODE_SEL # selector 15:0\r | |
645 | .byte 0 # 0 for interrupt gate\r | |
646 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
647 | .word 0 # offset 31:16\r | |
648 | \r | |
649 | # segment not present (INT 0bh)\r | |
650 | .equ SEG_NOT_PRESENT_SEL, .-IDT_BASE\r | |
651 | .word 0 # offset 15:0\r | |
652 | .word SYS_CODE_SEL # selector 15:0\r | |
653 | .byte 0 # 0 for interrupt gate\r | |
654 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
655 | .word 0 # offset 31:16\r | |
656 | \r | |
657 | # stack fault (INT 0ch)\r | |
658 | .equ STACK_FAULT_SEL, .-IDT_BASE\r | |
659 | .word 0 # offset 15:0\r | |
660 | .word SYS_CODE_SEL # selector 15:0\r | |
661 | .byte 0 # 0 for interrupt gate\r | |
662 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
663 | .word 0 # offset 31:16\r | |
664 | \r | |
665 | # general protection (INT 0dh)\r | |
666 | .equ GP_FAULT_SEL, .-IDT_BASE\r | |
667 | .word 0 # offset 15:0\r | |
668 | .word SYS_CODE_SEL # selector 15:0\r | |
669 | .byte 0 # 0 for interrupt gate\r | |
670 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
671 | .word 0 # offset 31:16\r | |
672 | \r | |
673 | # page fault (INT 0eh)\r | |
674 | .equ PAGE_FAULT_SEL, .-IDT_BASE\r | |
675 | .word 0 # offset 15:0\r | |
676 | .word SYS_CODE_SEL # selector 15:0\r | |
677 | .byte 0 # 0 for interrupt gate\r | |
678 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
679 | .word 0 # offset 31:16\r | |
680 | \r | |
681 | # Intel reserved - do not use (INT 0fh)\r | |
682 | .equ RSVD_INTR_SEL2, .-IDT_BASE\r | |
683 | .word 0 # offset 15:0\r | |
684 | .word SYS_CODE_SEL # selector 15:0\r | |
685 | .byte 0 # 0 for interrupt gate\r | |
686 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
687 | .word 0 # offset 31:16\r | |
688 | \r | |
689 | # floating point error (INT 10h)\r | |
690 | .equ FLT_POINT_ERR_SEL, .-IDT_BASE\r | |
691 | .word 0 # offset 15:0\r | |
692 | .word SYS_CODE_SEL # selector 15:0\r | |
693 | .byte 0 # 0 for interrupt gate\r | |
694 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
695 | .word 0 # offset 31:16\r | |
696 | \r | |
697 | # alignment check (INT 11h)\r | |
698 | .equ ALIGNMENT_CHECK_SEL, .-IDT_BASE\r | |
699 | .word 0 # offset 15:0\r | |
700 | .word SYS_CODE_SEL # selector 15:0\r | |
701 | .byte 0 # 0 for interrupt gate\r | |
702 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
703 | .word 0 # offset 31:16\r | |
704 | \r | |
705 | # machine check (INT 12h)\r | |
706 | .equ MACHINE_CHECK_SEL, .-IDT_BASE\r | |
707 | .word 0 # offset 15:0\r | |
708 | .word SYS_CODE_SEL # selector 15:0\r | |
709 | .byte 0 # 0 for interrupt gate\r | |
710 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
711 | .word 0 # offset 31:16\r | |
712 | \r | |
713 | # SIMD floating-point exception (INT 13h)\r | |
714 | .equ SIMD_EXCEPTION_SEL, .-IDT_BASE\r | |
715 | .word 0 # offset 15:0\r | |
716 | .word SYS_CODE_SEL # selector 15:0\r | |
717 | .byte 0 # 0 for interrupt gate\r | |
718 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
719 | .word 0 # offset 31:16\r | |
720 | \r | |
721 | # 85 unspecified descriptors, First 12 of them are reserved, the rest are avail\r | |
722 | .fill 85 * 8, 1, 0\r | |
723 | \r | |
724 | # IRQ 0 (System timer) - (INT 68h)\r | |
725 | .equ IRQ0_SEL, .-IDT_BASE\r | |
726 | .word 0 # offset 15:0\r | |
727 | .word SYS_CODE_SEL # selector 15:0\r | |
728 | .byte 0 # 0 for interrupt gate\r | |
729 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
730 | .word 0 # offset 31:16\r | |
731 | \r | |
732 | # IRQ 1 (8042 Keyboard controller) - (INT 69h)\r | |
733 | .equ IRQ1_SEL, .-IDT_BASE\r | |
734 | .word 0 # offset 15:0\r | |
735 | .word SYS_CODE_SEL # selector 15:0\r | |
736 | .byte 0 # 0 for interrupt gate\r | |
737 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
738 | .word 0 # offset 31:16\r | |
739 | \r | |
740 | # Reserved - IRQ 2 redirect (IRQ 2) - DO NOT USE!!! - (INT 6ah)\r | |
741 | .equ IRQ2_SEL, .-IDT_BASE\r | |
742 | .word 0 # offset 15:0\r | |
743 | .word SYS_CODE_SEL # selector 15:0\r | |
744 | .byte 0 # 0 for interrupt gate\r | |
745 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
746 | .word 0 # offset 31:16\r | |
747 | \r | |
748 | # IRQ 3 (COM 2) - (INT 6bh)\r | |
749 | .equ IRQ3_SEL, .-IDT_BASE\r | |
750 | .word 0 # offset 15:0\r | |
751 | .word SYS_CODE_SEL # selector 15:0\r | |
752 | .byte 0 # 0 for interrupt gate\r | |
753 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
754 | .word 0 # offset 31:16\r | |
755 | \r | |
756 | # IRQ 4 (COM 1) - (INT 6ch)\r | |
757 | .equ IRQ4_SEL, .-IDT_BASE\r | |
758 | .word 0 # offset 15:0\r | |
759 | .word SYS_CODE_SEL # selector 15:0\r | |
760 | .byte 0 # 0 for interrupt gate\r | |
761 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
762 | .word 0 # offset 31:16\r | |
763 | \r | |
764 | # IRQ 5 (LPT 2) - (INT 6dh)\r | |
765 | .equ IRQ5_SEL, .-IDT_BASE\r | |
766 | .word 0 # offset 15:0\r | |
767 | .word SYS_CODE_SEL # selector 15:0\r | |
768 | .byte 0 # 0 for interrupt gate\r | |
769 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
770 | .word 0 # offset 31:16\r | |
771 | \r | |
772 | # IRQ 6 (Floppy controller) - (INT 6eh)\r | |
773 | .equ IRQ6_SEL, .-IDT_BASE\r | |
774 | .word 0 # offset 15:0\r | |
775 | .word SYS_CODE_SEL # selector 15:0\r | |
776 | .byte 0 # 0 for interrupt gate\r | |
777 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
778 | .word 0 # offset 31:16\r | |
779 | \r | |
780 | # IRQ 7 (LPT 1) - (INT 6fh)\r | |
781 | .equ IRQ7_SEL, .-IDT_BASE\r | |
782 | .word 0 # offset 15:0\r | |
783 | .word SYS_CODE_SEL # selector 15:0\r | |
784 | .byte 0 # 0 for interrupt gate\r | |
785 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
786 | .word 0 # offset 31:16\r | |
787 | \r | |
788 | # IRQ 8 (RTC Alarm) - (INT 70h)\r | |
789 | .equ IRQ8_SEL, .-IDT_BASE\r | |
790 | .word 0 # offset 15:0\r | |
791 | .word SYS_CODE_SEL # selector 15:0\r | |
792 | .byte 0 # 0 for interrupt gate\r | |
793 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
794 | .word 0 # offset 31:16\r | |
795 | \r | |
796 | # IRQ 9 - (INT 71h)\r | |
797 | .equ IRQ9_SEL, .-IDT_BASE\r | |
798 | .word 0 # offset 15:0\r | |
799 | .word SYS_CODE_SEL # selector 15:0\r | |
800 | .byte 0 # 0 for interrupt gate\r | |
801 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
802 | .word 0 # offset 31:16\r | |
803 | \r | |
804 | # IRQ 10 - (INT 72h)\r | |
805 | .equ IRQ10_SEL, .-IDT_BASE\r | |
806 | .word 0 # offset 15:0\r | |
807 | .word SYS_CODE_SEL # selector 15:0\r | |
808 | .byte 0 # 0 for interrupt gate\r | |
809 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
810 | .word 0 # offset 31:16\r | |
811 | \r | |
812 | # IRQ 11 - (INT 73h)\r | |
813 | .equ IRQ11_SEL, .-IDT_BASE\r | |
814 | .word 0 # offset 15:0\r | |
815 | .word SYS_CODE_SEL # selector 15:0\r | |
816 | .byte 0 # 0 for interrupt gate\r | |
817 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
818 | .word 0 # offset 31:16\r | |
819 | \r | |
820 | # IRQ 12 (PS/2 mouse) - (INT 74h)\r | |
821 | .equ IRQ12_SEL, .-IDT_BASE\r | |
822 | .word 0 # offset 15:0\r | |
823 | .word SYS_CODE_SEL # selector 15:0\r | |
824 | .byte 0 # 0 for interrupt gate\r | |
825 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
826 | .word 0 # offset 31:16\r | |
827 | \r | |
828 | # IRQ 13 (Floating point error) - (INT 75h)\r | |
829 | .equ IRQ13_SEL, .-IDT_BASE\r | |
830 | .word 0 # offset 15:0\r | |
831 | .word SYS_CODE_SEL # selector 15:0\r | |
832 | .byte 0 # 0 for interrupt gate\r | |
833 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
834 | .word 0 # offset 31:16\r | |
835 | \r | |
836 | # IRQ 14 (Secondary IDE) - (INT 76h)\r | |
837 | .equ IRQ14_SEL, .-IDT_BASE\r | |
838 | .word 0 # offset 15:0\r | |
839 | .word SYS_CODE_SEL # selector 15:0\r | |
840 | .byte 0 # 0 for interrupt gate\r | |
841 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
842 | .word 0 # offset 31:16\r | |
843 | \r | |
844 | # IRQ 15 (Primary IDE) - (INT 77h)\r | |
845 | .equ IRQ15_SEL, .-IDT_BASE\r | |
846 | .word 0 # offset 15:0\r | |
847 | .word SYS_CODE_SEL # selector 15:0\r | |
848 | .byte 0 # 0 for interrupt gate\r | |
849 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r | |
850 | .word 0 # offset 31:16\r | |
851 | \r | |
852 | IDT_END: \r | |
853 | \r | |
9811c392 | 854 | .p2align 1\r |
ccec4c39 | 855 | \r |
856 | MemoryMapSize: .long 0\r | |
857 | MemoryMap: .long 0,0,0,0,0,0,0,0\r | |
858 | .long 0,0,0,0,0,0,0,0\r | |
859 | .long 0,0,0,0,0,0,0,0\r | |
860 | .long 0,0,0,0,0,0,0,0\r | |
861 | .long 0,0,0,0,0,0,0,0\r | |
862 | .long 0,0,0,0,0,0,0,0\r | |
863 | .long 0,0,0,0,0,0,0,0\r | |
864 | .long 0,0,0,0,0,0,0,0\r | |
865 | .long 0,0,0,0,0,0,0,0\r | |
866 | .long 0,0,0,0,0,0,0,0\r | |
867 | .long 0,0,0,0,0,0,0,0\r | |
868 | .long 0,0,0,0,0,0,0,0\r | |
869 | .long 0,0,0,0,0,0,0,0\r | |
870 | .long 0,0,0,0,0,0,0,0\r | |
871 | .long 0,0,0,0,0,0,0,0\r | |
872 | .long 0,0,0,0,0,0,0,0\r | |
873 | .long 0,0,0,0,0,0,0,0\r | |
874 | .long 0,0,0,0,0,0,0,0\r | |
875 | .long 0,0,0,0,0,0,0,0\r | |
876 | .long 0,0,0,0,0,0,0,0\r | |
877 | .long 0,0,0,0,0,0,0,0\r | |
878 | .long 0,0,0,0,0,0,0,0\r | |
879 | .long 0,0,0,0,0,0,0,0\r | |
880 | .long 0,0,0,0,0,0,0,0\r | |
881 | .long 0,0,0,0,0,0,0,0\r | |
882 | .long 0,0,0,0,0,0,0,0\r | |
883 | .long 0,0,0,0,0,0,0,0\r | |
884 | .long 0,0,0,0,0,0,0,0\r | |
885 | .long 0,0,0,0,0,0,0,0\r | |
886 | .long 0,0,0,0,0,0,0,0\r | |
887 | \r | |
888 | .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0\r | |
889 | .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0\r | |
890 | \r | |
891 | .org 0x0fe0\r | |
892 | MyStack: \r | |
893 | # below is the pieces of the IVT that is used to redirect INT 68h - 6fh\r | |
894 | # back to INT 08h - 0fh when in real mode... It is 'org'ed to a\r | |
895 | # known low address (20f00) so it can be set up by PlMapIrqToVect in\r | |
896 | # 8259.c\r | |
897 | \r | |
898 | int $8\r | |
899 | iret\r | |
900 | \r | |
901 | int $9\r | |
902 | iret\r | |
903 | \r | |
904 | int $10\r | |
905 | iret\r | |
906 | \r | |
907 | int $11\r | |
908 | iret\r | |
909 | \r | |
910 | int $12\r | |
911 | iret\r | |
912 | \r | |
913 | int $13\r | |
914 | iret\r | |
915 | \r | |
916 | int $14\r | |
917 | iret\r | |
918 | \r | |
919 | int $15\r | |
920 | iret\r | |
921 | \r | |
922 | \r | |
923 | .org 0x0ffe\r | |
924 | BlockSignature: \r | |
925 | .word 0xaa55\r | |
926 | \r | |
927 | \r |