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9060e3ec | 1 | /** @file\r |
2 | Power management support fucntions implementation for PCI Bus module.\r | |
3 | \r | |
7e242786 | 4 | Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>\r |
cd5ebaa0 | 5 | This program and the accompanying materials\r |
9060e3ec | 6 | are licensed and made available under the terms and conditions of the BSD License\r |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | **/\r | |
14 | \r | |
15 | #include "PciBus.h"\r | |
16 | \r | |
17 | /**\r | |
18 | This function is intended to turn off PWE assertion and\r | |
19 | put the device to D0 state if the device supports\r | |
20 | PCI Power Management.\r | |
21 | \r | |
22 | @param PciIoDevice PCI device instance.\r | |
23 | \r | |
24 | @retval EFI_UNSUPPORTED PCI Device does not support power management.\r | |
25 | @retval EFI_SUCCESS Turned off PWE successfully.\r | |
26 | \r | |
27 | **/\r | |
28 | EFI_STATUS\r | |
29 | ResetPowerManagementFeature (\r | |
30 | IN PCI_IO_DEVICE *PciIoDevice\r | |
31 | )\r | |
32 | {\r | |
33 | EFI_STATUS Status;\r | |
34 | UINT8 PowerManagementRegBlock;\r | |
35 | UINT16 PowerManagementCSR;\r | |
36 | \r | |
37 | PowerManagementRegBlock = 0;\r | |
38 | \r | |
39 | Status = LocateCapabilityRegBlock (\r | |
40 | PciIoDevice,\r | |
41 | EFI_PCI_CAPABILITY_ID_PMI,\r | |
42 | &PowerManagementRegBlock,\r | |
43 | NULL\r | |
44 | );\r | |
45 | \r | |
46 | if (EFI_ERROR (Status)) {\r | |
47 | return EFI_UNSUPPORTED;\r | |
48 | }\r | |
49 | \r | |
50 | //\r | |
51 | // Turn off the PWE assertion and put the device into D0 State\r | |
52 | //\r | |
9060e3ec | 53 | \r |
54 | //\r | |
7e242786 | 55 | // Read PMCSR\r |
9060e3ec | 56 | //\r |
7e242786 | 57 | Status = PciIoDevice->PciIo.Pci.Read (\r |
58 | &PciIoDevice->PciIo,\r | |
59 | EfiPciIoWidthUint16,\r | |
60 | PowerManagementRegBlock + 4,\r | |
61 | 1,\r | |
62 | &PowerManagementCSR\r | |
63 | );\r | |
64 | \r | |
65 | if (!EFI_ERROR (Status)) {\r | |
66 | //\r | |
67 | // Clear PME_Status bit\r | |
68 | //\r | |
69 | PowerManagementCSR |= BIT15;\r | |
70 | //\r | |
71 | // Clear PME_En bit. PowerState = D0.\r | |
72 | //\r | |
73 | PowerManagementCSR &= ~(BIT8 | BIT1 | BIT0);\r | |
74 | \r | |
75 | //\r | |
76 | // Write PMCSR\r | |
77 | //\r | |
78 | Status = PciIoDevice->PciIo.Pci.Write (\r | |
79 | &PciIoDevice->PciIo,\r | |
80 | EfiPciIoWidthUint16,\r | |
81 | PowerManagementRegBlock + 4,\r | |
82 | 1,\r | |
83 | &PowerManagementCSR\r | |
84 | );\r | |
85 | }\r | |
86 | return Status;\r | |
9060e3ec | 87 | }\r |
88 | \r |