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913cb9dc | 1 | /** @file\r |
2 | \r | |
ab6495ea | 3 | The definition for UHCI driver model and HC protocol routines.\r |
4 | \r | |
5a127aba | 5 | Copyright (c) 2004 - 2015, Intel Corporation. All rights reserved.<BR>\r |
cd5ebaa0 | 6 | This program and the accompanying materials\r |
913cb9dc | 7 | are licensed and made available under the terms and conditions of the BSD License\r |
8 | which accompanies this distribution. The full text of the license may be found at\r | |
9 | http://opensource.org/licenses/bsd-license.php\r | |
10 | \r | |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | \r | |
913cb9dc | 14 | **/\r |
15 | \r | |
ab6495ea | 16 | #ifndef _EFI_UHCI_H_\r |
17 | #define _EFI_UHCI_H_\r | |
913cb9dc | 18 | \r |
ed7748fe | 19 | \r |
60c93673 | 20 | #include <Uefi.h>\r |
ed7748fe | 21 | \r |
913cb9dc | 22 | #include <Protocol/Usb2HostController.h>\r |
23 | #include <Protocol/UsbHostController.h>\r | |
24 | #include <Protocol/PciIo.h>\r | |
ed7748fe | 25 | \r |
0428a6cb | 26 | #include <Guid/EventGroup.h>\r |
27 | \r | |
913cb9dc | 28 | #include <Library/DebugLib.h>\r |
29 | #include <Library/BaseMemoryLib.h>\r | |
30 | #include <Library/UefiDriverEntryPoint.h>\r | |
31 | #include <Library/UefiBootServicesTableLib.h>\r | |
32 | #include <Library/UefiLib.h>\r | |
33 | #include <Library/BaseLib.h>\r | |
34 | #include <Library/MemoryAllocationLib.h>\r | |
dd4047a5 | 35 | #include <Library/PcdLib.h>\r |
37623a5c | 36 | #include <Library/ReportStatusCodeLib.h>\r |
913cb9dc | 37 | \r |
a261044c | 38 | #include <IndustryStandard/Pci.h>\r |
913cb9dc | 39 | \r |
40 | typedef struct _USB_HC_DEV USB_HC_DEV;\r | |
41 | \r | |
42 | #include "UsbHcMem.h"\r | |
43 | #include "UhciQueue.h"\r | |
44 | #include "UhciReg.h"\r | |
45 | #include "UhciSched.h"\r | |
46 | #include "UhciDebug.h"\r | |
aa79b0b3 | 47 | #include "ComponentName.h"\r |
913cb9dc | 48 | \r |
1ccdbf2a | 49 | //\r |
50 | // UHC timeout experience values\r | |
51 | //\r | |
52 | \r | |
53 | #define UHC_1_MICROSECOND 1\r | |
54 | #define UHC_1_MILLISECOND (1000 * UHC_1_MICROSECOND)\r | |
55 | #define UHC_1_SECOND (1000 * UHC_1_MILLISECOND)\r | |
56 | \r | |
57 | //\r | |
58 | // UHCI register operation timeout, set by experience\r | |
59 | //\r | |
60 | #define UHC_GENERIC_TIMEOUT UHC_1_SECOND\r | |
61 | \r | |
62 | //\r | |
63 | // Wait for force global resume(FGR) complete, refers to\r | |
64 | // specification[UHCI11-2.1.1]\r | |
65 | //\r | |
66 | #define UHC_FORCE_GLOBAL_RESUME_STALL (20 * UHC_1_MILLISECOND)\r | |
68246fa8 | 67 | \r |
1ccdbf2a | 68 | //\r |
69 | // Wait for roothub port reset and recovery, reset stall\r | |
70 | // is set by experience, and recovery stall refers to\r | |
71 | // specification[UHCI11-2.1.1]\r | |
72 | //\r | |
73 | #define UHC_ROOT_PORT_RESET_STALL (50 * UHC_1_MILLISECOND)\r | |
74 | #define UHC_ROOT_PORT_RECOVERY_STALL (10 * UHC_1_MILLISECOND)\r | |
75 | \r | |
76 | //\r | |
77 | // Sync and Async transfer polling interval, set by experience,\r | |
78 | // and the unit of Async is 100us.\r | |
79 | //\r | |
80 | #define UHC_SYNC_POLL_INTERVAL (1 * UHC_1_MILLISECOND)\r | |
5a127aba | 81 | #define UHC_ASYNC_POLL_INTERVAL EFI_TIMER_PERIOD_MILLISECONDS(1)\r |
913cb9dc | 82 | \r |
ab6495ea | 83 | //\r |
84 | // UHC raises TPL to TPL_NOTIFY to serialize all its operations\r | |
85 | // to protect shared data structures.\r | |
86 | //\r | |
87 | #define UHCI_TPL TPL_NOTIFY\r | |
88 | \r | |
f3f2e05d | 89 | #define USB_HC_DEV_SIGNATURE SIGNATURE_32 ('u', 'h', 'c', 'i')\r |
913cb9dc | 90 | \r |
91 | #pragma pack(1)\r | |
92 | typedef struct {\r | |
1ccdbf2a | 93 | UINT8 ProgInterface;\r |
913cb9dc | 94 | UINT8 SubClassCode;\r |
95 | UINT8 BaseCode;\r | |
96 | } USB_CLASSC;\r | |
97 | #pragma pack()\r | |
98 | \r | |
913cb9dc | 99 | #define UHC_FROM_USB2_HC_PROTO(This) CR(This, USB_HC_DEV, Usb2Hc, USB_HC_DEV_SIGNATURE)\r |
100 | \r | |
101 | //\r | |
102 | // USB_HC_DEV support the UHCI hardware controller. It schedules\r | |
103 | // the asynchronous interrupt transfer with the same method as\r | |
104 | // EHCI: a reversed tree structure. For synchronous interrupt,\r | |
105 | // control and bulk transfer, it uses three static queue head to\r | |
106 | // schedule them. SyncIntQh is for interrupt transfer. LsCtrlQh is\r | |
107 | // for LOW speed control transfer, and FsCtrlBulkQh is for FULL\r | |
108 | // speed control or bulk transfer. This is because FULL speed contrl\r | |
109 | // or bulk transfer can reclaim the unused bandwidth. Some USB\r | |
110 | // device requires this bandwidth reclamation capability.\r | |
111 | //\r | |
c52fa98c | 112 | struct _USB_HC_DEV {\r |
913cb9dc | 113 | UINT32 Signature;\r |
913cb9dc | 114 | EFI_USB2_HC_PROTOCOL Usb2Hc;\r |
115 | EFI_PCI_IO_PROTOCOL *PciIo;\r | |
37623a5c | 116 | EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r |
68246fa8 | 117 | UINT64 OriginalPciAttributes;\r |
913cb9dc | 118 | \r |
119 | //\r | |
120 | // Schedule data structures\r | |
121 | //\r | |
aa91de05 | 122 | UINT32 *FrameBase; // the buffer pointed by this pointer is used to store pci bus address of the QH descriptor.\r |
123 | UINT32 *FrameBaseHostAddr; // the buffer pointed by this pointer is used to store host memory address of the QH descriptor.\r | |
913cb9dc | 124 | UHCI_QH_SW *SyncIntQh;\r |
125 | UHCI_QH_SW *CtrlQh;\r | |
126 | UHCI_QH_SW *BulkQh;\r | |
127 | \r | |
128 | //\r | |
129 | // Structures to maintain asynchronus interrupt transfers.\r | |
130 | // When asynchronous interrutp transfer is unlinked from\r | |
131 | // the frame list, the hardware may still hold a pointer\r | |
132 | // to it. To synchronize with hardware, its resoureces are\r | |
133 | // released in two steps using Recycle and RecycleWait.\r | |
134 | // Check the asynchronous interrupt management routines.\r | |
135 | //\r | |
136 | LIST_ENTRY AsyncIntList;\r | |
137 | EFI_EVENT AsyncIntMonitor;\r | |
138 | UHCI_ASYNC_REQUEST *Recycle;\r | |
139 | UHCI_ASYNC_REQUEST *RecycleWait;\r | |
140 | \r | |
141 | \r | |
142 | UINTN RootPorts;\r | |
143 | USBHC_MEM_POOL *MemPool;\r | |
144 | EFI_UNICODE_STRING_TABLE *CtrlNameTable;\r | |
145 | VOID *FrameMapping;\r | |
0428a6cb | 146 | \r |
147 | //\r | |
148 | // ExitBootServicesEvent is used to stop the EHC DMA operation \r | |
149 | // after exit boot service.\r | |
150 | //\r | |
151 | EFI_EVENT ExitBootServiceEvent;\r | |
c52fa98c | 152 | };\r |
913cb9dc | 153 | \r |
f527bce3 | 154 | extern EFI_DRIVER_BINDING_PROTOCOL gUhciDriverBinding;\r |
155 | extern EFI_COMPONENT_NAME_PROTOCOL gUhciComponentName;\r | |
156 | extern EFI_COMPONENT_NAME2_PROTOCOL gUhciComponentName2;\r | |
913cb9dc | 157 | \r |
aa79b0b3 | 158 | /**\r |
159 | Test to see if this driver supports ControllerHandle. Any\r | |
160 | ControllerHandle that has UsbHcProtocol installed will be supported.\r | |
161 | \r | |
162 | @param This Protocol instance pointer.\r | |
163 | @param Controller Handle of device to test.\r | |
164 | @param RemainingDevicePath Not used.\r | |
165 | \r | |
166 | @return EFI_SUCCESS This driver supports this device.\r | |
167 | @return EFI_UNSUPPORTED This driver does not support this device.\r | |
168 | \r | |
169 | **/\r | |
170 | EFI_STATUS\r | |
171 | EFIAPI\r | |
172 | UhciDriverBindingSupported (\r | |
173 | IN EFI_DRIVER_BINDING_PROTOCOL *This,\r | |
174 | IN EFI_HANDLE Controller,\r | |
175 | IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r | |
176 | );\r | |
177 | \r | |
178 | /**\r | |
179 | Starting the Usb UHCI Driver.\r | |
180 | \r | |
181 | @param This Protocol instance pointer.\r | |
182 | @param Controller Handle of device to test.\r | |
183 | @param RemainingDevicePath Not used.\r | |
184 | \r | |
185 | @retval EFI_SUCCESS This driver supports this device.\r | |
186 | @retval EFI_UNSUPPORTED This driver does not support this device.\r | |
187 | @retval EFI_DEVICE_ERROR This driver cannot be started due to device Error.\r | |
188 | EFI_OUT_OF_RESOURCES- Failed due to resource shortage.\r | |
189 | \r | |
190 | **/\r | |
191 | EFI_STATUS\r | |
192 | EFIAPI\r | |
193 | UhciDriverBindingStart (\r | |
194 | IN EFI_DRIVER_BINDING_PROTOCOL *This,\r | |
195 | IN EFI_HANDLE Controller,\r | |
196 | IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r | |
197 | );\r | |
198 | \r | |
199 | /**\r | |
ed356b9e | 200 | Stop this driver on ControllerHandle. Support stopping any child handles\r |
aa79b0b3 | 201 | created by this driver.\r |
202 | \r | |
203 | @param This Protocol instance pointer.\r | |
204 | @param Controller Handle of device to stop driver on.\r | |
205 | @param NumberOfChildren Number of Children in the ChildHandleBuffer.\r | |
206 | @param ChildHandleBuffer List of handles for the children we need to stop.\r | |
207 | \r | |
208 | @return EFI_SUCCESS\r | |
209 | @return others\r | |
210 | \r | |
211 | **/\r | |
212 | EFI_STATUS\r | |
213 | EFIAPI\r | |
214 | UhciDriverBindingStop (\r | |
215 | IN EFI_DRIVER_BINDING_PROTOCOL *This,\r | |
216 | IN EFI_HANDLE Controller,\r | |
217 | IN UINTN NumberOfChildren,\r | |
218 | IN EFI_HANDLE *ChildHandleBuffer\r | |
219 | );\r | |
220 | \r | |
913cb9dc | 221 | #endif\r |