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fb0b259e | 1 | /** @file\r |
2 | This file contains two sets of callback routines for undi3.0 and undi3.1.\r | |
3 | the callback routines for Undi3.1 have an extra parameter UniqueId which\r | |
4 | stores the interface context for the NIC that snp is trying to talk.\r | |
5 | \r | |
4cda7726 | 6 | Copyright (c) 2006 - 2008, Intel Corporation. <BR>\r |
5e7e4fad | 7 | All rights reserved. This program and the accompanying materials\r |
8 | are licensed and made available under the terms and conditions of the BSD License\r | |
9 | which accompanies this distribution. The full text of the license may be found at\r | |
10 | http://opensource.org/licenses/bsd-license.php\r | |
11 | \r | |
12 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
13 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
14 | \r | |
fb0b259e | 15 | **/\r |
5e7e4fad | 16 | \r |
17 | #include "Snp.h"\r | |
18 | \r | |
19 | //\r | |
20 | // Global variables\r | |
21 | // these 2 global variables are used only for 3.0 undi. we could not place\r | |
22 | // them in the snp structure because we will not know which snp structure\r | |
23 | // in the callback context!\r | |
24 | //\r | |
fe1e36e5 | 25 | BOOLEAN mInitializeLock = TRUE;\r |
26 | EFI_LOCK mLock;\r | |
5e7e4fad | 27 | \r |
28 | //\r | |
29 | // End Global variables\r | |
30 | //\r | |
4cda7726 | 31 | extern EFI_PCI_IO_PROTOCOL *mPciIo;\r |
5e7e4fad | 32 | \r |
f3816027 | 33 | /** \r |
34 | Convert a virtual or CPU address provided by SNP to a physical or device \r | |
35 | address. \r | |
36 | \r | |
37 | This is a callback routine supplied to UNDI at undi_start time. Since EFI uses\r | |
38 | the identical mapping, this routine returns the physical address same as the \r | |
39 | virtual address for most of the addresses. an address above 4GB cannot \r | |
40 | generally be used as a device address, it needs to be mapped to a lower \r | |
41 | physical address. This routine does not call the map routine itself, but it \r | |
42 | assumes that the mapping was done at the time of providing the address to \r | |
43 | UNDI. This routine just looks up the address in a map table (which is the v2p \r | |
44 | structure chain). \r | |
4cda7726 | 45 | \r |
f3816027 | 46 | @param CpuAddr Virtual address.\r |
47 | @param DeviceAddrPtr Pointer to the physical address, or 0 in case of any \r | |
48 | error.\r | |
4cda7726 | 49 | \r |
50 | **/\r | |
5e7e4fad | 51 | VOID\r |
4cda7726 | 52 | SnpUndi32CallbackV2p30 (\r |
5e7e4fad | 53 | IN UINT64 CpuAddr,\r |
54 | IN OUT UINT64 DeviceAddrPtr\r | |
55 | )\r | |
5e7e4fad | 56 | {\r |
4cda7726 | 57 | V2P *V2p;\r |
5e7e4fad | 58 | //\r |
59 | // Do nothing if virtual address is zero or physical pointer is NULL.\r | |
60 | // No need to map if the virtual address is within 4GB limit since\r | |
61 | // EFI uses identical mapping\r | |
62 | //\r | |
63 | if ((CpuAddr == 0) || (DeviceAddrPtr == 0)) {\r | |
9cff2f8d | 64 | DEBUG ((EFI_D_NET, "\nv2p: Null virtual address or physical pointer.\n"));\r |
5e7e4fad | 65 | return ;\r |
66 | }\r | |
67 | \r | |
68 | if (CpuAddr < FOUR_GIGABYTES) {\r | |
69 | *(UINT64 *) (UINTN) DeviceAddrPtr = CpuAddr;\r | |
70 | return ;\r | |
71 | }\r | |
72 | //\r | |
73 | // SNP creates a vaddr tp paddr mapping at the time of calling undi with any\r | |
74 | // big address, this callback routine just looks up in the v2p list and\r | |
75 | // returns the physical address for any given virtual address.\r | |
76 | //\r | |
4cda7726 | 77 | if (FindV2p (&V2p, (VOID *) (UINTN) CpuAddr) != EFI_SUCCESS) {\r |
5e7e4fad | 78 | *(UINT64 *) (UINTN) DeviceAddrPtr = CpuAddr;\r |
79 | } else {\r | |
4cda7726 | 80 | *(UINT64 *) (UINTN) DeviceAddrPtr = V2p->PhysicalAddress;\r |
5e7e4fad | 81 | }\r |
82 | }\r | |
83 | \r | |
4cda7726 | 84 | /**\r |
f3816027 | 85 | Acquire or release a lock of an exclusive access to a critical section of the\r |
86 | code/data. \r | |
87 | \r | |
4cda7726 | 88 | This is a callback routine supplied to UNDI at undi_start time.\r |
4cda7726 | 89 | \r |
f3816027 | 90 | @param Enable Non-zero indicates acquire; Zero indicates release.\r |
4cda7726 | 91 | \r |
92 | **/\r | |
5e7e4fad | 93 | VOID\r |
4cda7726 | 94 | SnpUndi32CallbackBlock30 (\r |
5e7e4fad | 95 | IN UINT32 Enable\r |
96 | )\r | |
5e7e4fad | 97 | {\r |
98 | //\r | |
99 | // tcpip was calling snp at tpl_notify and if we acquire a lock that was\r | |
100 | // created at a lower level (TPL_CALLBACK) it gives an assert!\r | |
101 | //\r | |
102 | if (mInitializeLock) {\r | |
103 | EfiInitializeLock (&mLock, TPL_NOTIFY);\r | |
104 | mInitializeLock = FALSE;\r | |
105 | }\r | |
106 | \r | |
107 | if (Enable != 0) {\r | |
108 | EfiAcquireLock (&mLock);\r | |
109 | } else {\r | |
110 | EfiReleaseLock (&mLock);\r | |
111 | }\r | |
112 | }\r | |
113 | \r | |
4cda7726 | 114 | /**\r |
f3816027 | 115 | Delay MicroSeconds of micro seconds.\r |
116 | \r | |
4cda7726 | 117 | This is a callback routine supplied to UNDI at undi_start time.\r |
4cda7726 | 118 | \r |
f3816027 | 119 | @param MicroSeconds Number of micro seconds to pause, ususlly multiple of 10.\r |
4cda7726 | 120 | \r |
121 | **/\r | |
5e7e4fad | 122 | VOID\r |
4cda7726 | 123 | SnpUndi32CallbackDelay30 (\r |
5e7e4fad | 124 | IN UINT64 MicroSeconds\r |
125 | )\r | |
5e7e4fad | 126 | {\r |
127 | if (MicroSeconds != 0) {\r | |
128 | gBS->Stall ((UINTN) MicroSeconds);\r | |
129 | }\r | |
130 | }\r | |
131 | \r | |
4cda7726 | 132 | /**\r |
f3816027 | 133 | IO routine for UNDI. \r |
134 | \r | |
135 | This is a callback routine supplied to UNDI at undi_start time. This is not \r | |
136 | currently being used by UNDI3.0 because Undi3.0 uses io/mem offsets relative \r | |
137 | to the beginning of the device io/mem address and so it needs to use the \r | |
138 | PCI_IO_FUNCTION that abstracts the start of the device's io/mem addresses. \r | |
139 | Since SNP cannot retrive the context of the undi3.0 interface it cannot use \r | |
140 | the PCI_IO_FUNCTION that specific for that NIC and uses one global IO \r | |
141 | functions structure, this does not work. This however works fine for EFI1.0 \r | |
142 | Undis because they use absolute addresses for io/mem access. \r | |
143 | \r | |
144 | @param ReadOrWrite Indicates read or write, IO or Memory.\r | |
145 | @param NumBytes Number of bytes to read or write.\r | |
146 | @param Address IO or memory address to read from or write to.\r | |
147 | @param BufferAddr Memory location to read into or that contains the bytes to\r | |
148 | write.\r | |
4cda7726 | 149 | \r |
150 | **/\r | |
5e7e4fad | 151 | VOID\r |
4cda7726 | 152 | SnpUndi32CallbackMemio30 (\r |
5e7e4fad | 153 | IN UINT8 ReadOrWrite,\r |
154 | IN UINT8 NumBytes,\r | |
155 | IN UINT64 Address,\r | |
156 | IN OUT UINT64 BufferAddr\r | |
157 | )\r | |
5e7e4fad | 158 | {\r |
159 | EFI_PCI_IO_PROTOCOL_WIDTH Width;\r | |
160 | \r | |
161 | switch (NumBytes) {\r | |
162 | case 2:\r | |
163 | Width = (EFI_PCI_IO_PROTOCOL_WIDTH) 1;\r | |
164 | break;\r | |
165 | \r | |
166 | case 4:\r | |
167 | Width = (EFI_PCI_IO_PROTOCOL_WIDTH) 2;\r | |
168 | break;\r | |
169 | \r | |
170 | case 8:\r | |
171 | Width = (EFI_PCI_IO_PROTOCOL_WIDTH) 3;\r | |
172 | break;\r | |
173 | \r | |
174 | default:\r | |
175 | Width = (EFI_PCI_IO_PROTOCOL_WIDTH) 0;\r | |
176 | }\r | |
177 | \r | |
178 | switch (ReadOrWrite) {\r | |
179 | case PXE_IO_READ:\r | |
4cda7726 | 180 | mPciIo->Io.Read (\r |
181 | mPciIo,\r | |
182 | Width,\r | |
183 | 1, // BAR 1, IO base address\r | |
184 | Address,\r | |
185 | 1, // count\r | |
186 | (VOID *) (UINTN) BufferAddr\r | |
187 | );\r | |
5e7e4fad | 188 | break;\r |
189 | \r | |
190 | case PXE_IO_WRITE:\r | |
4cda7726 | 191 | mPciIo->Io.Write (\r |
192 | mPciIo,\r | |
193 | Width,\r | |
194 | 1, // BAR 1, IO base address\r | |
195 | Address,\r | |
196 | 1, // count\r | |
197 | (VOID *) (UINTN) BufferAddr\r | |
198 | );\r | |
5e7e4fad | 199 | break;\r |
200 | \r | |
201 | case PXE_MEM_READ:\r | |
4cda7726 | 202 | mPciIo->Mem.Read (\r |
203 | mPciIo,\r | |
204 | Width,\r | |
205 | 0, // BAR 0, Memory base address\r | |
206 | Address,\r | |
207 | 1, // count\r | |
208 | (VOID *) (UINTN) BufferAddr\r | |
209 | );\r | |
5e7e4fad | 210 | break;\r |
211 | \r | |
212 | case PXE_MEM_WRITE:\r | |
4cda7726 | 213 | mPciIo->Mem.Write (\r |
214 | mPciIo,\r | |
215 | Width,\r | |
216 | 0, // BAR 0, Memory base address\r | |
217 | Address,\r | |
218 | 1, // count\r | |
219 | (VOID *) (UINTN) BufferAddr\r | |
220 | );\r | |
5e7e4fad | 221 | break;\r |
222 | }\r | |
223 | \r | |
224 | return ;\r | |
225 | }\r | |
4cda7726 | 226 | \r |
227 | /**\r | |
f3816027 | 228 | Acquire or release a lock of the exclusive access to a critical section of the \r |
229 | code/data. \r | |
230 | \r | |
4cda7726 | 231 | This is a callback routine supplied to UNDI3.1 at undi_start time.\r |
f3816027 | 232 | New callbacks for 3.1: there won't be a virtual2physical callback for UNDI 3.1\r |
233 | because undi3.1 uses the MemMap call to map the required address by itself! \r | |
4cda7726 | 234 | \r |
235 | @param UniqueId This was supplied to UNDI at Undi_Start, SNP uses this to \r | |
f3816027 | 236 | store Undi interface context (Undi does not read or write\r |
237 | this variable).\r | |
238 | @param Enable Non-zero indicates acquire; Zero indicates release. \r | |
239 | \r | |
4cda7726 | 240 | **/\r |
5e7e4fad | 241 | VOID\r |
4cda7726 | 242 | SnpUndi32CallbackBlock (\r |
5e7e4fad | 243 | IN UINT64 UniqueId,\r |
244 | IN UINT32 Enable\r | |
245 | )\r | |
5e7e4fad | 246 | {\r |
4cda7726 | 247 | SNP_DRIVER *Snp;\r |
5e7e4fad | 248 | \r |
4cda7726 | 249 | Snp = (SNP_DRIVER *) (UINTN) UniqueId;\r |
5e7e4fad | 250 | //\r |
251 | // tcpip was calling snp at tpl_notify and when we acquire a lock that was\r | |
252 | // created at a lower level (TPL_CALLBACK) it gives an assert!\r | |
253 | //\r | |
254 | if (Enable != 0) {\r | |
4cda7726 | 255 | EfiAcquireLock (&Snp->Lock);\r |
5e7e4fad | 256 | } else {\r |
4cda7726 | 257 | EfiReleaseLock (&Snp->Lock);\r |
5e7e4fad | 258 | }\r |
259 | }\r | |
260 | \r | |
4cda7726 | 261 | /**\r |
f3816027 | 262 | Delay MicroSeconds of micro seconds.\r |
263 | \r | |
4cda7726 | 264 | This is a callback routine supplied to UNDI at undi_start time.\r |
4cda7726 | 265 | \r |
266 | @param UniqueId This was supplied to UNDI at Undi_Start, SNP uses this to\r | |
f3816027 | 267 | store Undi interface context (Undi does not read or write\r |
268 | this variable).\r | |
269 | @param MicroSeconds Number of micro seconds to pause, ususlly multiple of 10. \r | |
270 | \r | |
4cda7726 | 271 | **/\r |
5e7e4fad | 272 | VOID\r |
4cda7726 | 273 | SnpUndi32CallbackDelay (\r |
5e7e4fad | 274 | IN UINT64 UniqueId,\r |
275 | IN UINT64 MicroSeconds\r | |
276 | )\r | |
5e7e4fad | 277 | {\r |
278 | if (MicroSeconds != 0) {\r | |
279 | gBS->Stall ((UINTN) MicroSeconds);\r | |
280 | }\r | |
281 | }\r | |
282 | \r | |
4cda7726 | 283 | /**\r |
f3816027 | 284 | IO routine for UNDI3.1. \r |
285 | \r | |
4cda7726 | 286 | This is a callback routine supplied to UNDI at undi_start time.\r |
f3816027 | 287 | \r |
4cda7726 | 288 | @param UniqueId This was supplied to UNDI at Undi_Start, SNP uses this \r |
f3816027 | 289 | to store Undi interface context (Undi does not read or\r |
290 | write this variable).\r | |
291 | @param ReadOrWrite Indicates read or write, IO or Memory.\r | |
292 | @param NumBytes Number of bytes to read or write.\r | |
4cda7726 | 293 | @param MemOrPortAddr IO or memory address to read from or write to.\r |
f3816027 | 294 | @param BufferPtr Memory location to read into or that contains the bytes\r |
295 | to write.\r | |
296 | \r | |
4cda7726 | 297 | **/\r |
5e7e4fad | 298 | VOID\r |
4cda7726 | 299 | SnpUndi32CallbackMemio (\r |
300 | IN UINT64 UniqueId,\r | |
301 | IN UINT8 ReadOrWrite,\r | |
302 | IN UINT8 NumBytes,\r | |
303 | IN UINT64 MemOrPortAddr,\r | |
304 | IN OUT UINT64 BufferPtr\r | |
5e7e4fad | 305 | )\r |
5e7e4fad | 306 | {\r |
4cda7726 | 307 | SNP_DRIVER *Snp;\r |
5e7e4fad | 308 | EFI_PCI_IO_PROTOCOL_WIDTH Width;\r |
309 | \r | |
4cda7726 | 310 | Snp = (SNP_DRIVER *) (UINTN) UniqueId;\r |
5e7e4fad | 311 | \r |
312 | Width = (EFI_PCI_IO_PROTOCOL_WIDTH) 0;\r | |
313 | switch (NumBytes) {\r | |
314 | case 2:\r | |
315 | Width = (EFI_PCI_IO_PROTOCOL_WIDTH) 1;\r | |
316 | break;\r | |
317 | \r | |
318 | case 4:\r | |
319 | Width = (EFI_PCI_IO_PROTOCOL_WIDTH) 2;\r | |
320 | break;\r | |
321 | \r | |
322 | case 8:\r | |
323 | Width = (EFI_PCI_IO_PROTOCOL_WIDTH) 3;\r | |
324 | break;\r | |
325 | }\r | |
326 | \r | |
327 | switch (ReadOrWrite) {\r | |
328 | case PXE_IO_READ:\r | |
4cda7726 | 329 | Snp->PciIo->Io.Read (\r |
330 | Snp->PciIo,\r | |
331 | Width,\r | |
332 | Snp->IoBarIndex, // BAR 1 (for 32bit regs), IO base address\r | |
333 | MemOrPortAddr,\r | |
334 | 1, // count\r | |
335 | (VOID *) (UINTN) BufferPtr\r | |
336 | );\r | |
5e7e4fad | 337 | break;\r |
338 | \r | |
339 | case PXE_IO_WRITE:\r | |
4cda7726 | 340 | Snp->PciIo->Io.Write (\r |
341 | Snp->PciIo,\r | |
342 | Width,\r | |
343 | Snp->IoBarIndex, // BAR 1 (for 32bit regs), IO base address\r | |
344 | MemOrPortAddr,\r | |
345 | 1, // count\r | |
346 | (VOID *) (UINTN) BufferPtr\r | |
347 | );\r | |
5e7e4fad | 348 | break;\r |
349 | \r | |
350 | case PXE_MEM_READ:\r | |
4cda7726 | 351 | Snp->PciIo->Mem.Read (\r |
352 | Snp->PciIo,\r | |
5e7e4fad | 353 | Width,\r |
4cda7726 | 354 | Snp->MemoryBarIndex, // BAR 0, Memory base address\r |
355 | MemOrPortAddr,\r | |
5e7e4fad | 356 | 1, // count\r |
4cda7726 | 357 | (VOID *) (UINTN) BufferPtr\r |
5e7e4fad | 358 | );\r |
359 | break;\r | |
360 | \r | |
361 | case PXE_MEM_WRITE:\r | |
4cda7726 | 362 | Snp->PciIo->Mem.Write (\r |
363 | Snp->PciIo,\r | |
5e7e4fad | 364 | Width,\r |
4cda7726 | 365 | Snp->MemoryBarIndex, // BAR 0, Memory base address\r |
366 | MemOrPortAddr,\r | |
5e7e4fad | 367 | 1, // count\r |
4cda7726 | 368 | (VOID *) (UINTN) BufferPtr\r |
5e7e4fad | 369 | );\r |
370 | break;\r | |
371 | }\r | |
372 | \r | |
373 | return ;\r | |
374 | }\r | |
375 | \r | |
4cda7726 | 376 | /**\r |
f3816027 | 377 | Map a CPU address to a device address. \r |
378 | \r | |
4cda7726 | 379 | This is a callback routine supplied to UNDI at undi_start time.\r |
4cda7726 | 380 | \r |
f3816027 | 381 | @param UniqueId This was supplied to UNDI at Undi_Start, SNP uses this to\r |
382 | store Undi interface context (Undi does not read or write\r | |
383 | this variable).\r | |
384 | @param CpuAddr Virtual address to be mapped.\r | |
385 | @param NumBytes Size of memory to be mapped.\r | |
386 | @param Direction Direction of data flow for this memory's usage:\r | |
387 | cpu->device, device->cpu or both ways.\r | |
388 | @param DeviceAddrPtr Pointer to return the mapped device address.\r | |
4cda7726 | 389 | \r |
390 | **/\r | |
5e7e4fad | 391 | VOID\r |
4cda7726 | 392 | SnpUndi32CallbackMap (\r |
5e7e4fad | 393 | IN UINT64 UniqueId,\r |
394 | IN UINT64 CpuAddr,\r | |
395 | IN UINT32 NumBytes,\r | |
396 | IN UINT32 Direction,\r | |
397 | IN OUT UINT64 DeviceAddrPtr\r | |
398 | )\r | |
5e7e4fad | 399 | {\r |
400 | EFI_PHYSICAL_ADDRESS *DevAddrPtr;\r | |
401 | EFI_PCI_IO_PROTOCOL_OPERATION DirectionFlag;\r | |
402 | UINTN BuffSize;\r | |
4cda7726 | 403 | SNP_DRIVER *Snp;\r |
5e7e4fad | 404 | UINTN Index;\r |
405 | EFI_STATUS Status;\r | |
406 | \r | |
407 | BuffSize = (UINTN) NumBytes;\r | |
4cda7726 | 408 | Snp = (SNP_DRIVER *) (UINTN) UniqueId;\r |
5e7e4fad | 409 | DevAddrPtr = (EFI_PHYSICAL_ADDRESS *) (UINTN) DeviceAddrPtr;\r |
410 | \r | |
411 | if (CpuAddr == 0) {\r | |
412 | *DevAddrPtr = 0;\r | |
413 | return ;\r | |
414 | }\r | |
415 | \r | |
416 | switch (Direction) {\r | |
417 | case TO_AND_FROM_DEVICE:\r | |
418 | DirectionFlag = EfiPciIoOperationBusMasterCommonBuffer;\r | |
419 | break;\r | |
420 | \r | |
421 | case FROM_DEVICE:\r | |
422 | DirectionFlag = EfiPciIoOperationBusMasterWrite;\r | |
423 | break;\r | |
424 | \r | |
425 | case TO_DEVICE:\r | |
426 | DirectionFlag = EfiPciIoOperationBusMasterRead;\r | |
427 | break;\r | |
428 | \r | |
429 | default:\r | |
430 | *DevAddrPtr = 0;\r | |
431 | //\r | |
432 | // any non zero indicates error!\r | |
433 | //\r | |
434 | return ;\r | |
435 | }\r | |
436 | //\r | |
437 | // find an unused map_list entry\r | |
438 | //\r | |
439 | for (Index = 0; Index < MAX_MAP_LENGTH; Index++) {\r | |
4cda7726 | 440 | if (Snp->MapList[Index].VirtualAddress == 0) {\r |
5e7e4fad | 441 | break;\r |
442 | }\r | |
443 | }\r | |
444 | \r | |
445 | if (Index >= MAX_MAP_LENGTH) {\r | |
446 | DEBUG ((EFI_D_INFO, "SNP maplist is FULL\n"));\r | |
447 | *DevAddrPtr = 0;\r | |
448 | return ;\r | |
449 | }\r | |
450 | \r | |
4cda7726 | 451 | Snp->MapList[Index].VirtualAddress = (EFI_PHYSICAL_ADDRESS) CpuAddr;\r |
5e7e4fad | 452 | \r |
4cda7726 | 453 | Status = Snp->PciIo->Map (\r |
454 | Snp->PciIo,\r | |
455 | DirectionFlag,\r | |
456 | (VOID *) (UINTN) CpuAddr,\r | |
457 | &BuffSize,\r | |
458 | DevAddrPtr,\r | |
459 | &(Snp->MapList[Index].MapCookie)\r | |
460 | );\r | |
5e7e4fad | 461 | if (Status != EFI_SUCCESS) {\r |
4cda7726 | 462 | *DevAddrPtr = 0;\r |
463 | Snp->MapList[Index].VirtualAddress = 0;\r | |
5e7e4fad | 464 | }\r |
465 | \r | |
466 | return ;\r | |
467 | }\r | |
468 | \r | |
4cda7726 | 469 | /**\r |
f3816027 | 470 | Unmap an address that was previously mapped using map callback. \r |
471 | \r | |
4cda7726 | 472 | This is a callback routine supplied to UNDI at undi_start time.\r |
4cda7726 | 473 | \r |
f3816027 | 474 | @param UniqueId This was supplied to UNDI at Undi_Start, SNP uses this to \r |
475 | store. Undi interface context (Undi does not read or write\r | |
476 | this variable).\r | |
477 | @param CpuAddr Virtual address that was mapped.\r | |
478 | @param NumBytes Size of memory mapped.\r | |
479 | @param Direction Direction of data flow for this memory's usage: \r | |
480 | cpu->device, device->cpu or both ways.\r | |
481 | @param DeviceAddr The mapped device address.\r | |
4cda7726 | 482 | \r |
483 | **/\r | |
5e7e4fad | 484 | VOID\r |
4cda7726 | 485 | SnpUndi32CallbackUnmap (\r |
5e7e4fad | 486 | IN UINT64 UniqueId,\r |
487 | IN UINT64 CpuAddr,\r | |
488 | IN UINT32 NumBytes,\r | |
489 | IN UINT32 Direction,\r | |
490 | IN UINT64 DeviceAddr\r | |
491 | )\r | |
5e7e4fad | 492 | {\r |
4cda7726 | 493 | SNP_DRIVER *Snp;\r |
5e7e4fad | 494 | UINT16 Index;\r |
495 | \r | |
4cda7726 | 496 | Snp = (SNP_DRIVER *) (UINTN) UniqueId;\r |
5e7e4fad | 497 | \r |
498 | for (Index = 0; Index < MAX_MAP_LENGTH; Index++) {\r | |
4cda7726 | 499 | if (Snp->MapList[Index].VirtualAddress == CpuAddr) {\r |
5e7e4fad | 500 | break;\r |
501 | }\r | |
502 | }\r | |
503 | \r | |
f3816027 | 504 | if (Index >= MAX_MAP_LENGTH) {\r |
5e7e4fad | 505 | DEBUG ((EFI_D_ERROR, "SNP could not find a mapping, failed to unmap.\n"));\r |
506 | return ;\r | |
507 | }\r | |
508 | \r | |
4cda7726 | 509 | Snp->PciIo->Unmap (Snp->PciIo, Snp->MapList[Index].MapCookie);\r |
510 | Snp->MapList[Index].VirtualAddress = 0;\r | |
511 | Snp->MapList[Index].MapCookie = NULL;\r | |
5e7e4fad | 512 | return ;\r |
513 | }\r | |
514 | \r | |
f3816027 | 515 | /** \r |
516 | Synchronize the virtual buffer contents with the mapped buffer contents. \r | |
517 | \r | |
518 | This is a callback routine supplied to UNDI at undi_start time. The virtual\r | |
519 | and mapped buffers need not correspond to the same physical memory (especially \r | |
520 | if the virtual address is > 4GB). Depending on the direction for which the \r | |
521 | buffer is mapped, undi will need to synchronize their contents whenever it \r | |
522 | writes to/reads from the buffer using either the cpu address or the device \r | |
523 | address. \r | |
524 | EFI does not provide a sync call since virt=physical, we should just do the \r | |
525 | synchronization ourselves here. \r | |
526 | \r | |
527 | @param UniqueId This was supplied to UNDI at Undi_Start, SNP uses this to \r | |
528 | store Undi interface context (Undi does not read or write\r | |
529 | this variable).\r | |
530 | @param CpuAddr Virtual address that was mapped.\r | |
531 | @param NumBytes Size of memory mapped.\r | |
532 | @param Direction Direction of data flow for this memory's usage:\r | |
4cda7726 | 533 | cpu->device, device->cpu or both ways.\r |
f3816027 | 534 | @param DeviceAddr The mapped device address.\r |
4cda7726 | 535 | \r |
536 | **/\r | |
5e7e4fad | 537 | VOID\r |
4cda7726 | 538 | SnpUndi32CallbackSync (\r |
539 | IN UINT64 UniqueId,\r | |
540 | IN UINT64 CpuAddr,\r | |
541 | IN UINT32 NumBytes,\r | |
542 | IN UINT32 Direction,\r | |
543 | IN UINT64 DeviceAddr\r | |
5e7e4fad | 544 | )\r |
5e7e4fad | 545 | {\r |
546 | if ((CpuAddr == 0) || (DeviceAddr == 0) || (NumBytes == 0)) {\r | |
547 | return ;\r | |
548 | \r | |
549 | }\r | |
550 | \r | |
551 | switch (Direction) {\r | |
552 | case FROM_DEVICE:\r | |
553 | CopyMem ((UINT8 *) (UINTN) CpuAddr, (UINT8 *) (UINTN) DeviceAddr, NumBytes);\r | |
554 | break;\r | |
555 | \r | |
556 | case TO_DEVICE:\r | |
557 | CopyMem ((UINT8 *) (UINTN) DeviceAddr, (UINT8 *) (UINTN) CpuAddr, NumBytes);\r | |
558 | break;\r | |
559 | }\r | |
560 | \r | |
561 | return ;\r | |
562 | }\r |