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878ddf1f | 1 | /** @file\r |
2 | This file declares PciCfg PPI used to access PCI configuration space in PEI\r | |
3 | \r | |
4 | Copyright (c) 2006, Intel Corporation \r | |
5 | All rights reserved. This program and the accompanying materials \r | |
6 | are licensed and made available under the terms and conditions of the BSD License \r | |
7 | which accompanies this distribution. The full text of the license may be found at \r | |
8 | http://opensource.org/licenses/bsd-license.php \r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
12 | \r | |
13 | Module Name: PciCfg.h\r | |
14 | \r | |
15 | @par Revision Reference:\r | |
16 | This PPI is defined in PEI CIS\r | |
17 | Version 0.91.\r | |
18 | \r | |
19 | **/\r | |
20 | \r | |
21 | #ifndef __PEI_PCI_CFG_H__\r | |
22 | #define __PEI_PCI_CFG_H__\r | |
23 | \r | |
24 | #define EFI_PEI_PCI_CFG_PPI_INSTALLED_GUID \\r | |
25 | { \\r | |
26 | 0xe1f2eba0, 0xf7b9, 0x4a26, {0x86, 0x20, 0x13, 0x12, 0x21, 0x64, 0x2a, 0x90 } \\r | |
27 | }\r | |
28 | \r | |
29 | typedef struct _EFI_PEI_PCI_CFG_PPI EFI_PEI_PCI_CFG_PPI;\r | |
30 | \r | |
31 | #define PEI_PCI_CFG_ADDRESS(bus, dev, func, reg) ( \\r | |
32 | (UINT64) ((((UINTN) bus) << 24) + (((UINTN) dev) << 16) + (((UINTN) func) << 8) + ((UINTN) reg)) \\r | |
33 | ) & 0x00000000ffffffff\r | |
34 | \r | |
35 | typedef enum {\r | |
36 | EfiPeiPciCfgWidthUint8 = 0,\r | |
37 | EfiPeiPciCfgWidthUint16 = 1,\r | |
38 | EfiPeiPciCfgWidthUint32 = 2,\r | |
39 | EfiPeiPciCfgWidthUint64 = 3,\r | |
40 | EfiPeiPciCfgWidthMaximum\r | |
41 | } EFI_PEI_PCI_CFG_PPI_WIDTH;\r | |
42 | \r | |
43 | typedef struct {\r | |
44 | UINT8 Register;\r | |
45 | UINT8 Function;\r | |
46 | UINT8 Device;\r | |
47 | UINT8 Bus;\r | |
48 | UINT8 Reserved[4];\r | |
49 | } EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS;\r | |
50 | \r | |
51 | /**\r | |
52 | PCI read and write operation.\r | |
53 | \r | |
0647c9ad LG |
54 | @param PeiServices An indirect pointer to the PEI Services Table\r |
55 | published by the PEI Foundation.\r | |
56 | @param This Pointer to local data for the interface.\r | |
57 | @param Width The width of the access. Enumerated in bytes.\r | |
58 | @param Address The physical address of the access.\r | |
59 | @param Buffer A pointer to the buffer of data.\r | |
60 | \r | |
61 | @retval EFI_SUCCESS The function completed successfully.\r | |
878ddf1f | 62 | @retval EFI_NOT_YET_AVAILABLE The service has not been installed.\r |
63 | \r | |
64 | **/\r | |
65 | typedef\r | |
66 | EFI_STATUS\r | |
67 | (EFIAPI *EFI_PEI_PCI_CFG_PPI_IO) (\r | |
68 | IN EFI_PEI_SERVICES **PeiServices,\r | |
69 | IN EFI_PEI_PCI_CFG_PPI *This,\r | |
70 | IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r | |
71 | IN UINT64 Address,\r | |
72 | IN OUT VOID *Buffer\r | |
73 | );\r | |
74 | \r | |
75 | /**\r | |
76 | PCI read-modify-write operation.\r | |
77 | \r | |
0647c9ad LG |
78 | @param PeiServices An indirect pointer to the PEI Services Table\r |
79 | published by the PEI Foundation.\r | |
80 | @param This Pointer to local data for the interface.\r | |
81 | @param Width The width of the access. Enumerated in bytes.\r | |
82 | @param Address The physical address of the access.\r | |
83 | @param SetBits Value of the bits to set.\r | |
84 | @param ClearBits Value of the bits to clear.\r | |
85 | \r | |
86 | @retval EFI_SUCCESS The function completed successfully.\r | |
878ddf1f | 87 | \r |
88 | **/\r | |
89 | typedef\r | |
90 | EFI_STATUS\r | |
91 | (EFIAPI *EFI_PEI_PCI_CFG_PPI_RW) (\r | |
92 | IN EFI_PEI_SERVICES **PeiServices,\r | |
93 | IN EFI_PEI_PCI_CFG_PPI *This,\r | |
94 | IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r | |
95 | IN UINT64 Address,\r | |
96 | IN UINTN SetBits,\r | |
97 | IN UINTN ClearBits\r | |
98 | );\r | |
99 | \r | |
100 | /**\r | |
101 | @par Ppi Description:\r | |
102 | The EFI_PEI_PCI_CFG_PPI interfaces are used to abstract accesses to PCI \r | |
103 | controllers behind a PCI root bridge controller.\r | |
104 | \r | |
105 | @param Read\r | |
106 | PCI read services. See the Read() function description.\r | |
107 | \r | |
108 | @param Write\r | |
109 | PCI write services. See the Write() function description.\r | |
110 | \r | |
111 | @param Modify\r | |
0647c9ad | 112 | PCI read-modify-write services. See the Modify() function description.\r |
878ddf1f | 113 | \r |
114 | **/\r | |
115 | struct _EFI_PEI_PCI_CFG_PPI {\r | |
116 | EFI_PEI_PCI_CFG_PPI_IO Read;\r | |
117 | EFI_PEI_PCI_CFG_PPI_IO Write;\r | |
118 | EFI_PEI_PCI_CFG_PPI_RW Modify;\r | |
119 | };\r | |
120 | \r | |
121 | extern EFI_GUID gEfiPciCfgPpiInServiceTableGuid;\r | |
122 | \r | |
123 | #endif\r |