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9095d37b LG |
1 | #\r |
2 | # Copyright (c) 2014-2018, Linaro Limited. All rights reserved.\r | |
3 | #\r | |
9344f092 | 4 | # SPDX-License-Identifier: BSD-2-Clause-Patent\r |
9095d37b LG |
5 | #\r |
6 | #\r | |
7 | \r | |
8 | GCC_ASM_EXPORT(MmioRead8Internal)\r | |
9 | GCC_ASM_EXPORT(MmioWrite8Internal)\r | |
10 | GCC_ASM_EXPORT(MmioRead16Internal)\r | |
11 | GCC_ASM_EXPORT(MmioWrite16Internal)\r | |
12 | GCC_ASM_EXPORT(MmioRead32Internal)\r | |
13 | GCC_ASM_EXPORT(MmioWrite32Internal)\r | |
14 | GCC_ASM_EXPORT(MmioRead64Internal)\r | |
15 | GCC_ASM_EXPORT(MmioWrite64Internal)\r | |
16 | \r | |
17 | //\r | |
18 | // Reads an 8-bit MMIO register.\r | |
19 | //\r | |
20 | // Reads the 8-bit MMIO register specified by Address. The 8-bit read value is\r | |
21 | // returned. This function must guarantee that all MMIO read and write\r | |
22 | // operations are serialized.\r | |
23 | //\r | |
24 | // @param Address The MMIO register to read.\r | |
25 | //\r | |
26 | // @return The value read.\r | |
27 | //\r | |
28 | ASM_PFX(MmioRead8Internal):\r | |
29 | ldrb r0, [r0]\r | |
30 | dmb\r | |
31 | bx lr\r | |
32 | \r | |
33 | //\r | |
34 | // Writes an 8-bit MMIO register.\r | |
35 | //\r | |
36 | // Writes the 8-bit MMIO register specified by Address with the value specified\r | |
37 | // by Value and returns Value. This function must guarantee that all MMIO read\r | |
38 | // and write operations are serialized.\r | |
39 | //\r | |
40 | // @param Address The MMIO register to write.\r | |
41 | // @param Value The value to write to the MMIO register.\r | |
42 | //\r | |
43 | ASM_PFX(MmioWrite8Internal):\r | |
44 | dmb st\r | |
45 | strb r1, [r0]\r | |
46 | bx lr\r | |
47 | \r | |
48 | //\r | |
49 | // Reads a 16-bit MMIO register.\r | |
50 | //\r | |
51 | // Reads the 16-bit MMIO register specified by Address. The 16-bit read value is\r | |
52 | // returned. This function must guarantee that all MMIO read and write\r | |
53 | // operations are serialized.\r | |
54 | //\r | |
55 | // @param Address The MMIO register to read.\r | |
56 | //\r | |
57 | // @return The value read.\r | |
58 | //\r | |
59 | ASM_PFX(MmioRead16Internal):\r | |
60 | ldrh r0, [r0]\r | |
61 | dmb\r | |
62 | bx lr\r | |
63 | \r | |
64 | //\r | |
65 | // Writes a 16-bit MMIO register.\r | |
66 | //\r | |
67 | // Writes the 16-bit MMIO register specified by Address with the value specified\r | |
68 | // by Value and returns Value. This function must guarantee that all MMIO read\r | |
69 | // and write operations are serialized.\r | |
70 | //\r | |
71 | // @param Address The MMIO register to write.\r | |
72 | // @param Value The value to write to the MMIO register.\r | |
73 | //\r | |
74 | ASM_PFX(MmioWrite16Internal):\r | |
75 | dmb st\r | |
76 | strh r1, [r0]\r | |
77 | bx lr\r | |
78 | \r | |
79 | //\r | |
80 | // Reads a 32-bit MMIO register.\r | |
81 | //\r | |
82 | // Reads the 32-bit MMIO register specified by Address. The 32-bit read value is\r | |
83 | // returned. This function must guarantee that all MMIO read and write\r | |
84 | // operations are serialized.\r | |
85 | //\r | |
86 | // @param Address The MMIO register to read.\r | |
87 | //\r | |
88 | // @return The value read.\r | |
89 | //\r | |
90 | ASM_PFX(MmioRead32Internal):\r | |
91 | ldr r0, [r0]\r | |
92 | dmb\r | |
93 | bx lr\r | |
94 | \r | |
95 | //\r | |
96 | // Writes a 32-bit MMIO register.\r | |
97 | //\r | |
98 | // Writes the 32-bit MMIO register specified by Address with the value specified\r | |
99 | // by Value and returns Value. This function must guarantee that all MMIO read\r | |
100 | // and write operations are serialized.\r | |
101 | //\r | |
102 | // @param Address The MMIO register to write.\r | |
103 | // @param Value The value to write to the MMIO register.\r | |
104 | //\r | |
105 | ASM_PFX(MmioWrite32Internal):\r | |
106 | dmb st\r | |
107 | str r1, [r0]\r | |
108 | bx lr\r | |
109 | \r | |
110 | //\r | |
111 | // Reads a 64-bit MMIO register.\r | |
112 | //\r | |
113 | // Reads the 64-bit MMIO register specified by Address. The 64-bit read value is\r | |
114 | // returned. This function must guarantee that all MMIO read and write\r | |
115 | // operations are serialized.\r | |
116 | //\r | |
117 | // @param Address The MMIO register to read.\r | |
118 | //\r | |
119 | // @return The value read.\r | |
120 | //\r | |
121 | ASM_PFX(MmioRead64Internal):\r | |
9cabe9d4 AB |
122 | ldr r1, [r0, #4]\r |
123 | ldr r0, [r0]\r | |
9095d37b LG |
124 | dmb\r |
125 | bx lr\r | |
126 | \r | |
127 | //\r | |
128 | // Writes a 64-bit MMIO register.\r | |
129 | //\r | |
130 | // Writes the 64-bit MMIO register specified by Address with the value specified\r | |
131 | // by Value and returns Value. This function must guarantee that all MMIO read\r | |
132 | // and write operations are serialized.\r | |
133 | //\r | |
134 | // @param Address The MMIO register to write.\r | |
135 | // @param Value The value to write to the MMIO register.\r | |
136 | //\r | |
137 | ASM_PFX(MmioWrite64Internal):\r | |
138 | dmb st\r | |
9cabe9d4 AB |
139 | str r2, [r0]\r |
140 | str r3, [r0, #4]\r | |
9095d37b | 141 | bx lr\r |