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878afe6b | 1 | /** @file\r |
2 | Base Library CPU functions for Itanium\r | |
3 | \r | |
4 | Copyright (c) 2006, Intel Corporation<BR>\r | |
5 | All rights reserved. This program and the accompanying materials\r | |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | **/\r | |
14 | \r | |
1efcc4ae | 15 | \r |
47fc17d8 | 16 | #include "BaseLibInternals.h"\r |
878afe6b | 17 | \r |
18 | #pragma intrinsic (_enable)\r | |
19 | #pragma intrinsic (_disable)\r | |
20 | #pragma intrinsic (__break)\r | |
21 | #pragma intrinsic (__mfa)\r | |
22 | \r | |
23 | /**\r | |
24 | Generates a breakpoint on the CPU.\r | |
25 | \r | |
26 | Generates a breakpoint on the CPU. The breakpoint must be implemented such\r | |
27 | that code can resume normal execution after the breakpoint.\r | |
28 | \r | |
29 | **/\r | |
30 | VOID\r | |
31 | EFIAPI\r | |
32 | CpuBreakpoint (\r | |
33 | VOID\r | |
34 | )\r | |
35 | {\r | |
36 | __break (0);\r | |
37 | }\r | |
38 | \r | |
39 | /**\r | |
40 | Used to serialize load and store operations.\r | |
41 | \r | |
42 | All loads and stores that proceed calls to this function are guaranteed to be\r | |
43 | globally visible when this function returns.\r | |
44 | \r | |
45 | **/\r | |
46 | VOID\r | |
47 | EFIAPI\r | |
48 | MemoryFence (\r | |
49 | VOID\r | |
50 | )\r | |
51 | {\r | |
52 | __mfa ();\r | |
53 | }\r | |
54 | \r | |
55 | /**\r | |
56 | Disables CPU interrupts.\r | |
57 | \r | |
58 | Disables CPU interrupts.\r | |
59 | \r | |
60 | **/\r | |
61 | VOID\r | |
62 | EFIAPI\r | |
63 | DisableInterrupts (\r | |
64 | VOID\r | |
65 | )\r | |
66 | {\r | |
67 | _disable ();\r | |
68 | }\r | |
69 | \r | |
70 | /**\r | |
71 | Enables CPU interrupts.\r | |
72 | \r | |
73 | Enables CPU interrupts.\r | |
74 | \r | |
75 | **/\r | |
76 | VOID\r | |
77 | EFIAPI\r | |
78 | EnableInterrupts (\r | |
79 | VOID\r | |
80 | )\r | |
81 | {\r | |
82 | _enable ();\r | |
83 | }\r | |
84 | \r | |
85 | /**\r | |
86 | Enables CPU interrupts for the smallest window required to capture any\r | |
87 | pending interrupts.\r | |
88 | \r | |
89 | Enables CPU interrupts for the smallest window required to capture any\r | |
90 | pending interrupts.\r | |
91 | \r | |
92 | **/\r | |
93 | VOID\r | |
94 | EFIAPI\r | |
95 | EnableDisableInterrupts (\r | |
96 | VOID\r | |
97 | )\r | |
98 | {\r | |
99 | EnableInterrupts ();\r | |
100 | DisableInterrupts ();\r | |
101 | }\r | |
102 | \r |