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e1f414b6 | 1 | /** @file\r |
2 | IA-32/x64 MSR functions.\r | |
3 | \r | |
373ade0e | 4 | Copyright (c) 2006 - 2008, Intel Corporation<BR>\r |
e1f414b6 | 5 | All rights reserved. This program and the accompanying materials\r |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
e1f414b6 | 13 | **/\r |
14 | \r | |
1efcc4ae | 15 | \r |
47fc17d8 | 16 | #include "BaseLibInternals.h"\r |
f734a10a | 17 | \r |
e1f414b6 | 18 | \r |
19 | /**\r | |
20 | Returns the lower 32-bits of a Machine Specific Register(MSR).\r | |
21 | \r | |
22 | Reads and returns the lower 32-bits of the MSR specified by Index.\r | |
23 | No parameter checking is performed on Index, and some Index values may cause\r | |
24 | CPU exceptions. The caller must either guarantee that Index is valid, or the\r | |
25 | caller must set up exception handlers to catch the exceptions. This function\r | |
030cd1a2 | 26 | is only available on IA-32 and x64.\r |
e1f414b6 | 27 | \r |
28 | @param Index The 32-bit MSR index to read.\r | |
29 | \r | |
30 | @return The lower 32 bits of the MSR identified by Index.\r | |
31 | \r | |
32 | **/\r | |
33 | UINT32\r | |
34 | EFIAPI\r | |
35 | AsmReadMsr32 (\r | |
36 | IN UINT32 Index\r | |
37 | )\r | |
38 | {\r | |
39 | return (UINT32)AsmReadMsr64 (Index);\r | |
40 | }\r | |
41 | \r | |
42 | /**\r | |
2fc60b70 | 43 | Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value.\r |
44 | The upper 32-bits of the MSR are set to zero.\r | |
e1f414b6 | 45 | \r |
46 | Writes the 32-bit value specified by Value to the MSR specified by Index. The\r | |
47 | upper 32-bits of the MSR write are set to zero. The 32-bit value written to\r | |
48 | the MSR is returned. No parameter checking is performed on Index or Value,\r | |
49 | and some of these may cause CPU exceptions. The caller must either guarantee\r | |
50 | that Index and Value are valid, or the caller must establish proper exception\r | |
030cd1a2 | 51 | handlers. This function is only available on IA-32 and x64.\r |
e1f414b6 | 52 | \r |
53 | @param Index The 32-bit MSR index to write.\r | |
54 | @param Value The 32-bit value to write to the MSR.\r | |
55 | \r | |
56 | @return Value\r | |
57 | \r | |
58 | **/\r | |
59 | UINT32\r | |
60 | EFIAPI\r | |
61 | AsmWriteMsr32 (\r | |
62 | IN UINT32 Index,\r | |
63 | IN UINT32 Value\r | |
64 | )\r | |
65 | {\r | |
66 | return (UINT32)AsmWriteMsr64 (Index, Value);\r | |
67 | }\r | |
68 | \r | |
69 | /**\r | |
62991af2 | 70 | Reads a 64-bit MSR, performs a bitwise OR on the lower 32-bits, and\r |
e1f414b6 | 71 | writes the result back to the 64-bit MSR.\r |
72 | \r | |
62991af2 | 73 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
e1f414b6 | 74 | between the lower 32-bits of the read result and the value specified by\r |
75 | OrData, and writes the result to the 64-bit MSR specified by Index. The lower\r | |
76 | 32-bits of the value written to the MSR is returned. No parameter checking is\r | |
77 | performed on Index or OrData, and some of these may cause CPU exceptions. The\r | |
78 | caller must either guarantee that Index and OrData are valid, or the caller\r | |
79 | must establish proper exception handlers. This function is only available on\r | |
030cd1a2 | 80 | IA-32 and x64.\r |
e1f414b6 | 81 | \r |
82 | @param Index The 32-bit MSR index to write.\r | |
83 | @param OrData The value to OR with the read value from the MSR.\r | |
84 | \r | |
85 | @return The lower 32-bit value written to the MSR.\r | |
86 | \r | |
87 | **/\r | |
88 | UINT32\r | |
89 | EFIAPI\r | |
90 | AsmMsrOr32 (\r | |
91 | IN UINT32 Index,\r | |
92 | IN UINT32 OrData\r | |
93 | )\r | |
94 | {\r | |
95 | return (UINT32)AsmMsrOr64 (Index, OrData);\r | |
96 | }\r | |
97 | \r | |
98 | /**\r | |
99 | Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes\r | |
100 | the result back to the 64-bit MSR.\r | |
101 | \r | |
102 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
103 | lower 32-bits of the read result and the value specified by AndData, and\r | |
104 | writes the result to the 64-bit MSR specified by Index. The lower 32-bits of\r | |
105 | the value written to the MSR is returned. No parameter checking is performed\r | |
106 | on Index or AndData, and some of these may cause CPU exceptions. The caller\r | |
107 | must either guarantee that Index and AndData are valid, or the caller must\r | |
108 | establish proper exception handlers. This function is only available on IA-32\r | |
030cd1a2 | 109 | and x64.\r |
e1f414b6 | 110 | \r |
111 | @param Index The 32-bit MSR index to write.\r | |
112 | @param AndData The value to AND with the read value from the MSR.\r | |
113 | \r | |
114 | @return The lower 32-bit value written to the MSR.\r | |
115 | \r | |
116 | **/\r | |
117 | UINT32\r | |
118 | EFIAPI\r | |
119 | AsmMsrAnd32 (\r | |
120 | IN UINT32 Index,\r | |
121 | IN UINT32 AndData\r | |
122 | )\r | |
123 | {\r | |
124 | return (UINT32)AsmMsrAnd64 (Index, AndData);\r | |
125 | }\r | |
126 | \r | |
127 | /**\r | |
62991af2 | 128 | Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise OR\r |
e1f414b6 | 129 | on the lower 32-bits, and writes the result back to the 64-bit MSR.\r |
130 | \r | |
131 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
132 | lower 32-bits of the read result and the value specified by AndData\r | |
62991af2 | 133 | preserving the upper 32-bits, performs a bitwise OR between the\r |
e1f414b6 | 134 | result of the AND operation and the value specified by OrData, and writes the\r |
135 | result to the 64-bit MSR specified by Address. The lower 32-bits of the value\r | |
136 | written to the MSR is returned. No parameter checking is performed on Index,\r | |
137 | AndData, or OrData, and some of these may cause CPU exceptions. The caller\r | |
138 | must either guarantee that Index, AndData, and OrData are valid, or the\r | |
139 | caller must establish proper exception handlers. This function is only\r | |
030cd1a2 | 140 | available on IA-32 and x64.\r |
e1f414b6 | 141 | \r |
142 | @param Index The 32-bit MSR index to write.\r | |
143 | @param AndData The value to AND with the read value from the MSR.\r | |
144 | @param OrData The value to OR with the result of the AND operation.\r | |
145 | \r | |
146 | @return The lower 32-bit value written to the MSR.\r | |
147 | \r | |
148 | **/\r | |
149 | UINT32\r | |
150 | EFIAPI\r | |
151 | AsmMsrAndThenOr32 (\r | |
152 | IN UINT32 Index,\r | |
153 | IN UINT32 AndData,\r | |
154 | IN UINT32 OrData\r | |
155 | )\r | |
156 | {\r | |
157 | return (UINT32)AsmMsrAndThenOr64 (Index, AndData, OrData);\r | |
158 | }\r | |
159 | \r | |
160 | /**\r | |
161 | Reads a bit field of an MSR.\r | |
162 | \r | |
163 | Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is\r | |
164 | specified by the StartBit and the EndBit. The value of the bit field is\r | |
165 | returned. The caller must either guarantee that Index is valid, or the caller\r | |
166 | must set up exception handlers to catch the exceptions. This function is only\r | |
030cd1a2 | 167 | available on IA-32 and x64.\r |
e1f414b6 | 168 | \r |
169 | If StartBit is greater than 31, then ASSERT().\r | |
170 | If EndBit is greater than 31, then ASSERT().\r | |
171 | If EndBit is less than StartBit, then ASSERT().\r | |
172 | \r | |
173 | @param Index The 32-bit MSR index to read.\r | |
174 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
175 | Range 0..31.\r | |
176 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
177 | Range 0..31.\r | |
178 | \r | |
179 | @return The bit field read from the MSR.\r | |
180 | \r | |
181 | **/\r | |
182 | UINT32\r | |
183 | EFIAPI\r | |
184 | AsmMsrBitFieldRead32 (\r | |
185 | IN UINT32 Index,\r | |
186 | IN UINTN StartBit,\r | |
187 | IN UINTN EndBit\r | |
188 | )\r | |
189 | {\r | |
190 | return BitFieldRead32 (AsmReadMsr32 (Index), StartBit, EndBit);\r | |
191 | }\r | |
192 | \r | |
193 | /**\r | |
194 | Writes a bit field to an MSR.\r | |
195 | \r | |
2fc60b70 | 196 | Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit\r |
e1f414b6 | 197 | field is specified by the StartBit and the EndBit. All other bits in the\r |
198 | destination MSR are preserved. The lower 32-bits of the MSR written is\r | |
62991af2 | 199 | returned. The caller must either guarantee that Index and the data written \r |
200 | is valid, or the caller must set up exception handlers to catch the exceptions. \r | |
201 | This function is only available on IA-32 and x64.\r | |
e1f414b6 | 202 | \r |
203 | If StartBit is greater than 31, then ASSERT().\r | |
204 | If EndBit is greater than 31, then ASSERT().\r | |
205 | If EndBit is less than StartBit, then ASSERT().\r | |
206 | \r | |
207 | @param Index The 32-bit MSR index to write.\r | |
208 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
209 | Range 0..31.\r | |
210 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
211 | Range 0..31.\r | |
212 | @param Value New value of the bit field.\r | |
213 | \r | |
214 | @return The lower 32-bit of the value written to the MSR.\r | |
215 | \r | |
216 | **/\r | |
217 | UINT32\r | |
218 | EFIAPI\r | |
219 | AsmMsrBitFieldWrite32 (\r | |
220 | IN UINT32 Index,\r | |
221 | IN UINTN StartBit,\r | |
222 | IN UINTN EndBit,\r | |
223 | IN UINT32 Value\r | |
224 | )\r | |
225 | {\r | |
226 | ASSERT (EndBit < sizeof (Value) * 8);\r | |
227 | ASSERT (StartBit <= EndBit);\r | |
228 | return (UINT32)AsmMsrBitFieldWrite64 (Index, StartBit, EndBit, Value);\r | |
229 | }\r | |
230 | \r | |
231 | /**\r | |
232 | Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the\r | |
233 | result back to the bit field in the 64-bit MSR.\r | |
234 | \r | |
62991af2 | 235 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
e1f414b6 | 236 | between the read result and the value specified by OrData, and writes the\r |
237 | result to the 64-bit MSR specified by Index. The lower 32-bits of the value\r | |
238 | written to the MSR are returned. Extra left bits in OrData are stripped. The\r | |
239 | caller must either guarantee that Index and the data written is valid, or\r | |
240 | the caller must set up exception handlers to catch the exceptions. This\r | |
030cd1a2 | 241 | function is only available on IA-32 and x64.\r |
e1f414b6 | 242 | \r |
243 | If StartBit is greater than 31, then ASSERT().\r | |
244 | If EndBit is greater than 31, then ASSERT().\r | |
245 | If EndBit is less than StartBit, then ASSERT().\r | |
246 | \r | |
247 | @param Index The 32-bit MSR index to write.\r | |
248 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
249 | Range 0..31.\r | |
250 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
251 | Range 0..31.\r | |
252 | @param OrData The value to OR with the read value from the MSR.\r | |
253 | \r | |
254 | @return The lower 32-bit of the value written to the MSR.\r | |
255 | \r | |
256 | **/\r | |
257 | UINT32\r | |
258 | EFIAPI\r | |
259 | AsmMsrBitFieldOr32 (\r | |
260 | IN UINT32 Index,\r | |
261 | IN UINTN StartBit,\r | |
262 | IN UINTN EndBit,\r | |
263 | IN UINT32 OrData\r | |
264 | )\r | |
265 | {\r | |
266 | ASSERT (EndBit < sizeof (OrData) * 8);\r | |
267 | ASSERT (StartBit <= EndBit);\r | |
268 | return (UINT32)AsmMsrBitFieldOr64 (Index, StartBit, EndBit, OrData);\r | |
269 | }\r | |
270 | \r | |
271 | /**\r | |
272 | Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r | |
273 | result back to the bit field in the 64-bit MSR.\r | |
274 | \r | |
275 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
276 | read result and the value specified by AndData, and writes the result to the\r | |
277 | 64-bit MSR specified by Index. The lower 32-bits of the value written to the\r | |
278 | MSR are returned. Extra left bits in AndData are stripped. The caller must\r | |
279 | either guarantee that Index and the data written is valid, or the caller must\r | |
280 | set up exception handlers to catch the exceptions. This function is only\r | |
030cd1a2 | 281 | available on IA-32 and x64.\r |
e1f414b6 | 282 | \r |
283 | If StartBit is greater than 31, then ASSERT().\r | |
284 | If EndBit is greater than 31, then ASSERT().\r | |
285 | If EndBit is less than StartBit, then ASSERT().\r | |
286 | \r | |
287 | @param Index The 32-bit MSR index to write.\r | |
288 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
289 | Range 0..31.\r | |
290 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
291 | Range 0..31.\r | |
292 | @param AndData The value to AND with the read value from the MSR.\r | |
293 | \r | |
294 | @return The lower 32-bit of the value written to the MSR.\r | |
295 | \r | |
296 | **/\r | |
297 | UINT32\r | |
298 | EFIAPI\r | |
299 | AsmMsrBitFieldAnd32 (\r | |
300 | IN UINT32 Index,\r | |
301 | IN UINTN StartBit,\r | |
302 | IN UINTN EndBit,\r | |
303 | IN UINT32 AndData\r | |
304 | )\r | |
305 | {\r | |
306 | ASSERT (EndBit < sizeof (AndData) * 8);\r | |
307 | ASSERT (StartBit <= EndBit);\r | |
308 | return (UINT32)AsmMsrBitFieldAnd64 (Index, StartBit, EndBit, AndData);\r | |
309 | }\r | |
310 | \r | |
311 | /**\r | |
312 | Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r | |
62991af2 | 313 | bitwise OR, and writes the result back to the bit field in the\r |
e1f414b6 | 314 | 64-bit MSR.\r |
315 | \r | |
316 | Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a\r | |
62991af2 | 317 | bitwise OR between the read result and the value specified by\r |
e1f414b6 | 318 | AndData, and writes the result to the 64-bit MSR specified by Index. The\r |
319 | lower 32-bits of the value written to the MSR are returned. Extra left bits\r | |
320 | in both AndData and OrData are stripped. The caller must either guarantee\r | |
321 | that Index and the data written is valid, or the caller must set up exception\r | |
322 | handlers to catch the exceptions. This function is only available on IA-32\r | |
030cd1a2 | 323 | and x64.\r |
e1f414b6 | 324 | \r |
325 | If StartBit is greater than 31, then ASSERT().\r | |
326 | If EndBit is greater than 31, then ASSERT().\r | |
327 | If EndBit is less than StartBit, then ASSERT().\r | |
328 | \r | |
329 | @param Index The 32-bit MSR index to write.\r | |
330 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
331 | Range 0..31.\r | |
332 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
333 | Range 0..31.\r | |
334 | @param AndData The value to AND with the read value from the MSR.\r | |
335 | @param OrData The value to OR with the result of the AND operation.\r | |
336 | \r | |
337 | @return The lower 32-bit of the value written to the MSR.\r | |
338 | \r | |
339 | **/\r | |
340 | UINT32\r | |
341 | EFIAPI\r | |
342 | AsmMsrBitFieldAndThenOr32 (\r | |
343 | IN UINT32 Index,\r | |
344 | IN UINTN StartBit,\r | |
345 | IN UINTN EndBit,\r | |
346 | IN UINT32 AndData,\r | |
347 | IN UINT32 OrData\r | |
348 | )\r | |
349 | {\r | |
350 | ASSERT (EndBit < sizeof (AndData) * 8);\r | |
351 | ASSERT (StartBit <= EndBit);\r | |
352 | return (UINT32)AsmMsrBitFieldAndThenOr64 (\r | |
353 | Index,\r | |
354 | StartBit,\r | |
355 | EndBit,\r | |
356 | AndData,\r | |
357 | OrData\r | |
358 | );\r | |
359 | }\r | |
360 | \r | |
361 | /**\r | |
62991af2 | 362 | Reads a 64-bit MSR, performs a bitwise OR, and writes the result\r |
e1f414b6 | 363 | back to the 64-bit MSR.\r |
364 | \r | |
62991af2 | 365 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
e1f414b6 | 366 | between the read result and the value specified by OrData, and writes the\r |
367 | result to the 64-bit MSR specified by Index. The value written to the MSR is\r | |
368 | returned. No parameter checking is performed on Index or OrData, and some of\r | |
369 | these may cause CPU exceptions. The caller must either guarantee that Index\r | |
370 | and OrData are valid, or the caller must establish proper exception handlers.\r | |
030cd1a2 | 371 | This function is only available on IA-32 and x64.\r |
e1f414b6 | 372 | \r |
373 | @param Index The 32-bit MSR index to write.\r | |
374 | @param OrData The value to OR with the read value from the MSR.\r | |
375 | \r | |
376 | @return The value written back to the MSR.\r | |
377 | \r | |
378 | **/\r | |
379 | UINT64\r | |
380 | EFIAPI\r | |
381 | AsmMsrOr64 (\r | |
382 | IN UINT32 Index,\r | |
383 | IN UINT64 OrData\r | |
384 | )\r | |
385 | {\r | |
386 | return AsmWriteMsr64 (Index, AsmReadMsr64 (Index) | OrData);\r | |
387 | }\r | |
388 | \r | |
389 | /**\r | |
390 | Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the\r | |
391 | 64-bit MSR.\r | |
392 | \r | |
393 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
394 | read result and the value specified by OrData, and writes the result to the\r | |
395 | 64-bit MSR specified by Index. The value written to the MSR is returned. No\r | |
396 | parameter checking is performed on Index or OrData, and some of these may\r | |
397 | cause CPU exceptions. The caller must either guarantee that Index and OrData\r | |
398 | are valid, or the caller must establish proper exception handlers. This\r | |
030cd1a2 | 399 | function is only available on IA-32 and x64.\r |
e1f414b6 | 400 | \r |
401 | @param Index The 32-bit MSR index to write.\r | |
402 | @param AndData The value to AND with the read value from the MSR.\r | |
403 | \r | |
404 | @return The value written back to the MSR.\r | |
405 | \r | |
406 | **/\r | |
407 | UINT64\r | |
408 | EFIAPI\r | |
409 | AsmMsrAnd64 (\r | |
410 | IN UINT32 Index,\r | |
411 | IN UINT64 AndData\r | |
412 | )\r | |
413 | {\r | |
414 | return AsmWriteMsr64 (Index, AsmReadMsr64 (Index) & AndData);\r | |
415 | }\r | |
416 | \r | |
417 | /**\r | |
62991af2 | 418 | Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise \r |
e1f414b6 | 419 | OR, and writes the result back to the 64-bit MSR.\r |
420 | \r | |
421 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between read\r | |
62991af2 | 422 | result and the value specified by AndData, performs a bitwise OR\r |
e1f414b6 | 423 | between the result of the AND operation and the value specified by OrData,\r |
424 | and writes the result to the 64-bit MSR specified by Index. The value written\r | |
425 | to the MSR is returned. No parameter checking is performed on Index, AndData,\r | |
426 | or OrData, and some of these may cause CPU exceptions. The caller must either\r | |
427 | guarantee that Index, AndData, and OrData are valid, or the caller must\r | |
428 | establish proper exception handlers. This function is only available on IA-32\r | |
030cd1a2 | 429 | and x64.\r |
e1f414b6 | 430 | \r |
431 | @param Index The 32-bit MSR index to write.\r | |
432 | @param AndData The value to AND with the read value from the MSR.\r | |
433 | @param OrData The value to OR with the result of the AND operation.\r | |
434 | \r | |
435 | @return The value written back to the MSR.\r | |
436 | \r | |
437 | **/\r | |
438 | UINT64\r | |
439 | EFIAPI\r | |
440 | AsmMsrAndThenOr64 (\r | |
441 | IN UINT32 Index,\r | |
442 | IN UINT64 AndData,\r | |
443 | IN UINT64 OrData\r | |
444 | )\r | |
445 | {\r | |
446 | return AsmWriteMsr64 (Index, (AsmReadMsr64 (Index) & AndData) | OrData);\r | |
447 | }\r | |
448 | \r | |
449 | /**\r | |
450 | Reads a bit field of an MSR.\r | |
451 | \r | |
452 | Reads the bit field in the 64-bit MSR. The bit field is specified by the\r | |
453 | StartBit and the EndBit. The value of the bit field is returned. The caller\r | |
454 | must either guarantee that Index is valid, or the caller must set up\r | |
455 | exception handlers to catch the exceptions. This function is only available\r | |
030cd1a2 | 456 | on IA-32 and x64.\r |
e1f414b6 | 457 | \r |
458 | If StartBit is greater than 63, then ASSERT().\r | |
459 | If EndBit is greater than 63, then ASSERT().\r | |
460 | If EndBit is less than StartBit, then ASSERT().\r | |
461 | \r | |
462 | @param Index The 32-bit MSR index to read.\r | |
463 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
464 | Range 0..63.\r | |
465 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
466 | Range 0..63.\r | |
467 | \r | |
2fc60b70 | 468 | @return The value read from the MSR.\r |
e1f414b6 | 469 | \r |
470 | **/\r | |
471 | UINT64\r | |
472 | EFIAPI\r | |
473 | AsmMsrBitFieldRead64 (\r | |
474 | IN UINT32 Index,\r | |
475 | IN UINTN StartBit,\r | |
476 | IN UINTN EndBit\r | |
477 | )\r | |
478 | {\r | |
479 | return BitFieldRead64 (AsmReadMsr64 (Index), StartBit, EndBit);\r | |
480 | }\r | |
481 | \r | |
482 | /**\r | |
483 | Writes a bit field to an MSR.\r | |
484 | \r | |
485 | Writes Value to a bit field in a 64-bit MSR. The bit field is specified by\r | |
486 | the StartBit and the EndBit. All other bits in the destination MSR are\r | |
62991af2 | 487 | preserved. The MSR written is returned. The caller must either guarantee \r |
488 | that Index and the data written is valid, or the caller must set up exception \r | |
489 | handlers to catch the exceptions. This function is only available on IA-32 and x64.\r | |
e1f414b6 | 490 | \r |
491 | If StartBit is greater than 63, then ASSERT().\r | |
492 | If EndBit is greater than 63, then ASSERT().\r | |
493 | If EndBit is less than StartBit, then ASSERT().\r | |
494 | \r | |
495 | @param Index The 32-bit MSR index to write.\r | |
496 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
497 | Range 0..63.\r | |
498 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
499 | Range 0..63.\r | |
500 | @param Value New value of the bit field.\r | |
501 | \r | |
502 | @return The value written back to the MSR.\r | |
503 | \r | |
504 | **/\r | |
505 | UINT64\r | |
506 | EFIAPI\r | |
507 | AsmMsrBitFieldWrite64 (\r | |
508 | IN UINT32 Index,\r | |
509 | IN UINTN StartBit,\r | |
510 | IN UINTN EndBit,\r | |
511 | IN UINT64 Value\r | |
512 | )\r | |
513 | {\r | |
514 | return AsmWriteMsr64 (\r | |
515 | Index,\r | |
516 | BitFieldWrite64 (AsmReadMsr64 (Index), StartBit, EndBit, Value)\r | |
517 | );\r | |
518 | }\r | |
519 | \r | |
520 | /**\r | |
62991af2 | 521 | Reads a bit field in a 64-bit MSR, performs a bitwise OR, and\r |
e1f414b6 | 522 | writes the result back to the bit field in the 64-bit MSR.\r |
523 | \r | |
62991af2 | 524 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
e1f414b6 | 525 | between the read result and the value specified by OrData, and writes the\r |
526 | result to the 64-bit MSR specified by Index. The value written to the MSR is\r | |
527 | returned. Extra left bits in OrData are stripped. The caller must either\r | |
528 | guarantee that Index and the data written is valid, or the caller must set up\r | |
529 | exception handlers to catch the exceptions. This function is only available\r | |
030cd1a2 | 530 | on IA-32 and x64.\r |
e1f414b6 | 531 | \r |
532 | If StartBit is greater than 63, then ASSERT().\r | |
533 | If EndBit is greater than 63, then ASSERT().\r | |
534 | If EndBit is less than StartBit, then ASSERT().\r | |
535 | \r | |
536 | @param Index The 32-bit MSR index to write.\r | |
537 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
538 | Range 0..63.\r | |
539 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
540 | Range 0..63.\r | |
541 | @param OrData The value to OR with the read value from the bit field.\r | |
542 | \r | |
543 | @return The value written back to the MSR.\r | |
544 | \r | |
545 | **/\r | |
546 | UINT64\r | |
547 | EFIAPI\r | |
548 | AsmMsrBitFieldOr64 (\r | |
549 | IN UINT32 Index,\r | |
550 | IN UINTN StartBit,\r | |
551 | IN UINTN EndBit,\r | |
552 | IN UINT64 OrData\r | |
553 | )\r | |
554 | {\r | |
555 | return AsmWriteMsr64 (\r | |
556 | Index,\r | |
557 | BitFieldOr64 (AsmReadMsr64 (Index), StartBit, EndBit, OrData)\r | |
558 | );\r | |
559 | }\r | |
560 | \r | |
561 | /**\r | |
562 | Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r | |
563 | result back to the bit field in the 64-bit MSR.\r | |
564 | \r | |
565 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
566 | read result and the value specified by AndData, and writes the result to the\r | |
567 | 64-bit MSR specified by Index. The value written to the MSR is returned.\r | |
568 | Extra left bits in AndData are stripped. The caller must either guarantee\r | |
569 | that Index and the data written is valid, or the caller must set up exception\r | |
570 | handlers to catch the exceptions. This function is only available on IA-32\r | |
030cd1a2 | 571 | and x64.\r |
e1f414b6 | 572 | \r |
573 | If StartBit is greater than 63, then ASSERT().\r | |
574 | If EndBit is greater than 63, then ASSERT().\r | |
575 | If EndBit is less than StartBit, then ASSERT().\r | |
576 | \r | |
577 | @param Index The 32-bit MSR index to write.\r | |
578 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
579 | Range 0..63.\r | |
580 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
581 | Range 0..63.\r | |
582 | @param AndData The value to AND with the read value from the bit field.\r | |
583 | \r | |
584 | @return The value written back to the MSR.\r | |
585 | \r | |
586 | **/\r | |
587 | UINT64\r | |
588 | EFIAPI\r | |
589 | AsmMsrBitFieldAnd64 (\r | |
590 | IN UINT32 Index,\r | |
591 | IN UINTN StartBit,\r | |
592 | IN UINTN EndBit,\r | |
593 | IN UINT64 AndData\r | |
594 | )\r | |
595 | {\r | |
596 | return AsmWriteMsr64 (\r | |
597 | Index,\r | |
598 | BitFieldAnd64 (AsmReadMsr64 (Index), StartBit, EndBit, AndData)\r | |
599 | );\r | |
600 | }\r | |
601 | \r | |
602 | /**\r | |
603 | Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r | |
62991af2 | 604 | bitwise OR, and writes the result back to the bit field in the\r |
e1f414b6 | 605 | 64-bit MSR.\r |
606 | \r | |
607 | Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by\r | |
62991af2 | 608 | a bitwise OR between the read result and the value specified by\r |
e1f414b6 | 609 | AndData, and writes the result to the 64-bit MSR specified by Index. The\r |
610 | value written to the MSR is returned. Extra left bits in both AndData and\r | |
611 | OrData are stripped. The caller must either guarantee that Index and the data\r | |
612 | written is valid, or the caller must set up exception handlers to catch the\r | |
030cd1a2 | 613 | exceptions. This function is only available on IA-32 and x64.\r |
e1f414b6 | 614 | \r |
615 | If StartBit is greater than 63, then ASSERT().\r | |
616 | If EndBit is greater than 63, then ASSERT().\r | |
617 | If EndBit is less than StartBit, then ASSERT().\r | |
618 | \r | |
619 | @param Index The 32-bit MSR index to write.\r | |
620 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
621 | Range 0..63.\r | |
622 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
623 | Range 0..63.\r | |
624 | @param AndData The value to AND with the read value from the bit field.\r | |
625 | @param OrData The value to OR with the result of the AND operation.\r | |
626 | \r | |
627 | @return The value written back to the MSR.\r | |
628 | \r | |
629 | **/\r | |
630 | UINT64\r | |
631 | EFIAPI\r | |
632 | AsmMsrBitFieldAndThenOr64 (\r | |
633 | IN UINT32 Index,\r | |
634 | IN UINTN StartBit,\r | |
635 | IN UINTN EndBit,\r | |
636 | IN UINT64 AndData,\r | |
637 | IN UINT64 OrData\r | |
638 | )\r | |
639 | {\r | |
640 | return AsmWriteMsr64 (\r | |
641 | Index,\r | |
642 | BitFieldAndThenOr64 (\r | |
643 | AsmReadMsr64 (Index),\r | |
644 | StartBit,\r | |
645 | EndBit,\r | |
646 | AndData,\r | |
647 | OrData\r | |
648 | )\r | |
649 | );\r | |
650 | }\r |