]>
Commit | Line | Data |
---|---|---|
11f43dfd | 1 | /** @file\r |
4ca0802e | 2 | I/O Library. The implementations are based on EFI_PEI_SERVICE->CpuIo interface.\r |
11f43dfd | 3 | \r |
9095d37b | 4 | Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r |
72bda2ac LD |
5 | Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r |
6 | \r | |
9344f092 | 7 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
11f43dfd | 8 | \r |
11f43dfd | 9 | **/\r |
10 | \r | |
c892d846 | 11 | \r |
11f43dfd | 12 | #include <PiPei.h>\r |
c892d846 | 13 | \r |
11f43dfd | 14 | #include <Library/IoLib.h>\r |
15 | #include <Library/DebugLib.h>\r | |
16 | #include <Library/BaseLib.h>\r | |
17 | #include <Library/PeiServicesTablePointerLib.h>\r | |
18 | \r | |
72bda2ac LD |
19 | \r |
20 | /**\r | |
21 | Reads registers in the EFI CPU I/O space.\r | |
22 | \r | |
23 | Reads the I/O port specified by Port with registers width specified by Width.\r | |
24 | The port is read Count times, and the read data is stored in the provided Buffer.\r | |
25 | \r | |
26 | This function must guarantee that all I/O read and write operations are serialized.\r | |
27 | If such operations are not supported, then ASSERT().\r | |
28 | \r | |
29 | @param Port The base address of the I/O operation.\r | |
30 | The caller is responsible for aligning the Address if required.\r | |
31 | @param Width The width of the I/O operation.\r | |
32 | @param Count The number of times to read I/O port.\r | |
33 | @param Buffer The buffer to store the read data into.\r | |
34 | \r | |
35 | **/\r | |
36 | VOID\r | |
37 | EFIAPI\r | |
38 | IoReadFifoWorker (\r | |
39 | IN UINTN Port,\r | |
40 | IN EFI_PEI_CPU_IO_PPI_WIDTH Width,\r | |
41 | IN UINTN Count,\r | |
42 | IN VOID *Buffer\r | |
43 | )\r | |
44 | {\r | |
45 | CONST EFI_PEI_SERVICES **PeiServices;\r | |
46 | EFI_PEI_CPU_IO_PPI *CpuIo;\r | |
47 | EFI_STATUS Status;\r | |
48 | \r | |
49 | PeiServices = GetPeiServicesTablePointer ();\r | |
50 | CpuIo = (*PeiServices)->CpuIo;\r | |
51 | ASSERT (CpuIo != NULL);\r | |
52 | \r | |
53 | Status = CpuIo->Io.Read (PeiServices, CpuIo, Width, Port, Count, Buffer);\r | |
54 | ASSERT_EFI_ERROR (Status);\r | |
55 | }\r | |
56 | \r | |
57 | /**\r | |
58 | Writes registers in the EFI CPU I/O space.\r | |
59 | \r | |
60 | Writes the I/O port specified by Port with registers width specified by Width.\r | |
61 | The port is written Count times, and the write data is retrieved from the provided Buffer.\r | |
62 | \r | |
63 | This function must guarantee that all I/O read and write operations are serialized.\r | |
64 | If such operations are not supported, then ASSERT().\r | |
65 | \r | |
66 | @param Port The base address of the I/O operation.\r | |
67 | The caller is responsible for aligning the Address if required.\r | |
68 | @param Width The width of the I/O operation.\r | |
69 | @param Count The number of times to write I/O port.\r | |
70 | @param Buffer The buffer to store the read data into.\r | |
71 | \r | |
72 | **/\r | |
73 | VOID\r | |
74 | EFIAPI\r | |
75 | IoWriteFifoWorker (\r | |
76 | IN UINTN Port,\r | |
77 | IN EFI_PEI_CPU_IO_PPI_WIDTH Width,\r | |
78 | IN UINTN Count,\r | |
79 | IN VOID *Buffer\r | |
80 | )\r | |
81 | {\r | |
82 | CONST EFI_PEI_SERVICES **PeiServices;\r | |
83 | EFI_PEI_CPU_IO_PPI *CpuIo;\r | |
84 | EFI_STATUS Status;\r | |
85 | \r | |
86 | PeiServices = GetPeiServicesTablePointer ();\r | |
87 | CpuIo = (*PeiServices)->CpuIo;\r | |
88 | ASSERT (CpuIo != NULL);\r | |
89 | \r | |
90 | Status = CpuIo->Io.Write (PeiServices, CpuIo, Width, Port, Count, Buffer);\r | |
91 | ASSERT_EFI_ERROR (Status);\r | |
92 | }\r | |
93 | \r | |
11f43dfd | 94 | /**\r |
95 | Reads an 8-bit I/O port.\r | |
96 | \r | |
97 | Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.\r | |
98 | This function must guarantee that all I/O read and write operations are\r | |
99 | serialized.\r | |
100 | \r | |
101 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
102 | \r | |
103 | @param Port The I/O port to read.\r | |
104 | \r | |
80f0c0c4 | 105 | @return The value read.\r |
11f43dfd | 106 | \r |
107 | **/\r | |
108 | UINT8\r | |
109 | EFIAPI\r | |
110 | IoRead8 (\r | |
111 | IN UINTN Port\r | |
112 | )\r | |
113 | {\r | |
fe7fd578 | 114 | CONST EFI_PEI_SERVICES **PeiServices;\r |
11f43dfd | 115 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
116 | \r | |
5240b97c | 117 | PeiServices = GetPeiServicesTablePointer ();\r |
11f43dfd | 118 | CpuIo = (*PeiServices)->CpuIo;\r |
119 | ASSERT (CpuIo != NULL);\r | |
120 | \r | |
121 | return CpuIo->IoRead8 (PeiServices, CpuIo, (UINT64) Port);\r | |
122 | }\r | |
123 | \r | |
124 | /**\r | |
125 | Writes an 8-bit I/O port.\r | |
126 | \r | |
127 | Writes the 8-bit I/O port specified by Port with the value specified by Value\r | |
128 | and returns Value. This function must guarantee that all I/O read and write\r | |
129 | operations are serialized.\r | |
130 | \r | |
131 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
132 | \r | |
133 | @param Port The I/O port to write.\r | |
134 | @param Value The value to write to the I/O port.\r | |
135 | \r | |
136 | @return The value written the I/O port.\r | |
137 | \r | |
138 | **/\r | |
139 | UINT8\r | |
140 | EFIAPI\r | |
141 | IoWrite8 (\r | |
142 | IN UINTN Port,\r | |
143 | IN UINT8 Value\r | |
144 | )\r | |
145 | {\r | |
fe7fd578 | 146 | CONST EFI_PEI_SERVICES **PeiServices;\r |
11f43dfd | 147 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
148 | \r | |
5240b97c | 149 | PeiServices = GetPeiServicesTablePointer ();\r |
11f43dfd | 150 | CpuIo = (*PeiServices)->CpuIo;\r |
151 | ASSERT (CpuIo != NULL);\r | |
152 | \r | |
153 | CpuIo->IoWrite8 (PeiServices, CpuIo, (UINT64) Port, Value);\r | |
154 | return Value;\r | |
155 | }\r | |
156 | \r | |
157 | /**\r | |
158 | Reads a 16-bit I/O port.\r | |
159 | \r | |
160 | Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.\r | |
161 | This function must guarantee that all I/O read and write operations are\r | |
162 | serialized.\r | |
163 | \r | |
164 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
80f0c0c4 | 165 | If Port is not aligned on a 16-bit boundary, then ASSERT().\r |
11f43dfd | 166 | \r |
167 | @param Port The I/O port to read.\r | |
168 | \r | |
80f0c0c4 | 169 | @return The value read.\r |
11f43dfd | 170 | \r |
171 | **/\r | |
172 | UINT16\r | |
173 | EFIAPI\r | |
174 | IoRead16 (\r | |
175 | IN UINTN Port\r | |
176 | )\r | |
177 | {\r | |
fe7fd578 | 178 | CONST EFI_PEI_SERVICES **PeiServices;\r |
11f43dfd | 179 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
180 | \r | |
5240b97c | 181 | PeiServices = GetPeiServicesTablePointer ();\r |
11f43dfd | 182 | CpuIo = (*PeiServices)->CpuIo;\r |
183 | ASSERT (CpuIo != NULL);\r | |
184 | //\r | |
185 | // Make sure Port is aligned on a 16-bit boundary.\r | |
186 | //\r | |
187 | ASSERT ((Port & 1) == 0);\r | |
188 | return CpuIo->IoRead16 (PeiServices, CpuIo, (UINT64) Port);\r | |
189 | }\r | |
190 | \r | |
191 | /**\r | |
192 | Writes a 16-bit I/O port.\r | |
193 | \r | |
194 | Writes the 16-bit I/O port specified by Port with the value specified by Value\r | |
195 | and returns Value. This function must guarantee that all I/O read and write\r | |
196 | operations are serialized.\r | |
197 | \r | |
198 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
80f0c0c4 | 199 | If Port is not aligned on a 16-bit boundary, then ASSERT().\r |
9095d37b | 200 | \r |
11f43dfd | 201 | @param Port The I/O port to write.\r |
202 | @param Value The value to write to the I/O port.\r | |
203 | \r | |
204 | @return The value written the I/O port.\r | |
205 | \r | |
206 | **/\r | |
207 | UINT16\r | |
208 | EFIAPI\r | |
209 | IoWrite16 (\r | |
210 | IN UINTN Port,\r | |
211 | IN UINT16 Value\r | |
212 | )\r | |
213 | {\r | |
fe7fd578 | 214 | CONST EFI_PEI_SERVICES **PeiServices;\r |
11f43dfd | 215 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
216 | \r | |
5240b97c | 217 | PeiServices = GetPeiServicesTablePointer ();\r |
11f43dfd | 218 | CpuIo = (*PeiServices)->CpuIo;\r |
219 | ASSERT (CpuIo != NULL);\r | |
220 | //\r | |
221 | // Make sure Port is aligned on a 16-bit boundary.\r | |
222 | //\r | |
223 | ASSERT ((Port & 1) == 0);\r | |
224 | CpuIo->IoWrite16 (PeiServices, CpuIo, (UINT64) Port, Value);\r | |
225 | return Value;\r | |
226 | }\r | |
227 | \r | |
228 | /**\r | |
229 | Reads a 32-bit I/O port.\r | |
230 | \r | |
231 | Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.\r | |
232 | This function must guarantee that all I/O read and write operations are\r | |
233 | serialized.\r | |
234 | \r | |
235 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
80f0c0c4 | 236 | If Port is not aligned on a 32-bit boundary, then ASSERT().\r |
9095d37b | 237 | \r |
11f43dfd | 238 | @param Port The I/O port to read.\r |
239 | \r | |
80f0c0c4 | 240 | @return The value read.\r |
11f43dfd | 241 | \r |
242 | **/\r | |
243 | UINT32\r | |
244 | EFIAPI\r | |
245 | IoRead32 (\r | |
246 | IN UINTN Port\r | |
247 | )\r | |
248 | {\r | |
fe7fd578 | 249 | CONST EFI_PEI_SERVICES **PeiServices;\r |
11f43dfd | 250 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
251 | \r | |
5240b97c | 252 | PeiServices = GetPeiServicesTablePointer ();\r |
11f43dfd | 253 | CpuIo = (*PeiServices)->CpuIo;\r |
254 | ASSERT (CpuIo != NULL);\r | |
255 | //\r | |
256 | // Make sure Port is aligned on a 32-bit boundary.\r | |
257 | //\r | |
258 | ASSERT ((Port & 3) == 0);\r | |
259 | return CpuIo->IoRead32 (PeiServices, CpuIo, (UINT64) Port);\r | |
260 | }\r | |
261 | \r | |
262 | /**\r | |
263 | Writes a 32-bit I/O port.\r | |
264 | \r | |
265 | Writes the 32-bit I/O port specified by Port with the value specified by Value\r | |
266 | and returns Value. This function must guarantee that all I/O read and write\r | |
267 | operations are serialized.\r | |
268 | \r | |
269 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
80f0c0c4 | 270 | If Port is not aligned on a 32-bit boundary, then ASSERT().\r |
9095d37b | 271 | \r |
11f43dfd | 272 | @param Port The I/O port to write.\r |
273 | @param Value The value to write to the I/O port.\r | |
274 | \r | |
275 | @return The value written the I/O port.\r | |
276 | \r | |
277 | **/\r | |
278 | UINT32\r | |
279 | EFIAPI\r | |
280 | IoWrite32 (\r | |
281 | IN UINTN Port,\r | |
282 | IN UINT32 Value\r | |
283 | )\r | |
284 | {\r | |
fe7fd578 | 285 | CONST EFI_PEI_SERVICES **PeiServices;\r |
11f43dfd | 286 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
287 | \r | |
5240b97c | 288 | PeiServices = GetPeiServicesTablePointer ();\r |
11f43dfd | 289 | CpuIo = (*PeiServices)->CpuIo;\r |
290 | ASSERT (CpuIo != NULL);\r | |
291 | //\r | |
292 | // Make sure Port is aligned on a 32-bit boundary.\r | |
293 | //\r | |
294 | ASSERT ((Port & 3) == 0);\r | |
295 | CpuIo->IoWrite32 (PeiServices, CpuIo, (UINT64) Port, Value);\r | |
296 | return Value;\r | |
297 | }\r | |
298 | \r | |
299 | /**\r | |
300 | Reads a 64-bit I/O port.\r | |
301 | \r | |
302 | Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.\r | |
303 | This function must guarantee that all I/O read and write operations are\r | |
304 | serialized.\r | |
305 | \r | |
306 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
80f0c0c4 | 307 | If Port is not aligned on a 64-bit boundary, then ASSERT().\r |
11f43dfd | 308 | \r |
309 | @param Port The I/O port to read.\r | |
310 | \r | |
80f0c0c4 | 311 | @return The value read.\r |
11f43dfd | 312 | \r |
313 | **/\r | |
314 | UINT64\r | |
315 | EFIAPI\r | |
316 | IoRead64 (\r | |
317 | IN UINTN Port\r | |
318 | )\r | |
319 | {\r | |
fe7fd578 | 320 | CONST EFI_PEI_SERVICES **PeiServices;\r |
11f43dfd | 321 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
322 | \r | |
5240b97c | 323 | PeiServices = GetPeiServicesTablePointer ();\r |
11f43dfd | 324 | CpuIo = (*PeiServices)->CpuIo;\r |
325 | ASSERT (CpuIo != NULL);\r | |
326 | //\r | |
327 | // Make sure Port is aligned on a 64-bit boundary.\r | |
328 | //\r | |
329 | ASSERT ((Port & 7) == 0);\r | |
330 | return CpuIo->IoRead64 (PeiServices, CpuIo, (UINT64) Port);\r | |
331 | }\r | |
332 | \r | |
333 | /**\r | |
334 | Writes a 64-bit I/O port.\r | |
335 | \r | |
336 | Writes the 64-bit I/O port specified by Port with the value specified by Value\r | |
337 | and returns Value. This function must guarantee that all I/O read and write\r | |
338 | operations are serialized.\r | |
339 | \r | |
340 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
80f0c0c4 | 341 | If Port is not aligned on a 64-bit boundary, then ASSERT().\r |
11f43dfd | 342 | \r |
343 | @param Port The I/O port to write.\r | |
344 | @param Value The value to write to the I/O port.\r | |
345 | \r | |
346 | @return The value written the I/O port.\r | |
347 | \r | |
348 | **/\r | |
349 | UINT64\r | |
350 | EFIAPI\r | |
351 | IoWrite64 (\r | |
352 | IN UINTN Port,\r | |
353 | IN UINT64 Value\r | |
354 | )\r | |
355 | {\r | |
fe7fd578 | 356 | CONST EFI_PEI_SERVICES **PeiServices;\r |
11f43dfd | 357 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
358 | \r | |
5240b97c | 359 | PeiServices = GetPeiServicesTablePointer ();\r |
11f43dfd | 360 | CpuIo = (*PeiServices)->CpuIo;\r |
361 | ASSERT (CpuIo != NULL);\r | |
362 | //\r | |
363 | // Make sure Port is aligned on a 64-bit boundary.\r | |
364 | //\r | |
365 | ASSERT ((Port & 7) == 0);\r | |
366 | CpuIo->IoWrite64 (PeiServices, CpuIo, (UINT64) Port, Value);\r | |
367 | return Value;;\r | |
368 | }\r | |
369 | \r | |
72bda2ac LD |
370 | /**\r |
371 | Reads an 8-bit I/O port fifo into a block of memory.\r | |
372 | \r | |
373 | Reads the 8-bit I/O fifo port specified by Port.\r | |
374 | The port is read Count times, and the read data is\r | |
375 | stored in the provided Buffer.\r | |
376 | \r | |
377 | This function must guarantee that all I/O read and write operations are\r | |
378 | serialized.\r | |
379 | \r | |
380 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
381 | \r | |
382 | @param Port The I/O port to read.\r | |
383 | @param Count The number of times to read I/O port.\r | |
384 | @param Buffer The buffer to store the read data into.\r | |
385 | \r | |
386 | **/\r | |
387 | VOID\r | |
388 | EFIAPI\r | |
389 | IoReadFifo8 (\r | |
390 | IN UINTN Port,\r | |
391 | IN UINTN Count,\r | |
392 | OUT VOID *Buffer\r | |
393 | )\r | |
394 | {\r | |
395 | IoReadFifoWorker (Port, EfiPeiCpuIoWidthFifoUint8, Count, Buffer);\r | |
396 | }\r | |
397 | \r | |
398 | /**\r | |
399 | Writes a block of memory into an 8-bit I/O port fifo.\r | |
400 | \r | |
401 | Writes the 8-bit I/O fifo port specified by Port.\r | |
402 | The port is written Count times, and the write data is\r | |
403 | retrieved from the provided Buffer.\r | |
404 | \r | |
405 | This function must guarantee that all I/O write and write operations are\r | |
406 | serialized.\r | |
407 | \r | |
408 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
409 | \r | |
410 | @param Port The I/O port to write.\r | |
411 | @param Count The number of times to write I/O port.\r | |
412 | @param Buffer The buffer to retrieve the write data from.\r | |
413 | \r | |
414 | **/\r | |
415 | VOID\r | |
416 | EFIAPI\r | |
417 | IoWriteFifo8 (\r | |
418 | IN UINTN Port,\r | |
419 | IN UINTN Count,\r | |
420 | IN VOID *Buffer\r | |
421 | )\r | |
422 | {\r | |
423 | IoWriteFifoWorker (Port, EfiPeiCpuIoWidthFifoUint8, Count, Buffer);\r | |
424 | }\r | |
425 | \r | |
426 | /**\r | |
427 | Reads a 16-bit I/O port fifo into a block of memory.\r | |
428 | \r | |
429 | Reads the 16-bit I/O fifo port specified by Port.\r | |
430 | The port is read Count times, and the read data is\r | |
431 | stored in the provided Buffer.\r | |
432 | \r | |
433 | This function must guarantee that all I/O read and write operations are\r | |
434 | serialized.\r | |
435 | \r | |
436 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
437 | \r | |
438 | @param Port The I/O port to read.\r | |
439 | @param Count The number of times to read I/O port.\r | |
440 | @param Buffer The buffer to store the read data into.\r | |
441 | \r | |
442 | **/\r | |
443 | VOID\r | |
444 | EFIAPI\r | |
445 | IoReadFifo16 (\r | |
446 | IN UINTN Port,\r | |
447 | IN UINTN Count,\r | |
448 | OUT VOID *Buffer\r | |
449 | )\r | |
450 | {\r | |
451 | //\r | |
452 | // Make sure Port is aligned on a 16-bit boundary.\r | |
453 | //\r | |
454 | ASSERT ((Port & 1) == 0);\r | |
455 | IoReadFifoWorker (Port, EfiPeiCpuIoWidthFifoUint16, Count, Buffer);\r | |
456 | }\r | |
457 | \r | |
458 | /**\r | |
459 | Writes a block of memory into a 16-bit I/O port fifo.\r | |
460 | \r | |
461 | Writes the 16-bit I/O fifo port specified by Port.\r | |
462 | The port is written Count times, and the write data is\r | |
463 | retrieved from the provided Buffer.\r | |
464 | \r | |
465 | This function must guarantee that all I/O write and write operations are\r | |
466 | serialized.\r | |
467 | \r | |
468 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
469 | \r | |
470 | @param Port The I/O port to write.\r | |
471 | @param Count The number of times to write I/O port.\r | |
472 | @param Buffer The buffer to retrieve the write data from.\r | |
473 | \r | |
474 | **/\r | |
475 | VOID\r | |
476 | EFIAPI\r | |
477 | IoWriteFifo16 (\r | |
478 | IN UINTN Port,\r | |
479 | IN UINTN Count,\r | |
480 | IN VOID *Buffer\r | |
481 | )\r | |
482 | {\r | |
483 | //\r | |
484 | // Make sure Port is aligned on a 16-bit boundary.\r | |
485 | //\r | |
486 | ASSERT ((Port & 1) == 0);\r | |
487 | IoWriteFifoWorker (Port, EfiPeiCpuIoWidthFifoUint16, Count, Buffer);\r | |
488 | }\r | |
489 | \r | |
490 | /**\r | |
491 | Reads a 32-bit I/O port fifo into a block of memory.\r | |
492 | \r | |
493 | Reads the 32-bit I/O fifo port specified by Port.\r | |
494 | The port is read Count times, and the read data is\r | |
495 | stored in the provided Buffer.\r | |
496 | \r | |
497 | This function must guarantee that all I/O read and write operations are\r | |
498 | serialized.\r | |
499 | \r | |
500 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
501 | \r | |
502 | @param Port The I/O port to read.\r | |
503 | @param Count The number of times to read I/O port.\r | |
504 | @param Buffer The buffer to store the read data into.\r | |
505 | \r | |
506 | **/\r | |
507 | VOID\r | |
508 | EFIAPI\r | |
509 | IoReadFifo32 (\r | |
510 | IN UINTN Port,\r | |
511 | IN UINTN Count,\r | |
512 | OUT VOID *Buffer\r | |
513 | )\r | |
514 | {\r | |
515 | //\r | |
516 | // Make sure Port is aligned on a 32-bit boundary.\r | |
517 | //\r | |
518 | ASSERT ((Port & 3) == 0);\r | |
519 | IoReadFifoWorker (Port, EfiPeiCpuIoWidthFifoUint32, Count, Buffer);\r | |
520 | }\r | |
521 | \r | |
522 | /**\r | |
523 | Writes a block of memory into a 32-bit I/O port fifo.\r | |
524 | \r | |
525 | Writes the 32-bit I/O fifo port specified by Port.\r | |
526 | The port is written Count times, and the write data is\r | |
527 | retrieved from the provided Buffer.\r | |
528 | \r | |
529 | This function must guarantee that all I/O write and write operations are\r | |
530 | serialized.\r | |
531 | \r | |
532 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
533 | \r | |
534 | @param Port The I/O port to write.\r | |
535 | @param Count The number of times to write I/O port.\r | |
536 | @param Buffer The buffer to retrieve the write data from.\r | |
537 | \r | |
538 | **/\r | |
539 | VOID\r | |
540 | EFIAPI\r | |
541 | IoWriteFifo32 (\r | |
542 | IN UINTN Port,\r | |
543 | IN UINTN Count,\r | |
544 | IN VOID *Buffer\r | |
545 | )\r | |
546 | {\r | |
547 | //\r | |
548 | // Make sure Port is aligned on a 32-bit boundary.\r | |
549 | //\r | |
550 | ASSERT ((Port & 3) == 0);\r | |
551 | IoWriteFifoWorker (Port, EfiPeiCpuIoWidthFifoUint32, Count, Buffer);\r | |
552 | }\r | |
553 | \r | |
11f43dfd | 554 | /**\r |
555 | Reads an 8-bit MMIO register.\r | |
556 | \r | |
557 | Reads the 8-bit MMIO register specified by Address. The 8-bit read value is\r | |
558 | returned. This function must guarantee that all MMIO read and write\r | |
559 | operations are serialized.\r | |
560 | \r | |
561 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
562 | \r | |
563 | @param Address The MMIO register to read.\r | |
564 | \r | |
80f0c0c4 | 565 | @return The value read.\r |
11f43dfd | 566 | \r |
567 | **/\r | |
568 | UINT8\r | |
569 | EFIAPI\r | |
570 | MmioRead8 (\r | |
571 | IN UINTN Address\r | |
572 | )\r | |
573 | {\r | |
fe7fd578 | 574 | CONST EFI_PEI_SERVICES **PeiServices;\r |
11f43dfd | 575 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
576 | \r | |
5240b97c | 577 | PeiServices = GetPeiServicesTablePointer ();\r |
11f43dfd | 578 | CpuIo = (*PeiServices)->CpuIo;\r |
579 | ASSERT (CpuIo != NULL);\r | |
580 | \r | |
581 | return CpuIo->MemRead8 (PeiServices, CpuIo, (UINT64) Address);\r | |
582 | }\r | |
583 | \r | |
584 | /**\r | |
585 | Writes an 8-bit MMIO register.\r | |
586 | \r | |
587 | Writes the 8-bit MMIO register specified by Address with the value specified\r | |
588 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
589 | and write operations are serialized.\r | |
590 | \r | |
591 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
592 | \r | |
593 | @param Address The MMIO register to write.\r | |
594 | @param Value The value to write to the MMIO register.\r | |
9095d37b | 595 | \r |
4ef55dfc | 596 | @return Value.\r |
80f0c0c4 | 597 | \r |
11f43dfd | 598 | **/\r |
599 | UINT8\r | |
600 | EFIAPI\r | |
601 | MmioWrite8 (\r | |
602 | IN UINTN Address,\r | |
603 | IN UINT8 Value\r | |
604 | )\r | |
605 | {\r | |
fe7fd578 | 606 | CONST EFI_PEI_SERVICES **PeiServices;\r |
11f43dfd | 607 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
608 | \r | |
5240b97c | 609 | PeiServices = GetPeiServicesTablePointer ();\r |
11f43dfd | 610 | CpuIo = (*PeiServices)->CpuIo;\r |
611 | ASSERT (CpuIo != NULL);\r | |
612 | \r | |
613 | CpuIo->MemWrite8 (PeiServices, CpuIo, (UINT64) Address, Value);\r | |
614 | return Value;\r | |
615 | }\r | |
616 | \r | |
617 | /**\r | |
618 | Reads a 16-bit MMIO register.\r | |
619 | \r | |
620 | Reads the 16-bit MMIO register specified by Address. The 16-bit read value is\r | |
621 | returned. This function must guarantee that all MMIO read and write\r | |
622 | operations are serialized.\r | |
623 | \r | |
624 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
80f0c0c4 | 625 | If Address is not aligned on a 16-bit boundary, then ASSERT().\r |
11f43dfd | 626 | \r |
627 | @param Address The MMIO register to read.\r | |
628 | \r | |
80f0c0c4 | 629 | @return The value read.\r |
11f43dfd | 630 | \r |
631 | **/\r | |
632 | UINT16\r | |
633 | EFIAPI\r | |
634 | MmioRead16 (\r | |
635 | IN UINTN Address\r | |
636 | )\r | |
637 | {\r | |
fe7fd578 | 638 | CONST EFI_PEI_SERVICES **PeiServices;\r |
11f43dfd | 639 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
640 | \r | |
5240b97c | 641 | PeiServices = GetPeiServicesTablePointer ();\r |
11f43dfd | 642 | CpuIo = (*PeiServices)->CpuIo;\r |
643 | ASSERT (CpuIo != NULL);\r | |
644 | //\r | |
645 | // Make sure Address is aligned on a 16-bit boundary.\r | |
646 | //\r | |
647 | ASSERT ((Address & 1) == 0);\r | |
648 | return CpuIo->MemRead16 (PeiServices, CpuIo, (UINT64) Address);\r | |
649 | \r | |
650 | }\r | |
651 | \r | |
652 | /**\r | |
653 | Writes a 16-bit MMIO register.\r | |
654 | \r | |
655 | Writes the 16-bit MMIO register specified by Address with the value specified\r | |
656 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
657 | and write operations are serialized.\r | |
658 | \r | |
659 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
80f0c0c4 | 660 | If Address is not aligned on a 16-bit boundary, then ASSERT().\r |
11f43dfd | 661 | \r |
662 | @param Address The MMIO register to write.\r | |
663 | @param Value The value to write to the MMIO register.\r | |
9095d37b | 664 | \r |
4ef55dfc | 665 | @return Value.\r |
11f43dfd | 666 | \r |
667 | **/\r | |
668 | UINT16\r | |
669 | EFIAPI\r | |
670 | MmioWrite16 (\r | |
671 | IN UINTN Address,\r | |
672 | IN UINT16 Value\r | |
673 | )\r | |
674 | {\r | |
fe7fd578 | 675 | CONST EFI_PEI_SERVICES **PeiServices;\r |
11f43dfd | 676 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
677 | \r | |
5240b97c | 678 | PeiServices = GetPeiServicesTablePointer ();\r |
11f43dfd | 679 | CpuIo = (*PeiServices)->CpuIo;\r |
680 | ASSERT (CpuIo != NULL);\r | |
681 | //\r | |
682 | // Make sure Address is aligned on a 16-bit boundary.\r | |
683 | //\r | |
684 | ASSERT ((Address & 1) == 0);\r | |
685 | CpuIo->MemWrite16 (PeiServices, CpuIo, (UINT64) Address, Value);\r | |
686 | return Value;\r | |
687 | }\r | |
688 | \r | |
689 | /**\r | |
690 | Reads a 32-bit MMIO register.\r | |
691 | \r | |
692 | Reads the 32-bit MMIO register specified by Address. The 32-bit read value is\r | |
693 | returned. This function must guarantee that all MMIO read and write\r | |
694 | operations are serialized.\r | |
695 | \r | |
696 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
80f0c0c4 | 697 | If Address is not aligned on a 32-bit boundary, then ASSERT().\r |
11f43dfd | 698 | \r |
699 | @param Address The MMIO register to read.\r | |
700 | \r | |
80f0c0c4 | 701 | @return The value read.\r |
11f43dfd | 702 | \r |
703 | **/\r | |
704 | UINT32\r | |
705 | EFIAPI\r | |
706 | MmioRead32 (\r | |
707 | IN UINTN Address\r | |
708 | )\r | |
709 | {\r | |
fe7fd578 | 710 | CONST EFI_PEI_SERVICES **PeiServices;\r |
11f43dfd | 711 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
712 | \r | |
5240b97c | 713 | PeiServices = GetPeiServicesTablePointer ();\r |
11f43dfd | 714 | CpuIo = (*PeiServices)->CpuIo;\r |
715 | ASSERT (CpuIo != NULL);\r | |
716 | //\r | |
717 | // Make sure Address is aligned on a 32-bit boundary.\r | |
718 | //\r | |
719 | ASSERT ((Address & 3) == 0);\r | |
720 | return CpuIo->MemRead32 (PeiServices, CpuIo, (UINT64) Address);\r | |
721 | \r | |
722 | }\r | |
723 | \r | |
724 | /**\r | |
725 | Writes a 32-bit MMIO register.\r | |
726 | \r | |
727 | Writes the 32-bit MMIO register specified by Address with the value specified\r | |
728 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
729 | and write operations are serialized.\r | |
730 | \r | |
731 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
80f0c0c4 | 732 | If Address is not aligned on a 32-bit boundary, then ASSERT().\r |
11f43dfd | 733 | \r |
734 | @param Address The MMIO register to write.\r | |
735 | @param Value The value to write to the MMIO register.\r | |
9095d37b | 736 | \r |
4ef55dfc | 737 | @return Value.\r |
11f43dfd | 738 | \r |
739 | **/\r | |
740 | UINT32\r | |
741 | EFIAPI\r | |
742 | MmioWrite32 (\r | |
743 | IN UINTN Address,\r | |
744 | IN UINT32 Value\r | |
745 | )\r | |
746 | {\r | |
fe7fd578 | 747 | CONST EFI_PEI_SERVICES **PeiServices;\r |
11f43dfd | 748 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
749 | \r | |
5240b97c | 750 | PeiServices = GetPeiServicesTablePointer ();\r |
11f43dfd | 751 | CpuIo = (*PeiServices)->CpuIo;\r |
752 | ASSERT (CpuIo != NULL);\r | |
753 | //\r | |
754 | // Make sure Address is aligned on a 32-bit boundary.\r | |
755 | //\r | |
756 | ASSERT ((Address & 3) == 0);\r | |
757 | CpuIo->MemWrite32 (PeiServices, CpuIo, (UINT64) Address, Value);\r | |
758 | return Value;\r | |
759 | }\r | |
760 | \r | |
761 | /**\r | |
762 | Reads a 64-bit MMIO register.\r | |
763 | \r | |
764 | Reads the 64-bit MMIO register specified by Address. The 64-bit read value is\r | |
765 | returned. This function must guarantee that all MMIO read and write\r | |
766 | operations are serialized.\r | |
767 | \r | |
768 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
80f0c0c4 | 769 | If Address is not aligned on a 64-bit boundary, then ASSERT().\r |
11f43dfd | 770 | \r |
771 | @param Address The MMIO register to read.\r | |
772 | \r | |
80f0c0c4 | 773 | @return The value read.\r |
11f43dfd | 774 | \r |
775 | **/\r | |
776 | UINT64\r | |
777 | EFIAPI\r | |
778 | MmioRead64 (\r | |
779 | IN UINTN Address\r | |
780 | )\r | |
781 | {\r | |
fe7fd578 | 782 | CONST EFI_PEI_SERVICES **PeiServices;\r |
11f43dfd | 783 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
784 | \r | |
5240b97c | 785 | PeiServices = GetPeiServicesTablePointer ();\r |
11f43dfd | 786 | CpuIo = (*PeiServices)->CpuIo;\r |
787 | ASSERT (CpuIo != NULL);\r | |
788 | //\r | |
789 | // Make sure Address is aligned on a 64-bit boundary.\r | |
790 | //\r | |
4efb2b4d | 791 | ASSERT ((Address & (sizeof (UINT64) - 1)) == 0);\r |
11f43dfd | 792 | return CpuIo->MemRead64 (PeiServices, CpuIo, (UINT64) Address);\r |
793 | \r | |
794 | }\r | |
795 | \r | |
796 | /**\r | |
797 | Writes a 64-bit MMIO register.\r | |
798 | \r | |
799 | Writes the 64-bit MMIO register specified by Address with the value specified\r | |
800 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
801 | and write operations are serialized.\r | |
802 | \r | |
803 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
80f0c0c4 | 804 | If Address is not aligned on a 64-bit boundary, then ASSERT().\r |
11f43dfd | 805 | \r |
806 | @param Address The MMIO register to write.\r | |
807 | @param Value The value to write to the MMIO register.\r | |
808 | \r | |
809 | **/\r | |
810 | UINT64\r | |
811 | EFIAPI\r | |
812 | MmioWrite64 (\r | |
813 | IN UINTN Address,\r | |
814 | IN UINT64 Value\r | |
815 | )\r | |
816 | {\r | |
fe7fd578 | 817 | CONST EFI_PEI_SERVICES **PeiServices;\r |
11f43dfd | 818 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
819 | \r | |
5240b97c | 820 | PeiServices = GetPeiServicesTablePointer ();\r |
11f43dfd | 821 | CpuIo = (*PeiServices)->CpuIo;\r |
822 | ASSERT (CpuIo != NULL);\r | |
823 | //\r | |
824 | // Make sure Address is aligned on a 64-bit boundary.\r | |
825 | //\r | |
826 | ASSERT ((Address & 7) == 0);\r | |
827 | CpuIo->MemWrite64 (PeiServices, CpuIo, (UINT64) Address, Value);\r | |
828 | return Value;\r | |
829 | }\r |