]>
Commit | Line | Data |
---|---|---|
1e57a462 | 1 | /** @file\r |
2 | \r | |
3 | Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r | |
4 | \r | |
5 | This program and the accompanying materials\r | |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | **/\r | |
14 | \r | |
15 | #ifndef __OMAP3530I2C_H__\r | |
16 | #define __OMAP3530I2C_H__\r | |
17 | \r | |
18 | //I2C register definitions.\r | |
19 | #define I2C1BASE 0x48070000\r | |
20 | \r | |
21 | #define I2C_IE (I2C1BASE + 0x4)\r | |
22 | #define XRDY_IE BIT4\r | |
23 | #define RRDY_IE BIT3\r | |
24 | #define ARDY_IE BIT2\r | |
25 | #define NACK_IE BIT1\r | |
26 | \r | |
27 | #define I2C_STAT (I2C1BASE + 0x8)\r | |
28 | #define BB BIT12\r | |
29 | #define XRDY BIT4\r | |
30 | #define RRDY BIT3\r | |
31 | #define ARDY BIT2\r | |
32 | #define NACK BIT1\r | |
33 | \r | |
34 | #define I2C_WE (I2C1BASE + 0xC)\r | |
35 | #define I2C_SYSS (I2C1BASE + 0x10)\r | |
36 | #define I2C_BUF (I2C1BASE + 0x14)\r | |
37 | #define I2C_CNT (I2C1BASE + 0x18)\r | |
38 | #define I2C_DATA (I2C1BASE + 0x1C)\r | |
39 | #define I2C_SYSC (I2C1BASE + 0x20)\r | |
40 | \r | |
41 | #define I2C_CON (I2C1BASE + 0x24)\r | |
42 | #define STT BIT0\r | |
43 | #define STP BIT1\r | |
44 | #define XSA BIT8\r | |
45 | #define TRX BIT9\r | |
46 | #define MST BIT10\r | |
47 | #define I2C_EN BIT15\r | |
48 | \r | |
49 | #define I2C_OA0 (I2C1BASE + 0x28)\r | |
50 | #define I2C_SA (I2C1BASE + 0x2C)\r | |
51 | #define I2C_PSC (I2C1BASE + 0x30)\r | |
52 | #define I2C_SCLL (I2C1BASE + 0x34)\r | |
53 | #define I2C_SCLH (I2C1BASE + 0x38)\r | |
54 | #define I2C_SYSTEST (I2C1BASE + 0x3C)\r | |
55 | #define I2C_BUFSTAT (I2C1BASE + 0x40)\r | |
56 | #define I2C_OA1 (I2C1BASE + 0x44)\r | |
57 | #define I2C_OA2 (I2C1BASE + 0x48)\r | |
58 | #define I2C_OA3 (I2C1BASE + 0x4C)\r | |
59 | #define I2C_ACTOA (I2C1BASE + 0x50)\r | |
60 | #define I2C_SBLOCK (I2C1BASE + 0x54)\r | |
61 | \r | |
62 | #endif //__OMAP3530I2C_H__\r |