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170ef2d9 GS |
1 | /** @file\r |
2 | Provide constructor and GetTick for Base instance of ACPI Timer Library\r | |
3 | \r | |
4 | Copyright (C) 2014, Gabriel L. Somlo <somlo@cmu.edu>\r | |
5 | \r | |
b26f0cf9 | 6 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
170ef2d9 GS |
7 | **/\r |
8 | \r | |
9 | #include <Library/DebugLib.h>\r | |
10 | #include <Library/IoLib.h>\r | |
11 | #include <Library/PciLib.h>\r | |
12 | #include <OvmfPlatforms.h>\r | |
13 | \r | |
170ef2d9 GS |
14 | //\r |
15 | // Cached ACPI Timer IO Address\r | |
16 | //\r | |
17 | STATIC UINT32 mAcpiTimerIoAddr;\r | |
18 | \r | |
19 | /**\r | |
f122712b GS |
20 | The constructor function caches the ACPI tick counter address, and,\r |
21 | if necessary, enables ACPI IO space.\r | |
170ef2d9 GS |
22 | \r |
23 | @retval EFI_SUCCESS The constructor always returns RETURN_SUCCESS.\r | |
24 | \r | |
25 | **/\r | |
26 | RETURN_STATUS\r | |
27 | EFIAPI\r | |
28 | AcpiTimerLibConstructor (\r | |
29 | VOID\r | |
30 | )\r | |
31 | {\r | |
32 | UINT16 HostBridgeDevId;\r | |
33 | UINTN Pmba;\r | |
1466b76f LE |
34 | UINT32 PmbaAndVal;\r |
35 | UINT32 PmbaOrVal;\r | |
e2ab3f81 GS |
36 | UINTN AcpiCtlReg;\r |
37 | UINT8 AcpiEnBit;\r | |
170ef2d9 GS |
38 | \r |
39 | //\r | |
40 | // Query Host Bridge DID to determine platform type\r | |
41 | //\r | |
42 | HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);\r | |
43 | switch (HostBridgeDevId) {\r | |
44 | case INTEL_82441_DEVICE_ID:\r | |
da372167 | 45 | Pmba = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMBA);\r |
1466b76f LE |
46 | PmbaAndVal = ~(UINT32)PIIX4_PMBA_MASK;\r |
47 | PmbaOrVal = PIIX4_PMBA_VALUE;\r | |
da372167 LE |
48 | AcpiCtlReg = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMREGMISC);\r |
49 | AcpiEnBit = PIIX4_PMREGMISC_PMIOSE;\r | |
170ef2d9 GS |
50 | break;\r |
51 | case INTEL_Q35_MCH_DEVICE_ID:\r | |
bc9d05d6 | 52 | Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);\r |
1466b76f LE |
53 | PmbaAndVal = ~(UINT32)ICH9_PMBASE_MASK;\r |
54 | PmbaOrVal = ICH9_PMBASE_VALUE;\r | |
bc9d05d6 LE |
55 | AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (ICH9_ACPI_CNTL);\r |
56 | AcpiEnBit = ICH9_ACPI_CNTL_ACPI_EN;\r | |
170ef2d9 GS |
57 | break;\r |
58 | default:\r | |
59 | DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",\r | |
60 | __FUNCTION__, HostBridgeDevId));\r | |
61 | ASSERT (FALSE);\r | |
62 | return RETURN_UNSUPPORTED;\r | |
63 | }\r | |
64 | \r | |
f122712b GS |
65 | //\r |
66 | // Check to see if the Power Management Base Address is already enabled\r | |
67 | //\r | |
e2ab3f81 | 68 | if ((PciRead8 (AcpiCtlReg) & AcpiEnBit) == 0) {\r |
f122712b GS |
69 | //\r |
70 | // If the Power Management Base Address is not programmed,\r | |
b2f4da39 | 71 | // then program it now.\r |
f122712b | 72 | //\r |
1466b76f | 73 | PciAndThenOr32 (Pmba, PmbaAndVal, PmbaOrVal);\r |
f122712b GS |
74 | \r |
75 | //\r | |
e2ab3f81 | 76 | // Enable PMBA I/O port decodes\r |
f122712b | 77 | //\r |
e2ab3f81 | 78 | PciOr8 (AcpiCtlReg, AcpiEnBit);\r |
f122712b GS |
79 | }\r |
80 | \r | |
ac759060 | 81 | mAcpiTimerIoAddr = (PciRead32 (Pmba) & ~PMBA_RTE) + ACPI_TIMER_OFFSET;\r |
170ef2d9 GS |
82 | return RETURN_SUCCESS;\r |
83 | }\r | |
84 | \r | |
85 | /**\r | |
86 | Internal function to read the current tick counter of ACPI.\r | |
87 | \r | |
88 | Read the current ACPI tick counter using the counter address cached\r | |
89 | by this instance's constructor.\r | |
90 | \r | |
91 | @return The tick counter read.\r | |
92 | \r | |
93 | **/\r | |
94 | UINT32\r | |
95 | InternalAcpiGetTimerTick (\r | |
96 | VOID\r | |
97 | )\r | |
98 | {\r | |
99 | //\r | |
100 | // Return the current ACPI timer value.\r | |
101 | //\r | |
102 | return IoRead32 (mAcpiTimerIoAddr);\r | |
103 | }\r |