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0c18794e | 1 | /** @file\r |
2 | The TPM definition block in ACPI table for physical presence \r | |
3 | and MemoryClear.\r | |
4 | \r | |
053f31e3 | 5 | Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.<BR>\r |
0c18794e | 6 | This program and the accompanying materials \r |
7 | are licensed and made available under the terms and conditions of the BSD License \r | |
8 | which accompanies this distribution. The full text of the license may be found at \r | |
9 | http://opensource.org/licenses/bsd-license.php\r | |
10 | \r | |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | \r | |
14 | **/\r | |
15 | \r | |
16 | DefinitionBlock (\r | |
17 | "Tpm.aml",\r | |
18 | "SSDT",\r | |
8b7d84ca | 19 | 2,\r |
e84f07b5 | 20 | "INTEL ",\r |
0c18794e | 21 | "TcgTable",\r |
22 | 0x1000\r | |
23 | )\r | |
24 | {\r | |
25 | Scope (\_SB)\r | |
26 | {\r | |
27 | Device (TPM)\r | |
28 | {\r | |
29 | //\r | |
30 | // Define _HID, "PNP0C31" is defined in\r | |
31 | // "Secure Startup-FVE and TPM Admin BIOS and Platform Requirements"\r | |
32 | //\r | |
33 | Name (_HID, EISAID ("PNP0C31"))\r | |
34 | \r | |
35 | //\r | |
36 | // Readable name of this device, don't know if this way is correct yet\r | |
37 | //\r | |
38 | Name (_STR, Unicode ("TPM 1.2 Device"))\r | |
39 | \r | |
40 | //\r | |
41 | // Return the resource consumed by TPM device\r | |
42 | //\r | |
43 | Name (_CRS, ResourceTemplate () {\r | |
161b8359 | 44 | Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)\r |
0c18794e | 45 | })\r |
46 | \r | |
47 | //\r | |
48 | // Operational region for Smi port access\r | |
49 | //\r | |
50 | OperationRegion (SMIP, SystemIO, 0xB2, 1)\r | |
51 | Field (SMIP, ByteAcc, NoLock, Preserve)\r | |
52 | { \r | |
53 | IOB2, 8\r | |
54 | }\r | |
55 | \r | |
56 | //\r | |
57 | // Operational region for TPM access\r | |
58 | //\r | |
59 | OperationRegion (TPMR, SystemMemory, 0xfed40000, 0x5000)\r | |
60 | Field (TPMR, AnyAcc, NoLock, Preserve)\r | |
61 | {\r | |
62 | ACC0, 8,\r | |
63 | }\r | |
64 | \r | |
65 | //\r | |
66 | // Operational region for TPM support, TPM Physical Presence and TPM Memory Clear\r | |
82a1e09c | 67 | // Region Offset 0xFFFF0000 and Length 0xF0 will be fixed in C code.\r |
0c18794e | 68 | //\r |
82a1e09c | 69 | OperationRegion (TNVS, SystemMemory, 0xFFFF0000, 0xF0)\r |
0c18794e | 70 | Field (TNVS, AnyAcc, NoLock, Preserve)\r |
71 | {\r | |
72 | PPIN, 8, // Software SMI for Physical Presence Interface\r | |
73 | PPIP, 32, // Used for save physical presence paramter\r | |
74 | PPRP, 32, // Physical Presence request operation response\r | |
75 | PPRQ, 32, // Physical Presence request operation\r | |
76 | LPPR, 32, // Last Physical Presence request operation\r | |
77 | FRET, 32, // Physical Presence function return code\r | |
78 | MCIN, 8, // Software SMI for Memory Clear Interface\r | |
79 | MCIP, 32, // Used for save the Mor paramter\r | |
82a1e09c | 80 | MORD, 32, // Memory Overwrite Request Data\r |
053f31e3 ZC |
81 | MRET, 32, // Memory Overwrite function return code\r |
82 | UCRQ, 32 // Phyical Presence request operation to Get User Confirmation Status \r | |
0c18794e | 83 | }\r |
84 | \r | |
85 | Method (PTS, 1, Serialized)\r | |
86 | { \r | |
87 | //\r | |
88 | // Detect Sx state for MOR, only S4, S5 need to handle\r | |
89 | //\r | |
90 | If (LAnd (LLess (Arg0, 6), LGreater (Arg0, 3)))\r | |
91 | { \r | |
92 | //\r | |
93 | // Bit4 -- DisableAutoDetect. 0 -- Firmware MAY autodetect.\r | |
94 | //\r | |
95 | If (LNot (And (MORD, 0x10)))\r | |
96 | {\r | |
97 | //\r | |
98 | // Triggle the SMI through ACPI _PTS method.\r | |
99 | //\r | |
100 | Store (0x02, MCIP)\r | |
101 | \r | |
102 | //\r | |
103 | // Triggle the SMI interrupt\r | |
104 | //\r | |
105 | Store (MCIN, IOB2)\r | |
106 | }\r | |
107 | }\r | |
108 | Return (0)\r | |
109 | } \r | |
110 | \r | |
111 | Method (_STA, 0)\r | |
112 | {\r | |
113 | if (LEqual (ACC0, 0xff))\r | |
114 | {\r | |
115 | Return (0)\r | |
116 | }\r | |
117 | Return (0x0f)\r | |
118 | }\r | |
119 | \r | |
120 | //\r | |
121 | // TCG Hardware Information\r | |
122 | //\r | |
87200170 | 123 | Method (HINF, 3, Serialized, 0, {BuffObj, PkgObj}, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj\r |
0c18794e | 124 | {\r |
125 | //\r | |
126 | // Switch by function index\r | |
127 | //\r | |
128 | Switch (ToInteger(Arg1))\r | |
129 | {\r | |
130 | Case (0)\r | |
131 | {\r | |
132 | //\r | |
133 | // Standard query\r | |
134 | //\r | |
135 | Return (Buffer () {0x03})\r | |
136 | }\r | |
137 | Case (1)\r | |
138 | {\r | |
139 | //\r | |
140 | // Return failure if no TPM present\r | |
141 | //\r | |
87200170 | 142 | Name(TPMV, Package () {0x01, Package () {0x1, 0x20}})\r |
0c18794e | 143 | if (LEqual (_STA (), 0x00))\r |
144 | {\r | |
145 | Return (Package () {0x00})\r | |
146 | }\r | |
147 | \r | |
148 | //\r | |
149 | // Return TPM version\r | |
150 | //\r | |
151 | Return (TPMV)\r | |
152 | }\r | |
153 | Default {BreakPoint}\r | |
154 | }\r | |
155 | Return (Buffer () {0})\r | |
156 | }\r | |
157 | \r | |
158 | Name(TPM2, Package (0x02){\r | |
159 | Zero, \r | |
160 | Zero\r | |
161 | })\r | |
162 | \r | |
163 | Name(TPM3, Package (0x03){\r | |
164 | Zero, \r | |
165 | Zero,\r | |
166 | Zero\r | |
167 | })\r | |
168 | \r | |
169 | //\r | |
170 | // TCG Physical Presence Interface\r | |
171 | //\r | |
87200170 | 172 | Method (TPPI, 3, Serialized, 0, {BuffObj, PkgObj, IntObj, StrObj}, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj\r |
0c18794e | 173 | { \r |
174 | //\r | |
175 | // Switch by function index\r | |
176 | //\r | |
177 | Switch (ToInteger(Arg1))\r | |
178 | {\r | |
179 | Case (0)\r | |
180 | {\r | |
181 | //\r | |
182 | // Standard query, supports function 1-8\r | |
183 | //\r | |
184 | Return (Buffer () {0xFF, 0x01})\r | |
185 | }\r | |
186 | Case (1)\r | |
187 | {\r | |
188 | //\r | |
189 | // a) Get Physical Presence Interface Version\r | |
190 | //\r | |
191 | Return ("1.2")\r | |
192 | }\r | |
193 | Case (2)\r | |
194 | {\r | |
195 | //\r | |
196 | // b) Submit TPM Operation Request to Pre-OS Environment\r | |
197 | //\r | |
198 | \r | |
199 | Store (DerefOf (Index (Arg2, 0x00)), PPRQ)\r | |
200 | Store (0x02, PPIP)\r | |
201 | \r | |
202 | //\r | |
203 | // Triggle the SMI interrupt\r | |
204 | //\r | |
205 | Store (PPIN, IOB2)\r | |
206 | Return (FRET)\r | |
207 | \r | |
208 | \r | |
209 | }\r | |
210 | Case (3)\r | |
211 | {\r | |
212 | //\r | |
213 | // c) Get Pending TPM Operation Requested By the OS\r | |
214 | //\r | |
215 | \r | |
216 | Store (PPRQ, Index (TPM2, 0x01))\r | |
217 | Return (TPM2)\r | |
218 | }\r | |
219 | Case (4)\r | |
220 | {\r | |
221 | //\r | |
222 | // d) Get Platform-Specific Action to Transition to Pre-OS Environment\r | |
223 | //\r | |
224 | Return (2)\r | |
225 | }\r | |
226 | Case (5)\r | |
227 | {\r | |
228 | //\r | |
229 | // e) Return TPM Operation Response to OS Environment\r | |
230 | //\r | |
231 | Store (0x05, PPIP)\r | |
232 | \r | |
233 | //\r | |
234 | // Triggle the SMI interrupt\r | |
235 | //\r | |
236 | Store (PPIN, IOB2)\r | |
237 | \r | |
238 | Store (LPPR, Index (TPM3, 0x01))\r | |
239 | Store (PPRP, Index (TPM3, 0x02))\r | |
240 | \r | |
241 | Return (TPM3)\r | |
242 | }\r | |
243 | Case (6)\r | |
244 | {\r | |
245 | \r | |
246 | //\r | |
247 | // f) Submit preferred user language (Not implemented)\r | |
248 | //\r | |
249 | \r | |
250 | Return (3)\r | |
251 | \r | |
252 | }\r | |
253 | Case (7)\r | |
254 | {\r | |
255 | //\r | |
256 | // g) Submit TPM Operation Request to Pre-OS Environment 2\r | |
257 | //\r | |
258 | Store (7, PPIP)\r | |
259 | Store (DerefOf (Index (Arg2, 0x00)), PPRQ)\r | |
260 | \r | |
261 | //\r | |
262 | // Triggle the SMI interrupt \r | |
263 | //\r | |
264 | Store (PPIN, IOB2) \r | |
265 | Return (FRET)\r | |
266 | }\r | |
267 | Case (8)\r | |
268 | {\r | |
269 | //\r | |
270 | // e) Get User Confirmation Status for Operation\r | |
271 | //\r | |
272 | Store (8, PPIP)\r | |
053f31e3 | 273 | Store (DerefOf (Index (Arg2, 0x00)), UCRQ)\r |
0c18794e | 274 | \r |
275 | //\r | |
276 | // Triggle the SMI interrupt\r | |
277 | //\r | |
278 | Store (PPIN, IOB2)\r | |
279 | \r | |
280 | Return (FRET)\r | |
281 | }\r | |
282 | \r | |
283 | Default {BreakPoint}\r | |
284 | }\r | |
285 | Return (1)\r | |
286 | }\r | |
287 | \r | |
87200170 | 288 | Method (TMCI, 3, Serialized, 0, IntObj, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj\r |
0c18794e | 289 | {\r |
290 | //\r | |
291 | // Switch by function index\r | |
292 | //\r | |
293 | Switch (ToInteger (Arg1))\r | |
294 | {\r | |
295 | Case (0)\r | |
296 | {\r | |
297 | //\r | |
298 | // Standard query, supports function 1-1\r | |
299 | //\r | |
300 | Return (Buffer () {0x03})\r | |
301 | }\r | |
302 | Case (1)\r | |
303 | {\r | |
304 | //\r | |
305 | // Save the Operation Value of the Request to MORD (reserved memory)\r | |
306 | //\r | |
307 | Store (DerefOf (Index (Arg2, 0x00)), MORD)\r | |
308 | \r | |
309 | //\r | |
310 | // Triggle the SMI through ACPI _DSM method.\r | |
311 | //\r | |
312 | Store (0x01, MCIP)\r | |
313 | \r | |
314 | //\r | |
315 | // Triggle the SMI interrupt\r | |
316 | //\r | |
317 | Store (MCIN, IOB2)\r | |
82a1e09c | 318 | Return (MRET)\r |
0c18794e | 319 | }\r |
320 | Default {BreakPoint}\r | |
321 | }\r | |
322 | Return (1) \r | |
323 | }\r | |
324 | \r | |
325 | Method (_DSM, 4, Serialized, 0, UnknownObj, {BuffObj, IntObj, IntObj, PkgObj})\r | |
326 | {\r | |
327 | \r | |
328 | //\r | |
329 | // TCG Hardware Information\r | |
330 | //\r | |
331 | If(LEqual(Arg0, ToUUID ("cf8e16a5-c1e8-4e25-b712-4f54a96702c8")))\r | |
332 | {\r | |
333 | Return (HINF (Arg1, Arg2, Arg3))\r | |
334 | }\r | |
335 | \r | |
336 | //\r | |
337 | // TCG Physical Presence Interface\r | |
338 | //\r | |
339 | If(LEqual(Arg0, ToUUID ("3dddfaa6-361b-4eb4-a424-8d10089d1653")))\r | |
340 | {\r | |
341 | Return (TPPI (Arg1, Arg2, Arg3))\r | |
342 | }\r | |
343 | \r | |
344 | //\r | |
345 | // TCG Memory Clear Interface\r | |
346 | //\r | |
347 | If(LEqual(Arg0, ToUUID ("376054ed-cc13-4675-901c-4756d7f2d45d")))\r | |
348 | {\r | |
349 | Return (TMCI (Arg1, Arg2, Arg3))\r | |
350 | }\r | |
351 | \r | |
352 | Return (Buffer () {0})\r | |
353 | }\r | |
354 | }\r | |
355 | }\r | |
356 | }\r |