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[mirror_edk2.git] / UefiCpuPkg / Library / MpInitLib / MpLib.h
CommitLineData
3e8ad6bd
JF		 1/** @file\r
2 Common header file for MP Initialize Library.\r
3\r
8c61f193 4 Copyright (c) 2016 - 2021, Intel Corporation. All rights reserved.<BR>\r
4c0f6e34
LD		 5 Copyright (c) 2020, AMD Inc. All rights reserved.<BR>\r
6\r
0acd8697 7 SPDX-License-Identifier: BSD-2-Clause-Patent\r
3e8ad6bd
JF		 8\r
9**/\r
10\r
11#ifndef _MP_LIB_H_\r
12#define _MP_LIB_H_\r
13\r
14#include <PiPei.h>\r
15\r
01acb06c 16#include <Register/Intel/Cpuid.h>\r
4c0f6e34 17#include <Register/Amd/Cpuid.h>\r
01acb06c
RN		 18#include <Register/Intel/Msr.h>\r
19#include <Register/Intel/LocalApic.h>\r
20#include <Register/Intel/Microcode.h>\r
3e8ad6bd
JF		 21\r
22#include <Library/MpInitLib.h>\r
23#include <Library/BaseLib.h>\r
24#include <Library/BaseMemoryLib.h>\r
25#include <Library/MemoryAllocationLib.h>\r
26#include <Library/DebugLib.h>\r
27#include <Library/LocalApicLib.h>\r
28#include <Library/CpuLib.h>\r
29#include <Library/UefiCpuLib.h>\r
30#include <Library/TimerLib.h>\r
31#include <Library/SynchronizationLib.h>\r
32#include <Library/MtrrLib.h>\r
33#include <Library/HobLib.h>\r
d5339c04 34#include <Library/PcdLib.h>\r
bce03284 35#include <Library/MicrocodeLib.h>\r
3e8ad6bd 36\r
e2289d19
BS		 37#include <Register/Amd/Fam17Msr.h>\r
38#include <Register/Amd/Ghcb.h>\r
39\r
348a34d9
HW		 40#include <Guid/MicrocodePatchHob.h>\r
41\r
053e878b 42#define WAKEUP_AP_SIGNAL SIGNATURE_32 ('S', 'T', 'A', 'P')\r
b8b04307 43\r
93ca4c0f
JF		 44#define CPU_INIT_MP_LIB_HOB_GUID \\r
45 { \\r
46 0x58eb6a19, 0x3699, 0x4c68, { 0xa8, 0x36, 0xda, 0xcd, 0x8e, 0xdc, 0xad, 0x4a } \\r
47 }\r
48\r
41be0da5
JF		 49//\r
50// The MP data for switch BSP\r
51//\r
053e878b
MK		 52#define CPU_SWITCH_STATE_IDLE 0\r
53#define CPU_SWITCH_STATE_STORED 1\r
54#define CPU_SWITCH_STATE_LOADED 2\r
41be0da5 55\r
d786a172
HW		 56//\r
57// Default maximum number of entries to store the microcode patches information\r
58//\r
053e878b 59#define DEFAULT_MAX_MICROCODE_PATCH_NUM 8\r
d786a172
HW		 60\r
61//\r
62// Data structure for microcode patch information\r
63//\r
64typedef struct {\r
65 UINTN Address;\r
66 UINTN Size;\r
d786a172
HW		 67} MICROCODE_PATCH_INFO;\r
68\r
41be0da5
JF		 69//\r
70// CPU exchange information for switch BSP\r
71//\r
72typedef struct {\r
053e878b
MK		 73 UINT8 State; // offset 0\r
74 UINTN StackPointer; // offset 4 / 8\r
75 IA32_DESCRIPTOR Gdtr; // offset 8 / 16\r
76 IA32_DESCRIPTOR Idtr; // offset 14 / 26\r
41be0da5
JF		 77} CPU_EXCHANGE_ROLE_INFO;\r
78\r
9ebcf0f4
JF		 79//\r
80// AP loop state when APs are in idle state\r
81// It's value is the same with PcdCpuApLoopMode\r
82//\r
83typedef enum {\r
84 ApInHltLoop = 1,\r
85 ApInMwaitLoop = 2,\r
86 ApInRunLoop = 3\r
87} AP_LOOP_MODE;\r
88\r
e59f8f6b
JF		 89//\r
90// AP initialization state during APs wakeup\r
91//\r
92typedef enum {\r
93 ApInitConfig = 1,\r
94 ApInitReconfig = 2,\r
95 ApInitDone = 3\r
96} AP_INIT_STATE;\r
97\r
03a1a925
JF		 98//\r
99// AP state\r
100//\r
2a5997f8
ED		 101// The state transitions for an AP when it process a procedure are:\r
102// Idle ----> Ready ----> Busy ----> Idle\r
103// [BSP] [AP] [AP]\r
104//\r
03a1a925
JF		 105typedef enum {\r
106 CpuStateIdle,\r
107 CpuStateReady,\r
108 CpuStateBusy,\r
e048ce88 109 CpuStateFinished,\r
03a1a925
JF		 110 CpuStateDisabled\r
111} CPU_STATE;\r
112\r
68cb9330
JF		 113//\r
114// CPU volatile registers around INIT-SIPI-SIPI\r
115//\r
116typedef struct {\r
053e878b
MK		 117 UINTN Cr0;\r
118 UINTN Cr3;\r
119 UINTN Cr4;\r
120 UINTN Dr0;\r
121 UINTN Dr1;\r
122 UINTN Dr2;\r
123 UINTN Dr3;\r
124 UINTN Dr6;\r
125 UINTN Dr7;\r
126 IA32_DESCRIPTOR Gdtr;\r
127 IA32_DESCRIPTOR Idtr;\r
128 UINT16 Tr;\r
68cb9330
JF		 129} CPU_VOLATILE_REGISTERS;\r
130\r
e59f8f6b
JF		 131//\r
132// AP related data\r
133//\r
134typedef struct {\r
053e878b
MK		 135 SPIN_LOCK ApLock;\r
136 volatile UINT32 *StartupApSignal;\r
137 volatile UINTN ApFunction;\r
138 volatile UINTN ApFunctionArgument;\r
139 BOOLEAN CpuHealthy;\r
140 volatile CPU_STATE State;\r
141 CPU_VOLATILE_REGISTERS VolatileRegisters;\r
142 BOOLEAN Waiting;\r
143 BOOLEAN *Finished;\r
144 UINT64 ExpectedTime;\r
145 UINT64 CurrentTime;\r
146 UINT64 TotalTime;\r
147 EFI_EVENT WaitEvent;\r
148 UINT32 ProcessorSignature;\r
149 UINT8 PlatformId;\r
150 UINT64 MicrocodeEntryAddr;\r
151 UINT32 MicrocodeRevision;\r
e59f8f6b
JF		 152} CPU_AP_DATA;\r
153\r
154//\r
155// Basic CPU information saved in Guided HOB.\r
156// Because the contents will be shard between PEI and DXE,\r
157// we need to make sure the each fields offset same in different\r
158// architecture.\r
159//\r
dd3fa0cd 160#pragma pack (1)\r
e59f8f6b 161typedef struct {\r
053e878b
MK		 162 UINT32 InitialApicId;\r
163 UINT32 ApicId;\r
164 UINT32 Health;\r
165 UINT64 ApTopOfStack;\r
e59f8f6b 166} CPU_INFO_IN_HOB;\r
dd3fa0cd 167#pragma pack ()\r
e59f8f6b 168\r
f7f85d83
JF		 169//\r
170// AP reset code information including code address and size,\r
171// this structure will be shared be C code and assembly code.\r
172// It is natural aligned by design.\r
173//\r
174typedef struct {\r
053e878b
MK		 175 UINT8 *RendezvousFunnelAddress;\r
176 UINTN ModeEntryOffset;\r
177 UINTN RendezvousFunnelSize;\r
178 UINT8 *RelocateApLoopFuncAddress;\r
179 UINTN RelocateApLoopFuncSize;\r
180 UINTN ModeTransitionOffset;\r
181 UINTN SwitchToRealSize;\r
182 UINTN SwitchToRealOffset;\r
183 UINTN SwitchToRealNoNxOffset;\r
184 UINTN SwitchToRealPM16ModeOffset;\r
185 UINTN SwitchToRealPM16ModeSize;\r
f7f85d83 186} MP_ASSEMBLY_ADDRESS_MAP;\r
3e8ad6bd 187\r
053e878b 188typedef struct _CPU_MP_DATA CPU_MP_DATA;\r
e59f8f6b 189\r
d94e5f67
JF		 190#pragma pack(1)\r
191\r
192//\r
193// MP CPU exchange information for AP reset code\r
194// This structure is required to be packed because fixed field offsets\r
195// into this structure are used in assembly code in this module\r
196//\r
197typedef struct {\r
053e878b
MK		 198 UINTN StackStart;\r
199 UINTN StackSize;\r
200 UINTN CFunction;\r
201 IA32_DESCRIPTOR GdtrProfile;\r
202 IA32_DESCRIPTOR IdtrProfile;\r
203 UINTN BufferStart;\r
204 UINTN ModeOffset;\r
205 UINTN ApIndex;\r
206 UINTN CodeSegment;\r
207 UINTN DataSegment;\r
208 UINTN EnableExecuteDisable;\r
209 UINTN Cr3;\r
210 UINTN InitFlag;\r
211 CPU_INFO_IN_HOB *CpuInfo;\r
212 UINTN NumApsExecuting;\r
213 CPU_MP_DATA *CpuMpData;\r
214 UINTN InitializeFloatingPointUnitsAddress;\r
215 UINT32 ModeTransitionMemory;\r
216 UINT16 ModeTransitionSegment;\r
217 UINT32 ModeHighMemory;\r
218 UINT16 ModeHighSegment;\r
09f69a87
RN		 219 //\r
220 // Enable5LevelPaging indicates whether 5-level paging is enabled in long mode.\r
221 //\r
053e878b
MK		 222 BOOLEAN Enable5LevelPaging;\r
223 BOOLEAN SevEsIsEnabled;\r
224 UINTN GhcbBase;\r
d94e5f67
JF		 225} MP_CPU_EXCHANGE_INFO;\r
226\r
227#pragma pack()\r
e59f8f6b
JF		 228\r
229//\r
230// CPU MP Data save in memory\r
231//\r
232struct _CPU_MP_DATA {\r
053e878b
MK		 233 UINT64 CpuInfoInHob;\r
234 UINT32 CpuCount;\r
235 UINT32 BspNumber;\r
e59f8f6b
JF		 236 //\r
237 // The above fields data will be passed from PEI to DXE\r
238 // Please make sure the fields offset same in the different\r
239 // architecture.\r
240 //\r
053e878b
MK		 241 SPIN_LOCK MpLock;\r
242 UINTN Buffer;\r
243 UINTN CpuApStackSize;\r
244 MP_ASSEMBLY_ADDRESS_MAP AddressMap;\r
245 UINTN WakeupBuffer;\r
246 UINTN WakeupBufferHigh;\r
247 UINTN BackupBuffer;\r
248 UINTN BackupBufferSize;\r
249\r
250 volatile UINT32 FinishedCount;\r
251 UINT32 RunningCount;\r
252 BOOLEAN SingleThread;\r
253 EFI_AP_PROCEDURE Procedure;\r
254 VOID *ProcArguments;\r
255 BOOLEAN *Finished;\r
256 UINT64 ExpectedTime;\r
257 UINT64 CurrentTime;\r
258 UINT64 TotalTime;\r
259 EFI_EVENT WaitEvent;\r
260 UINTN **FailedCpuList;\r
261\r
262 AP_INIT_STATE InitFlag;\r
263 BOOLEAN SwitchBspFlag;\r
264 UINTN NewBspNumber;\r
265 CPU_EXCHANGE_ROLE_INFO BSPInfo;\r
266 CPU_EXCHANGE_ROLE_INFO APInfo;\r
267 MTRR_SETTINGS MtrrTable;\r
268 UINT8 ApLoopMode;\r
269 UINT8 ApTargetCState;\r
270 UINT16 PmCodeSegment;\r
271 UINT16 Pm16CodeSegment;\r
272 CPU_AP_DATA *CpuData;\r
273 volatile MP_CPU_EXCHANGE_INFO *MpCpuExchangeInfo;\r
274\r
275 UINT32 CurrentTimerCount;\r
276 UINTN DivideValue;\r
277 UINT8 Vector;\r
278 BOOLEAN PeriodicMode;\r
279 BOOLEAN TimerInterruptState;\r
280 UINT64 MicrocodePatchAddress;\r
281 UINT64 MicrocodePatchRegionSize;\r
2a089134 282\r
58942277
ED		 283 //\r
284 // Whether need to use Init-Sipi-Sipi to wake up the APs.\r
285 // Two cases need to set this value to TRUE. One is in HLT\r
286 // loop mode, the other is resume from S3 which loop mode\r
e23d9c3e 287 // will be hardcode change to HLT mode by PiSmmCpuDxeSmm\r
58942277
ED		 288 // driver.\r
289 //\r
053e878b 290 BOOLEAN WakeUpByInitSipiSipi;\r
e88a5b98 291\r
053e878b
MK		 292 BOOLEAN SevEsIsEnabled;\r
293 UINTN SevEsAPBuffer;\r
294 UINTN SevEsAPResetStackStart;\r
295 CPU_MP_DATA *NewCpuMpData;\r
7b7508ad 296\r
053e878b 297 UINT64 GhcbBase;\r
e59f8f6b 298};\r
93ca4c0f 299\r
053e878b
MK		 300#define AP_SAFE_STACK_SIZE 128\r
301#define AP_RESET_STACK_SIZE AP_SAFE_STACK_SIZE\r
7b7508ad
TL		 302\r
303#pragma pack(1)\r
304\r
305typedef struct {\r
053e878b
MK		 306 UINT8 InsnBuffer[8];\r
307 UINT16 Rip;\r
308 UINT16 Segment;\r
7b7508ad
TL		 309} SEV_ES_AP_JMP_FAR;\r
310\r
311#pragma pack()\r
312\r
313/**\r
314 Assembly code to move an AP from long mode to real mode.\r
315\r
316 Move an AP from long mode to real mode in preparation to invoking\r
317 the reset vector. This is used for SEV-ES guests where a hypervisor\r
318 is not allowed to set the CS and RIP to point to the reset vector.\r
319\r
320 @param[in] BufferStart The reset vector target.\r
321 @param[in] Code16 16-bit protected mode code segment value.\r
322 @param[in] Code32 32-bit protected mode code segment value.\r
323 @param[in] StackStart The start of a stack to be used for transitioning\r
324 from long mode to real mode.\r
325**/\r
326typedef\r
e2289d19 327 VOID\r
053e878b 328(EFIAPI AP_RESET)(\r
7b7508ad
TL		 329 IN UINTN BufferStart,\r
330 IN UINT16 Code16,\r
331 IN UINT16 Code32,\r
332 IN UINTN StackStart\r
333 );\r
334\r
053e878b 335extern EFI_GUID mCpuInitMpLibHobGuid;\r
93ca4c0f 336\r
76157021
JF		 337/**\r
338 Assembly code to place AP into safe loop mode.\r
339\r
340 Place AP into targeted C-State if MONITOR is supported, otherwise\r
341 place AP into hlt state.\r
342 Place AP in protected mode if the current is long mode. Due to AP maybe\r
343 wakeup by some hardware event. It could avoid accessing page table that\r
344 may not available during booting to OS.\r
345\r
346 @param[in] MwaitSupport TRUE indicates MONITOR is supported.\r
347 FALSE indicates MONITOR is not supported.\r
348 @param[in] ApTargetCState Target C-State value.\r
349 @param[in] PmCodeSegment Protected mode code segment value.\r
350**/\r
351typedef\r
e2289d19 352 VOID\r
053e878b 353(EFIAPI *ASM_RELOCATE_AP_LOOP)(\r
76157021
JF		 354 IN BOOLEAN MwaitSupport,\r
355 IN UINTN ApTargetCState,\r
bf2786dc 356 IN UINTN PmCodeSegment,\r
9f91cb01 357 IN UINTN TopOfApStack,\r
20da7ca4
TL		 358 IN UINTN NumberToFinish,\r
359 IN UINTN Pm16CodeSegment,\r
360 IN UINTN SevEsAPJumpTable,\r
361 IN UINTN WakeupBuffer\r
76157021 362 );\r
f7f85d83
JF		 363\r
364/**\r
365 Assembly code to get starting address and size of the rendezvous entry for APs.\r
366 Information for fixing a jump instruction in the code is also returned.\r
367\r
368 @param[out] AddressMap Output buffer for address map information.\r
369**/\r
370VOID\r
371EFIAPI\r
372AsmGetAddressMap (\r
053e878b 373 OUT MP_ASSEMBLY_ADDRESS_MAP *AddressMap\r
f7f85d83
JF		 374 );\r
375\r
41be0da5
JF		 376/**\r
377 This function is called by both the BSP and the AP which is to become the BSP to\r
378 Exchange execution context including stack between them. After return from this\r
379 function, the BSP becomes AP and the AP becomes the BSP.\r
380\r
381 @param[in] MyInfo Pointer to buffer holding the exchanging information for the executing processor.\r
382 @param[in] OthersInfo Pointer to buffer holding the exchanging information for the peer.\r
383\r
384**/\r
385VOID\r
386EFIAPI\r
387AsmExchangeRole (\r
053e878b
MK		 388 IN CPU_EXCHANGE_ROLE_INFO *MyInfo,\r
389 IN CPU_EXCHANGE_ROLE_INFO *OthersInfo\r
41be0da5
JF		 390 );\r
391\r
93ca4c0f
JF		 392/**\r
393 Get the pointer to CPU MP Data structure.\r
394\r
395 @return The pointer to CPU MP Data structure.\r
396**/\r
397CPU_MP_DATA *\r
398GetCpuMpData (\r
399 VOID\r
400 );\r
401\r
402/**\r
403 Save the pointer to CPU MP Data structure.\r
404\r
405 @param[in] CpuMpData The pointer to CPU MP Data structure will be saved.\r
406**/\r
407VOID\r
408SaveCpuMpData (\r
053e878b 409 IN CPU_MP_DATA *CpuMpData\r
93ca4c0f
JF		 410 );\r
411\r
ed66e0e3 412/**\r
a6b3d753 413 Get available system memory below 1MB by specified size.\r
ed66e0e3 414\r
a6b3d753
SZ		 415 @param[in] WakeupBufferSize Wakeup buffer size required\r
416\r
417 @retval other Return wakeup buffer address below 1MB.\r
418 @retval -1 Cannot find free memory below 1MB.\r
ed66e0e3 419**/\r
a6b3d753
SZ		 420UINTN\r
421GetWakeupBuffer (\r
053e878b 422 IN UINTN WakeupBufferSize\r
ed66e0e3
JF		 423 );\r
424\r
f32bfe6d
JW		 425/**\r
426 Get available EfiBootServicesCode memory below 4GB by specified size.\r
427\r
428 This buffer is required to safely transfer AP from real address mode to\r
429 protected mode or long mode, due to the fact that the buffer returned by\r
430 GetWakeupBuffer() may be marked as non-executable.\r
431\r
432 @param[in] BufferSize Wakeup transition buffer size.\r
433\r
434 @retval other Return wakeup transition buffer address below 4GB.\r
435 @retval 0 Cannot find free memory below 4GB.\r
436**/\r
437UINTN\r
438GetModeTransitionBuffer (\r
053e878b 439 IN UINTN BufferSize\r
f32bfe6d
JW		 440 );\r
441\r
7b7508ad
TL		 442/**\r
443 Return the address of the SEV-ES AP jump table.\r
444\r
445 This buffer is required in order for an SEV-ES guest to transition from\r
446 UEFI into an OS.\r
447\r
448 @return Return SEV-ES AP jump table buffer\r
449**/\r
450UINTN\r
451GetSevEsAPMemory (\r
452 VOID\r
453 );\r
454\r
96f5920d
JF		 455/**\r
456 This function will be called by BSP to wakeup AP.\r
457\r
458 @param[in] CpuMpData Pointer to CPU MP Data\r
459 @param[in] Broadcast TRUE: Send broadcast IPI to all APs\r
460 FALSE: Send IPI to AP by ApicId\r
461 @param[in] ProcessorNumber The handle number of specified processor\r
462 @param[in] Procedure The function to be invoked by AP\r
463 @param[in] ProcedureArgument The argument to be passed into AP function\r
cf4e79e4 464 @param[in] WakeUpDisabledAps Whether need to wake up disabled APs in broadcast mode.\r
96f5920d
JF		 465**/\r
466VOID\r
467WakeUpAP (\r
053e878b
MK		 468 IN CPU_MP_DATA *CpuMpData,\r
469 IN BOOLEAN Broadcast,\r
470 IN UINTN ProcessorNumber,\r
471 IN EFI_AP_PROCEDURE Procedure OPTIONAL,\r
472 IN VOID *ProcedureArgument OPTIONAL,\r
473 IN BOOLEAN WakeUpDisabledAps OPTIONAL\r
96f5920d
JF		 474 );\r
475\r
93ca4c0f
JF		 476/**\r
477 Initialize global data for MP support.\r
478\r
479 @param[in] CpuMpData The pointer to CPU MP Data structure.\r
480**/\r
481VOID\r
482InitMpGlobalData (\r
053e878b 483 IN CPU_MP_DATA *CpuMpData\r
93ca4c0f
JF		 484 );\r
485\r
86efe976
JF		 486/**\r
487 Worker function to execute a caller provided function on all enabled APs.\r
488\r
489 @param[in] Procedure A pointer to the function to be run on\r
490 enabled APs of the system.\r
491 @param[in] SingleThread If TRUE, then all the enabled APs execute\r
492 the function specified by Procedure one by\r
493 one, in ascending order of processor handle\r
494 number. If FALSE, then all the enabled APs\r
495 execute the function specified by Procedure\r
496 simultaneously.\r
ee0c39fa 497 @param[in] ExcludeBsp Whether let BSP also trig this task.\r
86efe976
JF		 498 @param[in] WaitEvent The event created by the caller with CreateEvent()\r
499 service.\r
367284e7 500 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r
86efe976
JF		 501 APs to return from Procedure, either for\r
502 blocking or non-blocking mode.\r
503 @param[in] ProcedureArgument The parameter passed into Procedure for\r
504 all APs.\r
505 @param[out] FailedCpuList If all APs finish successfully, then its\r
506 content is set to NULL. If not all APs\r
507 finish before timeout expires, then its\r
508 content is set to address of the buffer\r
509 holding handle numbers of the failed APs.\r
510\r
511 @retval EFI_SUCCESS In blocking mode, all APs have finished before\r
512 the timeout expired.\r
513 @retval EFI_SUCCESS In non-blocking mode, function has been dispatched\r
514 to all enabled APs.\r
515 @retval others Failed to Startup all APs.\r
516\r
517**/\r
518EFI_STATUS\r
ee0c39fa 519StartupAllCPUsWorker (\r
053e878b
MK		 520 IN EFI_AP_PROCEDURE Procedure,\r
521 IN BOOLEAN SingleThread,\r
522 IN BOOLEAN ExcludeBsp,\r
523 IN EFI_EVENT WaitEvent OPTIONAL,\r
524 IN UINTN TimeoutInMicroseconds,\r
525 IN VOID *ProcedureArgument OPTIONAL,\r
526 OUT UINTN **FailedCpuList OPTIONAL\r
86efe976
JF		 527 );\r
528\r
20ae5774
JF		 529/**\r
530 Worker function to let the caller get one enabled AP to execute a caller-provided\r
531 function.\r
532\r
533 @param[in] Procedure A pointer to the function to be run on\r
534 enabled APs of the system.\r
535 @param[in] ProcessorNumber The handle number of the AP.\r
536 @param[in] WaitEvent The event created by the caller with CreateEvent()\r
537 service.\r
367284e7 538 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r
20ae5774
JF		 539 APs to return from Procedure, either for\r
540 blocking or non-blocking mode.\r
541 @param[in] ProcedureArgument The parameter passed into Procedure for\r
542 all APs.\r
543 @param[out] Finished If AP returns from Procedure before the\r
544 timeout expires, its content is set to TRUE.\r
545 Otherwise, the value is set to FALSE.\r
546\r
547 @retval EFI_SUCCESS In blocking mode, specified AP finished before\r
548 the timeout expires.\r
549 @retval others Failed to Startup AP.\r
550\r
551**/\r
552EFI_STATUS\r
553StartupThisAPWorker (\r
053e878b
MK		 554 IN EFI_AP_PROCEDURE Procedure,\r
555 IN UINTN ProcessorNumber,\r
556 IN EFI_EVENT WaitEvent OPTIONAL,\r
557 IN UINTN TimeoutInMicroseconds,\r
558 IN VOID *ProcedureArgument OPTIONAL,\r
559 OUT BOOLEAN *Finished OPTIONAL\r
20ae5774
JF		 560 );\r
561\r
41be0da5
JF		 562/**\r
563 Worker function to switch the requested AP to be the BSP from that point onward.\r
564\r
565 @param[in] ProcessorNumber The handle number of AP that is to become the new BSP.\r
566 @param[in] EnableOldBSP If TRUE, then the old BSP will be listed as an\r
567 enabled AP. Otherwise, it will be disabled.\r
568\r
569 @retval EFI_SUCCESS BSP successfully switched.\r
7367cc6c 570 @retval others Failed to switch BSP.\r
41be0da5
JF		 571\r
572**/\r
573EFI_STATUS\r
574SwitchBSPWorker (\r
053e878b
MK		 575 IN UINTN ProcessorNumber,\r
576 IN BOOLEAN EnableOldBSP\r
41be0da5
JF		 577 );\r
578\r
e37109bc
JF		 579/**\r
580 Worker function to let the caller enable or disable an AP from this point onward.\r
581 This service may only be called from the BSP.\r
582\r
583 @param[in] ProcessorNumber The handle number of AP.\r
584 @param[in] EnableAP Specifies the new state for the processor for\r
585 enabled, FALSE for disabled.\r
586 @param[in] HealthFlag If not NULL, a pointer to a value that specifies\r
587 the new health status of the AP.\r
588\r
589 @retval EFI_SUCCESS The specified AP was enabled or disabled successfully.\r
590 @retval others Failed to Enable/Disable AP.\r
591\r
592**/\r
593EFI_STATUS\r
594EnableDisableApWorker (\r
053e878b
MK		 595 IN UINTN ProcessorNumber,\r
596 IN BOOLEAN EnableAP,\r
597 IN UINT32 *HealthFlag OPTIONAL\r
e37109bc
JF		 598 );\r
599\r
93ca4c0f
JF		 600/**\r
601 Get pointer to CPU MP Data structure from GUIDed HOB.\r
602\r
603 @return The pointer to CPU MP Data structure.\r
604**/\r
605CPU_MP_DATA *\r
606GetCpuMpDataFromGuidedHob (\r
607 VOID\r
608 );\r
08085f08
JF		 609\r
610/** Checks status of specified AP.\r
611\r
612 This function checks whether the specified AP has finished the task assigned\r
613 by StartupThisAP(), and whether timeout expires.\r
614\r
615 @param[in] ProcessorNumber The handle number of processor.\r
616\r
617 @retval EFI_SUCCESS Specified AP has finished task assigned by StartupThisAPs().\r
618 @retval EFI_TIMEOUT The timeout expires.\r
619 @retval EFI_NOT_READY Specified AP has not finished task and timeout has not expired.\r
620**/\r
621EFI_STATUS\r
622CheckThisAP (\r
053e878b 623 IN UINTN ProcessorNumber\r
08085f08
JF		 624 );\r
625\r
626/**\r
627 Checks status of all APs.\r
628\r
629 This function checks whether all APs have finished task assigned by StartupAllAPs(),\r
630 and whether timeout expires.\r
631\r
632 @retval EFI_SUCCESS All APs have finished task assigned by StartupAllAPs().\r
633 @retval EFI_TIMEOUT The timeout expires.\r
634 @retval EFI_NOT_READY APs have not finished task and timeout has not expired.\r
635**/\r
636EFI_STATUS\r
637CheckAllAPs (\r
638 VOID\r
639 );\r
640\r
641/**\r
642 Checks APs status and updates APs status if needed.\r
643\r
644**/\r
645VOID\r
646CheckAndUpdateApsStatus (\r
647 VOID\r
648 );\r
649\r
94f63c76
JF		 650/**\r
651 Detect whether specified processor can find matching microcode patch and load it.\r
652\r
e1ed5573
HW		 653 @param[in] CpuMpData The pointer to CPU MP Data structure.\r
654 @param[in] ProcessorNumber The handle number of the processor. The range is\r
655 from 0 to the total number of logical processors\r
656 minus 1.\r
94f63c76
JF		 657**/\r
658VOID\r
659MicrocodeDetect (\r
053e878b
MK		 660 IN CPU_MP_DATA *CpuMpData,\r
661 IN UINTN ProcessorNumber\r
94f63c76
JF		 662 );\r
663\r
d786a172 664/**\r
dd017041 665 Shadow the required microcode patches data into memory.\r
d786a172
HW		 666\r
667 @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
668**/\r
669VOID\r
dd017041 670ShadowMicrocodeUpdatePatch (\r
053e878b 671 IN OUT CPU_MP_DATA *CpuMpData\r
d786a172
HW		 672 );\r
673\r
348a34d9
HW		 674/**\r
675 Get the cached microcode patch base address and size from the microcode patch\r
676 information cache HOB.\r
677\r
678 @param[out] Address Base address of the microcode patches data.\r
679 It will be updated if the microcode patch\r
680 information cache HOB is found.\r
681 @param[out] RegionSize Size of the microcode patches data.\r
682 It will be updated if the microcode patch\r
683 information cache HOB is found.\r
684\r
685 @retval TRUE The microcode patch information cache HOB is found.\r
686 @retval FALSE The microcode patch information cache HOB is not found.\r
687\r
688**/\r
689BOOLEAN\r
690GetMicrocodePatchInfoFromHob (\r
053e878b
MK		 691 UINT64 *Address,\r
692 UINT64 *RegionSize\r
348a34d9
HW		 693 );\r
694\r
4d3314f6
JF		 695/**\r
696 Detect whether Mwait-monitor feature is supported.\r
697\r
698 @retval TRUE Mwait-monitor feature is supported.\r
699 @retval FALSE Mwait-monitor feature is not supported.\r
700**/\r
701BOOLEAN\r
702IsMwaitSupport (\r
703 VOID\r
704 );\r
705\r
43c9fdcc
JF		 706/**\r
707 Enable Debug Agent to support source debugging on AP function.\r
708\r
709**/\r
710VOID\r
711EnableDebugAgent (\r
712 VOID\r
713 );\r
714\r
e1ed5573
HW		 715/**\r
716 Find the current Processor number by APIC ID.\r
717\r
718 @param[in] CpuMpData Pointer to PEI CPU MP Data\r
719 @param[out] ProcessorNumber Return the pocessor number found\r
720\r
721 @retval EFI_SUCCESS ProcessorNumber is found and returned.\r
722 @retval EFI_NOT_FOUND ProcessorNumber is not found.\r
723**/\r
724EFI_STATUS\r
725GetProcessorNumber (\r
053e878b
MK		 726 IN CPU_MP_DATA *CpuMpData,\r
727 OUT UINTN *ProcessorNumber\r
e1ed5573
HW		 728 );\r
729\r
c788c2b1
SF		 730/**\r
731 This funtion will try to invoke platform specific microcode shadow logic to\r
732 relocate microcode update patches into memory.\r
733\r
4ac82ea1 734 @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
c788c2b1
SF		 735\r
736 @retval EFI_SUCCESS Shadow microcode success.\r
737 @retval EFI_OUT_OF_RESOURCES No enough resource to complete the operation.\r
738 @retval EFI_UNSUPPORTED Can't find platform specific microcode shadow\r
739 PPI/Protocol.\r
740**/\r
741EFI_STATUS\r
742PlatformShadowMicrocode (\r
053e878b 743 IN OUT CPU_MP_DATA *CpuMpData\r
c788c2b1
SF		 744 );\r
745\r
e2289d19
BS		 746/**\r
747 Allocate the SEV-ES AP jump table buffer.\r
748\r
749 @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
750**/\r
751VOID\r
752AllocateSevEsAPMemory (\r
753 IN OUT CPU_MP_DATA *CpuMpData\r
754 );\r
755\r
756/**\r
757 Program the SEV-ES AP jump table buffer.\r
758\r
759 @param[in] SipiVector The SIPI vector used for the AP Reset\r
760**/\r
761VOID\r
762SetSevEsJumpTable (\r
763 IN UINTN SipiVector\r
764 );\r
765\r
766/**\r
767 The function puts the AP in halt loop.\r
768\r
769 @param[in] CpuMpData The pointer to CPU MP Data structure.\r
770**/\r
771VOID\r
772SevEsPlaceApHlt (\r
773 CPU_MP_DATA *CpuMpData\r
774 );\r
775\r
3e8ad6bd 776#endif\r
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