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04af8bf2 DG |
1 | /** @file\r |
2 | Coreboot PEI module include file.\r | |
3 | \r | |
4 | Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>\r | |
5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
6 | \r | |
7 | **/\r | |
8 | \r | |
9 | /*\r | |
10 | * This file is part of the libpayload project.\r | |
11 | *\r | |
12 | * Copyright (C) 2008 Advanced Micro Devices, Inc.\r | |
13 | *\r | |
14 | * Redistribution and use in source and binary forms, with or without\r | |
15 | * modification, are permitted provided that the following conditions\r | |
16 | * are met:\r | |
17 | * 1. Redistributions of source code must retain the above copyright\r | |
18 | * notice, this list of conditions and the following disclaimer.\r | |
19 | * 2. Redistributions in binary form must reproduce the above copyright\r | |
20 | * notice, this list of conditions and the following disclaimer in the\r | |
21 | * documentation and/or other materials provided with the distribution.\r | |
22 | * 3. The name of the author may not be used to endorse or promote products\r | |
23 | * derived from this software without specific prior written permission.\r | |
24 | *\r | |
25 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND\r | |
26 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r | |
27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r | |
28 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE\r | |
29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r | |
30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r | |
31 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r | |
32 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r | |
33 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r | |
34 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r | |
35 | * SUCH DAMAGE.\r | |
36 | */\r | |
37 | \r | |
04af8bf2 DG |
38 | #ifndef _COREBOOT_PEI_H_INCLUDED_\r |
39 | #define _COREBOOT_PEI_H_INCLUDED_\r | |
40 | \r | |
e5efcf8b MK |
41 | #if defined (_MSC_VER)\r |
42 | #pragma warning( disable : 4200 )\r | |
04af8bf2 DG |
43 | #endif\r |
44 | \r | |
e5efcf8b | 45 | #define DYN_CBMEM_ALIGN_SIZE (4096)\r |
04af8bf2 | 46 | \r |
e5efcf8b MK |
47 | #define IMD_ENTRY_MAGIC (~0xC0389481)\r |
48 | #define CBMEM_ENTRY_MAGIC (~0xC0389479)\r | |
04af8bf2 DG |
49 | \r |
50 | struct cbmem_entry {\r | |
e5efcf8b MK |
51 | UINT32 magic;\r |
52 | UINT32 start;\r | |
53 | UINT32 size;\r | |
54 | UINT32 id;\r | |
04af8bf2 DG |
55 | };\r |
56 | \r | |
57 | struct cbmem_root {\r | |
e5efcf8b MK |
58 | UINT32 max_entries;\r |
59 | UINT32 num_entries;\r | |
60 | UINT32 locked;\r | |
61 | UINT32 size;\r | |
62 | struct cbmem_entry entries[0];\r | |
04af8bf2 DG |
63 | };\r |
64 | \r | |
65 | struct imd_entry {\r | |
e5efcf8b MK |
66 | UINT32 magic;\r |
67 | UINT32 start_offset;\r | |
68 | UINT32 size;\r | |
69 | UINT32 id;\r | |
04af8bf2 DG |
70 | };\r |
71 | \r | |
72 | struct imd_root {\r | |
e5efcf8b MK |
73 | UINT32 max_entries;\r |
74 | UINT32 num_entries;\r | |
75 | UINT32 flags;\r | |
76 | UINT32 entry_align;\r | |
77 | UINT32 max_offset;\r | |
78 | struct imd_entry entries[0];\r | |
04af8bf2 DG |
79 | };\r |
80 | \r | |
81 | struct cbuint64 {\r | |
e5efcf8b MK |
82 | UINT32 lo;\r |
83 | UINT32 hi;\r | |
04af8bf2 DG |
84 | };\r |
85 | \r | |
e5efcf8b | 86 | #define CB_HEADER_SIGNATURE 0x4F49424C\r |
04af8bf2 DG |
87 | \r |
88 | struct cb_header {\r | |
e5efcf8b MK |
89 | UINT32 signature;\r |
90 | UINT32 header_bytes;\r | |
91 | UINT32 header_checksum;\r | |
92 | UINT32 table_bytes;\r | |
93 | UINT32 table_checksum;\r | |
94 | UINT32 table_entries;\r | |
04af8bf2 DG |
95 | };\r |
96 | \r | |
97 | struct cb_record {\r | |
e5efcf8b MK |
98 | UINT32 tag;\r |
99 | UINT32 size;\r | |
04af8bf2 DG |
100 | };\r |
101 | \r | |
e5efcf8b MK |
102 | #define CB_TAG_UNUSED 0x0000\r |
103 | #define CB_TAG_MEMORY 0x0001\r | |
04af8bf2 DG |
104 | \r |
105 | struct cb_memory_range {\r | |
e5efcf8b MK |
106 | struct cbuint64 start;\r |
107 | struct cbuint64 size;\r | |
108 | UINT32 type;\r | |
04af8bf2 DG |
109 | };\r |
110 | \r | |
e5efcf8b | 111 | #define CB_MEM_RAM 1\r |
04af8bf2 | 112 | #define CB_MEM_RESERVED 2\r |
e5efcf8b MK |
113 | #define CB_MEM_ACPI 3\r |
114 | #define CB_MEM_NVS 4\r | |
04af8bf2 DG |
115 | #define CB_MEM_UNUSABLE 5\r |
116 | #define CB_MEM_VENDOR_RSVD 6\r | |
e5efcf8b | 117 | #define CB_MEM_TABLE 16\r |
04af8bf2 DG |
118 | \r |
119 | struct cb_memory {\r | |
e5efcf8b MK |
120 | UINT32 tag;\r |
121 | UINT32 size;\r | |
122 | struct cb_memory_range map[0];\r | |
04af8bf2 DG |
123 | };\r |
124 | \r | |
125 | #define CB_TAG_MAINBOARD 0x0003\r | |
126 | \r | |
127 | struct cb_mainboard {\r | |
e5efcf8b MK |
128 | UINT32 tag;\r |
129 | UINT32 size;\r | |
130 | UINT8 vendor_idx;\r | |
131 | UINT8 part_number_idx;\r | |
132 | UINT8 strings[0];\r | |
133 | };\r | |
134 | \r | |
135 | #define CB_TAG_VERSION 0x0004\r | |
136 | #define CB_TAG_EXTRA_VERSION 0x0005\r | |
137 | #define CB_TAG_BUILD 0x0006\r | |
138 | #define CB_TAG_COMPILE_TIME 0x0007\r | |
139 | #define CB_TAG_COMPILE_BY 0x0008\r | |
140 | #define CB_TAG_COMPILE_HOST 0x0009\r | |
141 | #define CB_TAG_COMPILE_DOMAIN 0x000a\r | |
142 | #define CB_TAG_COMPILER 0x000b\r | |
143 | #define CB_TAG_LINKER 0x000c\r | |
144 | #define CB_TAG_ASSEMBLER 0x000d\r | |
04af8bf2 DG |
145 | \r |
146 | struct cb_string {\r | |
e5efcf8b MK |
147 | UINT32 tag;\r |
148 | UINT32 size;\r | |
149 | UINT8 string[0];\r | |
04af8bf2 DG |
150 | };\r |
151 | \r | |
e5efcf8b | 152 | #define CB_TAG_SERIAL 0x000f\r |
04af8bf2 DG |
153 | \r |
154 | struct cb_serial {\r | |
e5efcf8b MK |
155 | UINT32 tag;\r |
156 | UINT32 size;\r | |
157 | #define CB_SERIAL_TYPE_IO_MAPPED 1\r | |
158 | #define CB_SERIAL_TYPE_MEMORY_MAPPED 2\r | |
159 | UINT32 type;\r | |
160 | UINT32 baseaddr;\r | |
161 | UINT32 baud;\r | |
162 | UINT32 regwidth;\r | |
04af8bf2 DG |
163 | \r |
164 | // Crystal or input frequency to the chip containing the UART.\r | |
165 | // Provide the board specific details to allow the payload to\r | |
166 | // initialize the chip containing the UART and make independent\r | |
167 | // decisions as to which dividers to select and their values\r | |
168 | // to eventually arrive at the desired console baud-rate.\r | |
e5efcf8b | 169 | UINT32 input_hertz;\r |
04af8bf2 DG |
170 | \r |
171 | // UART PCI address: bus, device, function\r | |
172 | // 1 << 31 - Valid bit, PCI UART in use\r | |
173 | // Bus << 20\r | |
174 | // Device << 15\r | |
175 | // Function << 12\r | |
e5efcf8b | 176 | UINT32 uart_pci_addr;\r |
04af8bf2 DG |
177 | };\r |
178 | \r | |
e5efcf8b | 179 | #define CB_TAG_CONSOLE 0x00010\r |
04af8bf2 DG |
180 | \r |
181 | struct cb_console {\r | |
e5efcf8b MK |
182 | UINT32 tag;\r |
183 | UINT32 size;\r | |
184 | UINT16 type;\r | |
04af8bf2 DG |
185 | };\r |
186 | \r | |
e5efcf8b MK |
187 | #define CB_TAG_CONSOLE_SERIAL8250 0\r |
188 | #define CB_TAG_CONSOLE_VGA 1 // OBSOLETE\r | |
189 | #define CB_TAG_CONSOLE_BTEXT 2 // OBSOLETE\r | |
190 | #define CB_TAG_CONSOLE_LOGBUF 3\r | |
191 | #define CB_TAG_CONSOLE_SROM 4// OBSOLETE\r | |
192 | #define CB_TAG_CONSOLE_EHCI 5\r | |
04af8bf2 | 193 | \r |
e5efcf8b | 194 | #define CB_TAG_FORWARD 0x00011\r |
04af8bf2 DG |
195 | \r |
196 | struct cb_forward {\r | |
e5efcf8b MK |
197 | UINT32 tag;\r |
198 | UINT32 size;\r | |
199 | UINT64 forward;\r | |
04af8bf2 DG |
200 | };\r |
201 | \r | |
e5efcf8b | 202 | #define CB_TAG_FRAMEBUFFER 0x0012\r |
04af8bf2 | 203 | struct cb_framebuffer {\r |
e5efcf8b MK |
204 | UINT32 tag;\r |
205 | UINT32 size;\r | |
206 | \r | |
207 | UINT64 physical_address;\r | |
208 | UINT32 x_resolution;\r | |
209 | UINT32 y_resolution;\r | |
210 | UINT32 bytes_per_line;\r | |
211 | UINT8 bits_per_pixel;\r | |
212 | UINT8 red_mask_pos;\r | |
213 | UINT8 red_mask_size;\r | |
214 | UINT8 green_mask_pos;\r | |
215 | UINT8 green_mask_size;\r | |
216 | UINT8 blue_mask_pos;\r | |
217 | UINT8 blue_mask_size;\r | |
218 | UINT8 reserved_mask_pos;\r | |
219 | UINT8 reserved_mask_size;\r | |
220 | };\r | |
221 | \r | |
222 | #define CB_TAG_VDAT 0x0015\r | |
04af8bf2 | 223 | struct cb_vdat {\r |
e5efcf8b MK |
224 | UINT32 tag;\r |
225 | UINT32 size; /* size of the entire entry */\r | |
226 | UINT64 vdat_addr;\r | |
227 | UINT32 vdat_size;\r | |
04af8bf2 DG |
228 | };\r |
229 | \r | |
e5efcf8b MK |
230 | #define CB_TAG_TIMESTAMPS 0x0016\r |
231 | #define CB_TAG_CBMEM_CONSOLE 0x0017\r | |
232 | #define CB_TAG_MRC_CACHE 0x0018\r | |
04af8bf2 | 233 | struct cb_cbmem_tab {\r |
e5efcf8b MK |
234 | UINT32 tag;\r |
235 | UINT32 size;\r | |
236 | UINT64 cbmem_tab;\r | |
04af8bf2 DG |
237 | };\r |
238 | \r | |
239 | /* Helpful macros */\r | |
240 | \r | |
241 | #define MEM_RANGE_COUNT(_rec) \\r | |
242 | (((_rec)->size - sizeof(*(_rec))) / sizeof((_rec)->map[0]))\r | |
243 | \r | |
244 | #define MEM_RANGE_PTR(_rec, _idx) \\r | |
245 | (void *)(((UINT8 *) (_rec)) + sizeof(*(_rec)) \\r | |
246 | + (sizeof((_rec)->map[0]) * (_idx)))\r | |
247 | \r | |
e5efcf8b | 248 | typedef struct cb_memory CB_MEMORY;\r |
04af8bf2 DG |
249 | \r |
250 | #endif // _COREBOOT_PEI_H_INCLUDED_\r |