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1 | /**************************************************************************;\r |
2 | ;* *;\r | |
3 | ;* *;\r | |
4 | ;* Intel Corporation - ACPI Reference Code for the Baytrail *;\r | |
5 | ;* Family of Customer Reference Boards. *;\r | |
6 | ;* *;\r | |
7 | ;* *;\r | |
8 | ;* Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved *;\r | |
9 | ;\r | |
10 | ; This program and the accompanying materials are licensed and made available under\r | |
11 | ; the terms and conditions of the BSD License that accompanies this distribution.\r | |
12 | ; The full text of the license may be found at\r | |
13 | ; http://opensource.org/licenses/bsd-license.php.\r | |
14 | ;\r | |
15 | ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
16 | ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
17 | ;\r | |
18 | ;* *;\r | |
19 | ;* *;\r | |
20 | ;**************************************************************************/\r | |
21 | \r | |
22 | \r | |
23 | // General Purpose Events. This Scope handles the Run-time and\r | |
24 | // Wake-time SCIs. The specific method called will be determined by\r | |
25 | // the _Lxx value, where xx equals the bit location in the General\r | |
26 | // Purpose Event register(s).\r | |
27 | \r | |
28 | Scope(\_GPE)\r | |
29 | {\r | |
30 | //\r | |
31 | // Software GPE caused the event.\r | |
32 | //\r | |
33 | Method(_L02)\r | |
34 | {\r | |
35 | // Clear GPE status bit.\r | |
36 | Store(0,GPEC)\r | |
37 | //\r | |
38 | // Handle DTS Thermal Events.\r | |
39 | //\r | |
40 | External(DTSE, IntObj)\r | |
41 | If(CondRefOf(DTSE))\r | |
42 | {\r | |
43 | If(LGreaterEqual(DTSE, 0x01))\r | |
44 | {\r | |
45 | Notify(\_TZ.TZ01,0x80)\r | |
46 | }\r | |
47 | }\r | |
48 | }\r | |
49 | \r | |
50 | //\r | |
51 | // PUNIT SCI event.\r | |
52 | //\r | |
53 | Method(_L04)\r | |
54 | {\r | |
55 | // Clear the PUNIT Status Bit.\r | |
56 | Store(1, PSCI)\r | |
57 | }\r | |
58 | \r | |
59 | \r | |
60 | //\r | |
61 | // IGD OpRegion SCI event (see IGD OpRegion/Software SCI BIOS SPEC).\r | |
62 | //\r | |
63 | Method(_L05)\r | |
64 | {\r | |
65 | If(LAnd(\_SB.PCI0.GFX0.GSSE, LNot(GSMI))) // Graphics software SCI event?\r | |
66 | {\r | |
67 | \_SB.PCI0.GFX0.GSCI() // Handle the SWSCI\r | |
68 | }\r | |
69 | }\r | |
70 | \r | |
71 | //\r | |
72 | // This PME event (PCH's GPE #13) is received when any PCH internal device with PCI Power Management capabilities\r | |
73 | // on bus 0 asserts the equivalent of the PME# signal.\r | |
74 | //\r | |
75 | Method(_L0D, 0)\r | |
76 | {\r | |
77 | If(LAnd(\_SB.PCI0.EHC1.PMEE, \_SB.PCI0.EHC1.PMES))\r | |
78 | {\r | |
79 | If(LNotEqual(OSEL, 1))\r | |
80 | {\r | |
81 | Store(1, \_SB.PCI0.EHC1.PMES) //Clear PME status\r | |
82 | Store(0, \_SB.PCI0.EHC1.PMEE) //Disable PME\r | |
83 | }\r | |
84 | Notify(\_SB.PCI0.EHC1, 0x02)\r | |
85 | }\r | |
86 | If(LAnd(\_SB.PCI0.XHC1.PMEE, \_SB.PCI0.XHC1.PMES))\r | |
87 | {\r | |
88 | If(LNotEqual(OSEL, 1))\r | |
89 | {\r | |
90 | Store(1, \_SB.PCI0.XHC1.PMES) //Clear PME status\r | |
91 | Store(0, \_SB.PCI0.XHC1.PMEE) //Disable PME\r | |
92 | }\r | |
93 | Notify(\_SB.PCI0.XHC1, 0x02)\r | |
94 | }\r | |
95 | If(LAnd(\_SB.PCI0.HDEF.PMEE, \_SB.PCI0.HDEF.PMES))\r | |
96 | {\r | |
97 | If(LNotEqual(OSEL, 1))\r | |
98 | {\r | |
99 | Store(1, \_SB.PCI0.HDEF.PMES) //Clear PME status\r | |
100 | Store(0, \_SB.PCI0.HDEF.PMEE) //Disable PME\r | |
101 | }\r | |
102 | Notify(\_SB.PCI0.HDEF, 0x02)\r | |
103 | }\r | |
104 | }\r | |
105 | }\r |