]>
Commit | Line | Data |
---|---|---|
3cbfba02 DW |
1 | /*++\r |
2 | \r | |
3 | Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>\r | |
4 | \r\r | |
5 | This program and the accompanying materials are licensed and made available under\r\r | |
6 | the terms and conditions of the BSD License that accompanies this distribution. \r\r | |
7 | The full text of the license may be found at \r\r | |
8 | http://opensource.org/licenses/bsd-license.php. \r\r | |
9 | \r\r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r\r | |
12 | \r\r | |
13 | \r | |
14 | \r | |
15 | Module Name:\r | |
16 | \r | |
17 | HwWatchdogTimerHob.h\r | |
18 | \r | |
19 | Abstract:\r | |
20 | \r | |
21 | GUID used for Watchdog Timer status in the HOB list.\r | |
22 | \r | |
23 | --*/\r | |
24 | \r | |
25 | #ifndef _EFI_WATCHDOG_TIMER_HOB_GUID_H_\r | |
26 | #define _EFI_WATCHDOG_TIMER_HOB_GUID_H_\r | |
27 | \r | |
28 | #define EFI_WATCHDOG_TIMER_HOB_GUID \\r | |
29 | { 0x226cd3f, 0x69b5, 0x4150, 0xac, 0xbe, 0xbf, 0xbf, 0x18, 0xe3, 0x3, 0xd5 }\r | |
30 | \r | |
31 | #define EFI_WATCHDOG_TIMER_DEFINITION_HOB_GUID \\r | |
32 | { 0xd29302b0, 0x11ba, 0x4073, 0xa2, 0x27, 0x53, 0x8d, 0x25, 0x42, 0x70, 0x9f }\r | |
33 | \r | |
34 | typedef enum {\r | |
35 | HWWD_NONE,\r | |
36 | HWWD_TIMER_EXPIRED,\r | |
37 | HWWD_SPONTANEOUS_REBOOT,\r | |
38 | HWWD_FORCED_TIMEOUT\r | |
39 | } HW_WATCHDOG_TIMEOUT;\r | |
40 | \r | |
41 | typedef struct {\r | |
42 | HW_WATCHDOG_TIMEOUT TimeoutStatus;\r | |
43 | } HW_WATCHDOG_INFO;\r | |
44 | \r | |
45 | //\r | |
46 | // Watchdog timer action values.\r | |
47 | //\r | |
48 | #define WDT_ACTION_RESET 0x01 // reload/reset timer\r | |
49 | #define WDT_ACTION_QUERY_CURRENT_VALUE 0x04 // get current value // DON'T NEED FOR OVERCLOCK UTILITY\r | |
50 | #define WDT_ACTION_QUERY_COUNTDOWN_PERIOD 0x05 // get countdown period\r | |
51 | #define WDT_ACTION_SET_COUNTDOWN_PERIOD 0x06 // set countdown period\r | |
52 | #define WDT_ACTION_QUERY_RUNNING_STATE 0x08 // query if running\r | |
53 | #define WDT_ACTION_SET_RUNNING_STATE 0x09 // start timer\r | |
54 | #define WDT_ACTION_QUERY_STOPPED_STATE 0x0A // query if stopped\r | |
55 | #define WDT_ACTION_SET_STOPPED_STATE 0x0B // stop timer\r | |
56 | #define WDT_ACTION_QUERY_STATUS 0x20 // is current boot cause by wdt timeout?\r | |
57 | #define WDT_ACTION_SET_STATUS 0x21 // resets wdt status bit\r | |
58 | \r | |
59 | //\r | |
60 | // Watchdog timer instruction values.\r | |
61 | //\r | |
62 | #define WDT_INSTR_VALUE_MASK 0x03 // Mask for just the value\r | |
63 | #define WDT_INSTR_READ_CMP_VALUE 0x00 // Read / compare value\r | |
64 | #define WDT_INSTR_READ_COUNTDOWN 0x01 // read countdown value\r | |
65 | #define WDT_INSTR_WRITE_VALUE 0x02 // Write value\r | |
66 | #define WDT_INSTR_WRITE_COUNTDOWN 0x03 // write countdown value\r | |
67 | #define WDT_INSTR_PRESERVE_REG 0x80 // preserve reg; used in Write Value / Write Countdown\r | |
68 | #define WDT_INSTR_WRITE_VALUE_PRES (0x02 | WDT_INSTR_PRESERVE_REG) // Write value with preserve\r | |
69 | #define WDT_INSTR_WRITE_COUNTDOWN_PRES (0x03 | WDT_INSTR_PRESERVE_REG) // write countdown value with preserve\r | |
70 | \r | |
71 | //\r | |
72 | // The Generic Address Structure is defined in the ACPI Specification and should only be\r | |
73 | // changed to match updated revisions of that specification. The GAS_ADDRESS_SPACE and\r | |
74 | // GAS_ACCESS_SIZE enumerations are also defined by the ACPI Specification.\r | |
75 | //\r | |
76 | typedef enum {\r | |
77 | GAS_SYSTEM_MEMORY,\r | |
78 | GAS_SYSTEM_IO,\r | |
79 | GAS_PCI_CONFIG_SPACE,\r | |
80 | GAS_EMBEDDED_CONTROLLER,\r | |
81 | GAS_SMBUS\r | |
82 | } GAS_ADDRESS_SPACE;\r | |
83 | \r | |
84 | typedef enum {\r | |
85 | GAS_UNDEFINED,\r | |
86 | GAS_BYTE_ACCESS,\r | |
87 | GAS_WORD_ACCESS,\r | |
88 | GAS_DWORD_ACCESS,\r | |
89 | GAS_QWORD_ACCESS\r | |
90 | } GAS_ACCESS_SIZE;\r | |
91 | \r | |
92 | #pragma pack(1)\r | |
93 | \r | |
94 | typedef struct {\r | |
95 | UINT8 AddressSpaceId;\r | |
96 | UINT8 RegisterBitWidth;\r | |
97 | UINT8 RegisterBitOffset;\r | |
98 | UINT8 AccessSize;\r | |
99 | UINT64 Address;\r | |
100 | } GENERIC_ADDRESS_STRUCTURE;\r | |
101 | \r | |
102 | //\r | |
103 | // GAS_SYSTEM_MEMORY - When used as the AddressSpaceId, the 64-bit physical memory address\r | |
104 | // of the register. 32-bit platforms must have the high DWORD set to 0.\r | |
105 | // GAS_SYSTEM_IO - The 64-bit I/O address of the register. 32-bit platforms must have\r | |
106 | // the high DWORD set to 0.\r | |
107 | // GAS_PCI_CONFIG_SPACE - PCI Configuration space addresses must be confined to devices on PCI\r | |
108 | // Sepment Group 0, Bus 0. This restriction exists to accommodate access\r | |
109 | // to fixed hardware prior to PCI bus enumeration. The format of addresses\r | |
110 | // are defined as follows:\r | |
111 | // Highest WORD: Reserved and must be -0-\r | |
112 | // ... PCI Device number on bus 0\r | |
113 | // ... PCI Function number\r | |
114 | // Lowest WORD: Offset in the configuration space header.\r | |
115 | //\r | |
116 | \r | |
117 | typedef struct {\r | |
118 | UINT8 WdAction;\r | |
119 | UINT8 Flag;\r | |
120 | UINT16 Res;\r | |
121 | GENERIC_ADDRESS_STRUCTURE GenericAddressStructures;\r | |
122 | UINT32 Value;\r | |
123 | UINT32 Mask;\r | |
124 | } WD_INSTRUCTION;\r | |
125 | \r | |
126 | typedef struct {\r | |
127 | UINT32 TimerPeriod;\r | |
128 | UINT32 MaxTimerCount;\r | |
129 | UINT32 MinTimerCount;\r | |
130 | UINT16 InstructionCount;\r | |
131 | WD_INSTRUCTION ActionDefinitions[1];\r | |
132 | } WD_HOB_DEFINITION;\r | |
133 | \r | |
134 | #pragma pack()\r | |
135 | \r | |
136 | extern EFI_GUID gWatchdogTimerHobGuid;\r | |
137 | extern EFI_GUID gWatchdogTimerDefinitionHobGuid;\r | |
138 | \r | |
139 | #endif // _EFI_WATCHDOG_TIMER_HOB_GUID_H_\r |