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1 | /*++\r |
2 | \r | |
3 | Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>\r | |
4 | \r\r | |
5 | This program and the accompanying materials are licensed and made available under\r\r | |
6 | the terms and conditions of the BSD License that accompanies this distribution. \r\r | |
7 | The full text of the license may be found at \r\r | |
8 | http://opensource.org/licenses/bsd-license.php. \r\r | |
9 | \r\r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r\r | |
12 | \r\r | |
13 | \r | |
14 | \r | |
15 | Flash device library class header file.\r | |
16 | \r | |
17 | Flash Device Library common type, MACRO and API definition. The basic idea for\r | |
18 | this library is to provide API to abstract the different between flash\r | |
19 | technology (SPI, FWH etc..), flash controller (SPI host controller on\r | |
20 | ICH, MMIO type access for FWH), flash chip (programming command, method\r | |
21 | of status checking). This library class can be consumed by drivers or applications\r | |
22 | such as Firmware Volume Block driver, Flash Update application. These driver\r | |
23 | can be written in a generic manner so that they are more easy to be\r | |
24 | ported to other platforms.\r | |
25 | \r | |
26 | This library can be build on a set of APIs which can touch flash controller, flash\r | |
27 | chip directly for a platform with simple flash device configuration.\r | |
28 | \r | |
29 | For a platform with complex flash device configuration, this library can be built\r | |
30 | on the Flash Device Operate Library. Please see the header file for that library\r | |
31 | class for detailed usage.\r | |
32 | \r | |
33 | **/\r | |
34 | \r | |
35 | #ifndef __FLASHDEVICE_LIB_H__\r | |
36 | #define __FLASHDEVICE_LIB_H__\r | |
37 | \r | |
38 | /**\r | |
39 | Read NumBytes bytes of data from the address specified by\r | |
40 | PAddress into Buffer.\r | |
41 | \r | |
42 | @param[in] PAddress The starting physical address of the read.\r | |
43 | @param[in,out] NumBytes On input, the number of bytes to read. On output, the number\r | |
44 | of bytes actually read.\r | |
45 | @param[out] Buffer The destination data buffer for the read.\r | |
46 | \r | |
47 | @retval EFI_SUCCESS. Opertion is successful.\r | |
48 | @retval EFI_DEVICE_ERROR If there is any device errors.\r | |
49 | \r | |
50 | **/\r | |
51 | EFI_STATUS\r | |
52 | EFIAPI\r | |
53 | LibFvbFlashDeviceRead (\r | |
54 | IN UINTN PAddress,\r | |
55 | IN OUT UINTN *NumBytes,\r | |
56 | OUT UINT8 *Buffer\r | |
57 | );\r | |
58 | \r | |
59 | /**\r | |
60 | Write NumBytes bytes of data from Buffer to the address specified by\r | |
61 | PAddresss.\r | |
62 | \r | |
63 | @param[in] PAddress The starting physical address of the write.\r | |
64 | @param[in,out] NumBytes On input, the number of bytes to write. On output,\r | |
65 | the actual number of bytes written.\r | |
66 | @param[in] Buffer The source data buffer for the write.\r | |
67 | \r | |
68 | @retval EFI_SUCCESS. Opertion is successful.\r | |
69 | @retval EFI_DEVICE_ERROR If there is any device errors.\r | |
70 | \r | |
71 | **/\r | |
72 | EFI_STATUS\r | |
73 | EFIAPI\r | |
74 | LibFvbFlashDeviceWrite (\r | |
75 | IN UINTN PAddress,\r | |
76 | IN OUT UINTN *NumBytes,\r | |
77 | IN UINT8 *Buffer\r | |
78 | );\r | |
79 | \r | |
80 | /**\r | |
81 | Erase the block staring at PAddress.\r | |
82 | \r | |
83 | @param[in] PAddress The starting physical address of the region to be erased.\r | |
84 | @param[in] LbaLength The length of the region to be erased. This parameter is necessary\r | |
85 | as the physical block size on a flash device could be different than\r | |
86 | the logical block size of Firmware Volume Block protocol. Erase on\r | |
87 | flash chip is always performed block by block. Therefore, the ERASE\r | |
88 | operation to a logical block is converted a number of ERASE operation\r | |
89 | (or a partial erase) on the hardware.\r | |
90 | \r | |
91 | @retval EFI_SUCCESS. Opertion is successful.\r | |
92 | @retval EFI_DEVICE_ERROR If there is any device errors.\r | |
93 | \r | |
94 | **/\r | |
95 | EFI_STATUS\r | |
96 | EFIAPI\r | |
97 | LibFvbFlashDeviceBlockErase (\r | |
98 | IN UINTN PAddress,\r | |
99 | IN UINTN LbaLength\r | |
100 | );\r | |
101 | \r | |
102 | /**\r | |
103 | Lock or unlock the block staring at PAddress.\r | |
104 | \r | |
105 | @param[in] PAddress The starting physical address of region to be (un)locked.\r | |
106 | @param[in] LbaLength The length of the region to be (un)locked. This parameter is necessary\r | |
107 | as the physical block size on a flash device could be different than\r | |
108 | the logical block size of Firmware Volume Block protocol. (Un)Lock on\r | |
109 | flash chip is always performed block by block. Therefore, the (Un)Lock\r | |
110 | operation to a logical block is converted a number of (Un)Lock operation\r | |
111 | (or a partial erase) on the hardware.\r | |
112 | @param[in] Lock TRUE to lock. FALSE to unlock.\r | |
113 | \r | |
114 | @retval EFI_SUCCESS. Opertion is successful.\r | |
115 | \r | |
116 | **/\r | |
117 | EFI_STATUS\r | |
118 | EFIAPI\r | |
119 | LibFvbFlashDeviceBlockLock (\r | |
120 | IN UINTN PAddress,\r | |
121 | IN UINTN LbaLength,\r | |
122 | IN BOOLEAN Lock\r | |
123 | );\r | |
124 | \r | |
125 | #endif\r | |
126 | \r | |
127 | \r |