]>
Commit | Line | Data |
---|---|---|
cfdbc2e1 VG |
1 | # |
2 | # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) | |
3 | # | |
4 | # This program is free software; you can redistribute it and/or modify | |
5 | # it under the terms of the GNU General Public License version 2 as | |
6 | # published by the Free Software Foundation. | |
7 | # | |
8 | ||
9 | config ARC | |
10 | def_bool y | |
11 | select ARCH_NO_VIRT_TO_BUS | |
4adeefe1 | 12 | select CLONE_BACKWARDS |
cfdbc2e1 VG |
13 | # ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev |
14 | select DEVTMPFS if !INITRAMFS_SOURCE="" | |
15 | select GENERIC_ATOMIC64 | |
16 | select GENERIC_CLOCKEVENTS | |
17 | select GENERIC_FIND_FIRST_BIT | |
18 | # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP | |
19 | select GENERIC_IRQ_SHOW | |
bf90e1ea VG |
20 | select GENERIC_KERNEL_EXECVE |
21 | select GENERIC_KERNEL_THREAD | |
cfdbc2e1 | 22 | select GENERIC_PENDING_IRQ if SMP |
c3581039 | 23 | select GENERIC_SIGALTSTACK |
cfdbc2e1 | 24 | select GENERIC_SMP_IDLE_THREAD |
f46121bd | 25 | select HAVE_ARCH_KGDB |
547f1125 | 26 | select HAVE_ARCH_TRACEHOOK |
cfdbc2e1 | 27 | select HAVE_GENERIC_HARDIRQS |
9c57564e | 28 | select HAVE_IRQ_WORK |
4d86dfbb VG |
29 | select HAVE_KPROBES |
30 | select HAVE_KRETPROBES | |
c121c506 | 31 | select HAVE_MEMBLOCK |
854a0d95 | 32 | select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND |
769bc1fd | 33 | select HAVE_OPROFILE |
9c57564e | 34 | select HAVE_PERF_EVENTS |
999159a5 | 35 | select IRQ_DOMAIN |
cfdbc2e1 | 36 | select MODULES_USE_ELF_RELA |
c121c506 | 37 | select NO_BOOTMEM |
999159a5 VG |
38 | select OF |
39 | select OF_EARLY_FLATTREE | |
9c57564e | 40 | select PERF_USE_VMALLOC |
cfdbc2e1 VG |
41 | |
42 | config SCHED_OMIT_FRAME_POINTER | |
43 | def_bool y | |
44 | ||
45 | config GENERIC_CSUM | |
46 | def_bool y | |
47 | ||
48 | config RWSEM_GENERIC_SPINLOCK | |
49 | def_bool y | |
50 | ||
51 | config ARCH_FLATMEM_ENABLE | |
52 | def_bool y | |
53 | ||
54 | config MMU | |
55 | def_bool y | |
56 | ||
57 | config NO_IOPORT | |
58 | def_bool y | |
59 | ||
60 | config GENERIC_CALIBRATE_DELAY | |
61 | def_bool y | |
62 | ||
63 | config GENERIC_HWEIGHT | |
64 | def_bool y | |
65 | ||
66 | config BINFMT_ELF | |
67 | def_bool y | |
68 | ||
44c8bb91 VG |
69 | config STACKTRACE_SUPPORT |
70 | def_bool y | |
71 | select STACKTRACE | |
72 | ||
cfdbc2e1 VG |
73 | config HAVE_LATENCYTOP_SUPPORT |
74 | def_bool y | |
75 | ||
76 | config NO_DMA | |
77 | def_bool n | |
78 | ||
79 | source "init/Kconfig" | |
80 | source "kernel/Kconfig.freezer" | |
81 | ||
82 | menu "ARC Architecture Configuration" | |
83 | ||
84 | choice | |
85 | prompt "ARC Platform" | |
86 | default ARC_PLAT_FPGA_LEGACY | |
87 | ||
88 | config ARC_PLAT_FPGA_LEGACY | |
89 | bool "\"Legacy\" ARC FPGA dev platform" | |
90 | help | |
91 | Support for ARC development platforms, provided by Synopsys. | |
92 | These are based on FPGA or ISS. e.g. | |
93 | - ARCAngel4 | |
94 | - ML509 | |
95 | - MetaWare ISS | |
96 | ||
97 | #New platform adds here | |
98 | endchoice | |
99 | ||
100 | menu "ARC CPU Configuration" | |
101 | ||
102 | choice | |
103 | prompt "ARC Core" | |
104 | default ARC_CPU_770 | |
105 | ||
106 | config ARC_CPU_750D | |
107 | bool "ARC750D" | |
108 | help | |
109 | Support for ARC750 core | |
110 | ||
111 | config ARC_CPU_770 | |
112 | bool "ARC770" | |
113 | select ARC_CPU_REL_4_10 | |
114 | help | |
115 | Support for ARC770 core introduced with Rel 4.10 (Summer 2011) | |
116 | This core has a bunch of cool new features: | |
117 | -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4) | |
118 | Shared Address Spaces (for sharing TLB entires in MMU) | |
119 | -Caches: New Prog Model, Region Flush | |
120 | -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr | |
121 | ||
122 | endchoice | |
123 | ||
124 | config CPU_BIG_ENDIAN | |
125 | bool "Enable Big Endian Mode" | |
126 | default n | |
127 | help | |
128 | Build kernel for Big Endian Mode of ARC CPU | |
129 | ||
41195d23 VG |
130 | config SMP |
131 | bool "Symmetric Multi-Processing (Incomplete)" | |
132 | default n | |
133 | select USE_GENERIC_SMP_HELPERS | |
134 | help | |
135 | This enables support for systems with more than one CPU. If you have | |
136 | a system with only one CPU, like most personal computers, say N. If | |
137 | you have a system with more than one CPU, say Y. | |
138 | ||
139 | if SMP | |
140 | ||
141 | config ARC_HAS_COH_CACHES | |
142 | def_bool n | |
143 | ||
144 | config ARC_HAS_COH_LLSC | |
145 | def_bool n | |
146 | ||
147 | config ARC_HAS_COH_RTSC | |
148 | def_bool n | |
149 | ||
150 | config ARC_HAS_REENTRANT_IRQ_LV2 | |
151 | def_bool n | |
152 | ||
153 | endif | |
154 | ||
155 | config NR_CPUS | |
156 | int "Maximum number of CPUs (2-32)" | |
157 | range 2 32 | |
158 | depends on SMP | |
159 | default "2" | |
160 | ||
cfdbc2e1 VG |
161 | menuconfig ARC_CACHE |
162 | bool "Enable Cache Support" | |
163 | default y | |
41195d23 VG |
164 | # if SMP, cache enabled ONLY if ARC implementation has cache coherency |
165 | depends on !SMP || ARC_HAS_COH_CACHES | |
cfdbc2e1 VG |
166 | |
167 | if ARC_CACHE | |
168 | ||
169 | config ARC_CACHE_LINE_SHIFT | |
170 | int "Cache Line Length (as power of 2)" | |
171 | range 5 7 | |
172 | default "6" | |
173 | help | |
174 | Starting with ARC700 4.9, Cache line length is configurable, | |
175 | This option specifies "N", with Line-len = 2 power N | |
176 | So line lengths of 32, 64, 128 are specified by 5,6,7, respectively | |
177 | Linux only supports same line lengths for I and D caches. | |
178 | ||
179 | config ARC_HAS_ICACHE | |
180 | bool "Use Instruction Cache" | |
181 | default y | |
182 | ||
183 | config ARC_HAS_DCACHE | |
184 | bool "Use Data Cache" | |
185 | default y | |
186 | ||
187 | config ARC_CACHE_PAGES | |
188 | bool "Per Page Cache Control" | |
189 | default y | |
190 | depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE | |
191 | help | |
192 | This can be used to over-ride the global I/D Cache Enable on a | |
193 | per-page basis (but only for pages accessed via MMU such as | |
194 | Kernel Virtual address or User Virtual Address) | |
195 | TLB entries have a per-page Cache Enable Bit. | |
196 | Note that Global I/D ENABLE + Per Page DISABLE works but corollary | |
197 | Global DISABLE + Per Page ENABLE won't work | |
198 | ||
199 | endif #ARC_CACHE | |
200 | ||
8b5850f8 VG |
201 | config ARC_HAS_ICCM |
202 | bool "Use ICCM" | |
203 | help | |
204 | Single Cycle RAMS to store Fast Path Code | |
205 | default n | |
206 | ||
207 | config ARC_ICCM_SZ | |
208 | int "ICCM Size in KB" | |
209 | default "64" | |
210 | depends on ARC_HAS_ICCM | |
211 | ||
212 | config ARC_HAS_DCCM | |
213 | bool "Use DCCM" | |
214 | help | |
215 | Single Cycle RAMS to store Fast Path Data | |
216 | default n | |
217 | ||
218 | config ARC_DCCM_SZ | |
219 | int "DCCM Size in KB" | |
220 | default "64" | |
221 | depends on ARC_HAS_DCCM | |
222 | ||
223 | config ARC_DCCM_BASE | |
224 | hex "DCCM map address" | |
225 | default "0xA0000000" | |
226 | depends on ARC_HAS_DCCM | |
227 | ||
cfdbc2e1 VG |
228 | config ARC_HAS_HW_MPY |
229 | bool "Use Hardware Multiplier (Normal or Faster XMAC)" | |
230 | default y | |
231 | help | |
232 | Influences how gcc generates code for MPY operations. | |
233 | If enabled, MPYxx insns are generated, provided by Standard/XMAC | |
234 | Multipler. Otherwise software multipy lib is used | |
235 | ||
236 | choice | |
237 | prompt "ARC700 MMU Version" | |
238 | default ARC_MMU_V3 if ARC_CPU_770 | |
239 | default ARC_MMU_V2 if ARC_CPU_750D | |
240 | ||
241 | config ARC_MMU_V1 | |
242 | bool "MMU v1" | |
243 | help | |
244 | Orig ARC700 MMU | |
245 | ||
246 | config ARC_MMU_V2 | |
247 | bool "MMU v2" | |
248 | help | |
249 | Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio | |
250 | when 2 D-TLB and 1 I-TLB entries index into same 2way set. | |
251 | ||
252 | config ARC_MMU_V3 | |
253 | bool "MMU v3" | |
254 | depends on ARC_CPU_770 | |
255 | help | |
256 | Introduced with ARC700 4.10: New Features | |
257 | Variable Page size (1k-16k), var JTLB size 128 x (2 or 4) | |
258 | Shared Address Spaces (SASID) | |
259 | ||
260 | endchoice | |
261 | ||
262 | ||
263 | choice | |
264 | prompt "MMU Page Size" | |
265 | default ARC_PAGE_SIZE_8K | |
266 | ||
267 | config ARC_PAGE_SIZE_8K | |
268 | bool "8KB" | |
269 | help | |
270 | Choose between 8k vs 16k | |
271 | ||
272 | config ARC_PAGE_SIZE_16K | |
273 | bool "16KB" | |
274 | depends on ARC_MMU_V3 | |
275 | ||
276 | config ARC_PAGE_SIZE_4K | |
277 | bool "4KB" | |
278 | depends on ARC_MMU_V3 | |
279 | ||
280 | endchoice | |
281 | ||
4788a594 VG |
282 | config ARC_COMPACT_IRQ_LEVELS |
283 | bool "ARCompact IRQ Priorities: High(2)/Low(1)" | |
284 | default n | |
285 | # Timer HAS to be high priority, for any other high priority config | |
286 | select ARC_IRQ3_LV2 | |
41195d23 VG |
287 | # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy |
288 | depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2 | |
4788a594 VG |
289 | |
290 | if ARC_COMPACT_IRQ_LEVELS | |
291 | ||
292 | config ARC_IRQ3_LV2 | |
293 | bool | |
294 | ||
295 | config ARC_IRQ5_LV2 | |
296 | bool | |
297 | ||
298 | config ARC_IRQ6_LV2 | |
299 | bool | |
300 | ||
301 | endif | |
302 | ||
cfdbc2e1 VG |
303 | config ARC_FPU_SAVE_RESTORE |
304 | bool "Enable FPU state persistence across context switch" | |
305 | default n | |
306 | help | |
307 | Double Precision Floating Point unit had dedictaed regs which | |
308 | need to be saved/restored across context-switch. | |
309 | Note that ARC FPU is overly simplistic, unlike say x86, which has | |
310 | hardware pieces to allow software to conditionally save/restore, | |
311 | based on actual usage of FPU by a task. Thus our implemn does | |
312 | this for all tasks in system. | |
313 | ||
314 | menuconfig ARC_CPU_REL_4_10 | |
315 | bool "Enable support for Rel 4.10 features" | |
316 | default n | |
317 | help | |
318 | -ARC770 (and dependent features) enabled | |
319 | -ARC750 also shares some of the new features with 770 | |
320 | ||
321 | config ARC_HAS_LLSC | |
322 | bool "Insn: LLOCK/SCOND (efficient atomic ops)" | |
323 | default y | |
324 | depends on ARC_CPU_770 | |
325 | # if SMP, enable LLSC ONLY if ARC implementation has coherent atomics | |
326 | depends on !SMP || ARC_HAS_COH_LLSC | |
327 | ||
328 | config ARC_HAS_SWAPE | |
329 | bool "Insn: SWAPE (endian-swap)" | |
330 | default y | |
331 | depends on ARC_CPU_REL_4_10 | |
332 | ||
333 | config ARC_HAS_RTSC | |
334 | bool "Insn: RTSC (64-bit r/o cycle counter)" | |
335 | default y | |
336 | depends on ARC_CPU_REL_4_10 | |
41195d23 VG |
337 | # if SMP, enable RTSC only if counter is coherent across cores |
338 | depends on !SMP || ARC_HAS_COH_RTSC | |
cfdbc2e1 VG |
339 | |
340 | endmenu # "ARC CPU Configuration" | |
341 | ||
342 | menu "Platform Board Configuration" | |
343 | ||
344 | source "arch/arc/plat-arcfpga/Kconfig" | |
345 | ||
346 | #New platform adds here | |
347 | ||
cfdbc2e1 VG |
348 | config LINUX_LINK_BASE |
349 | hex "Linux Link Address" | |
350 | default "0x80000000" | |
351 | help | |
352 | ARC700 divides the 32 bit phy address space into two equal halves | |
353 | -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU | |
354 | -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel | |
355 | Typically Linux kernel is linked at the start of untransalted addr, | |
356 | hence the default value of 0x8zs. | |
357 | However some customers have peripherals mapped at this addr, so | |
358 | Linux needs to be scooted a bit. | |
359 | If you don't know what the above means, leave this setting alone. | |
360 | ||
cfdbc2e1 VG |
361 | endmenu # "Platform Board Configuration" |
362 | ||
080c3747 VG |
363 | config ARC_CURR_IN_REG |
364 | bool "Dedicate Register r25 for current_task pointer" | |
365 | default y | |
366 | help | |
367 | This reserved Register R25 to point to Current Task in | |
368 | kernel mode. This saves memory access for each such access | |
369 | ||
2e651ea1 VG |
370 | |
371 | config ARC_MISALIGN_ACCESS | |
372 | bool "Emulate unaligned memory access (userspace only)" | |
373 | default N | |
374 | select SYSCTL_ARCH_UNALIGN_NO_WARN | |
375 | select SYSCTL_ARCH_UNALIGN_ALLOW | |
376 | help | |
377 | This enables misaligned 16 & 32 bit memory access from user space. | |
378 | Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide | |
379 | potential bugs in code | |
380 | ||
cfdbc2e1 VG |
381 | config ARC_STACK_NONEXEC |
382 | bool "Make stack non-executable" | |
383 | default n | |
384 | help | |
385 | To disable the execute permissions of stack/heap of processes | |
386 | which are enabled by default. | |
387 | ||
388 | config HZ | |
389 | int "Timer Frequency" | |
390 | default 100 | |
391 | ||
cbe056f7 VG |
392 | config ARC_METAWARE_HLINK |
393 | bool "Support for Metaware debugger assisted Host access" | |
394 | default n | |
395 | help | |
396 | This options allows a Linux userland apps to directly access | |
397 | host file system (open/creat/read/write etc) with help from | |
398 | Metaware Debugger. This can come in handy for Linux-host communication | |
399 | when there is no real usable peripheral such as EMAC. | |
400 | ||
cfdbc2e1 VG |
401 | menuconfig ARC_DBG |
402 | bool "ARC debugging" | |
403 | default y | |
404 | ||
854a0d95 VG |
405 | config ARC_DW2_UNWIND |
406 | bool "Enable DWARF specific kernel stack unwind" | |
407 | depends on ARC_DBG | |
408 | default y | |
409 | select KALLSYMS | |
410 | help | |
411 | Compiles the kernel with DWARF unwind information and can be used | |
412 | to get stack backtraces. | |
413 | ||
414 | If you say Y here the resulting kernel image will be slightly larger | |
415 | but not slower, and it will give very useful debugging information. | |
416 | If you don't debug the kernel, you can say N, but we may not be able | |
417 | to solve problems without frame unwind information | |
418 | ||
cfdbc2e1 VG |
419 | config ARC_DBG_TLB_PARANOIA |
420 | bool "Paranoia Checks in Low Level TLB Handlers" | |
f46121bd | 421 | depends on ARC_DBG |
cfdbc2e1 VG |
422 | default n |
423 | ||
424 | config ARC_DBG_TLB_MISS_COUNT | |
425 | bool "Profile TLB Misses" | |
426 | default n | |
427 | select DEBUG_FS | |
428 | depends on ARC_DBG | |
429 | help | |
430 | Counts number of I and D TLB Misses and exports them via Debugfs | |
431 | The counters can be cleared via Debugfs as well | |
432 | ||
433 | config CMDLINE | |
434 | string "Kernel command line to built-in" | |
435 | default "print-fatal-signals=1" | |
436 | help | |
437 | The default command line which will be appended to the optional | |
438 | u-boot provided command line (see below) | |
439 | ||
440 | config CMDLINE_UBOOT | |
441 | bool "Support U-boot kernel command line passing" | |
442 | default n | |
443 | help | |
444 | If you are using U-boot (www.denx.de) and wish to pass the kernel | |
445 | command line from the U-boot environment to the Linux kernel then | |
446 | switch this option on. | |
447 | ARC U-boot will setup the cmdline in RAM/flash and set r2 to point | |
448 | to it. kernel startup code will copy the string into cmdline buffer | |
449 | and also append CONFIG_CMDLINE. | |
450 | ||
999159a5 VG |
451 | config ARC_BUILTIN_DTB_NAME |
452 | string "Built in DTB" | |
453 | help | |
454 | Set the name of the DTB to embed in the vmlinux binary | |
455 | Leaving it blank selects the minimal "skeleton" dtb | |
456 | ||
cfdbc2e1 VG |
457 | source "kernel/Kconfig.preempt" |
458 | ||
459 | endmenu # "ARC Architecture Configuration" | |
460 | ||
461 | source "mm/Kconfig" | |
462 | source "net/Kconfig" | |
463 | source "drivers/Kconfig" | |
464 | source "fs/Kconfig" | |
465 | source "arch/arc/Kconfig.debug" | |
466 | source "security/Kconfig" | |
467 | source "crypto/Kconfig" | |
468 | source "lib/Kconfig" |