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cfdbc2e1 VG |
1 | # |
2 | # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) | |
3 | # | |
4 | # This program is free software; you can redistribute it and/or modify | |
5 | # it under the terms of the GNU General Public License version 2 as | |
6 | # published by the Free Software Foundation. | |
7 | # | |
8 | ||
9 | config ARC | |
10 | def_bool y | |
f06d19e4 | 11 | select BUILDTIME_EXTABLE_SORT |
d7f8a085 | 12 | select COMMON_CLK |
4adeefe1 | 13 | select CLONE_BACKWARDS |
cfdbc2e1 VG |
14 | # ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev |
15 | select DEVTMPFS if !INITRAMFS_SOURCE="" | |
16 | select GENERIC_ATOMIC64 | |
17 | select GENERIC_CLOCKEVENTS | |
18 | select GENERIC_FIND_FIRST_BIT | |
19 | # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP | |
20 | select GENERIC_IRQ_SHOW | |
21 | select GENERIC_PENDING_IRQ if SMP | |
22 | select GENERIC_SMP_IDLE_THREAD | |
f46121bd | 23 | select HAVE_ARCH_KGDB |
547f1125 | 24 | select HAVE_ARCH_TRACEHOOK |
4368902b | 25 | select HAVE_IOREMAP_PROT |
4d86dfbb VG |
26 | select HAVE_KPROBES |
27 | select HAVE_KRETPROBES | |
c121c506 | 28 | select HAVE_MEMBLOCK |
854a0d95 | 29 | select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND |
769bc1fd | 30 | select HAVE_OPROFILE |
9c57564e | 31 | select HAVE_PERF_EVENTS |
999159a5 | 32 | select IRQ_DOMAIN |
cfdbc2e1 | 33 | select MODULES_USE_ELF_RELA |
c121c506 | 34 | select NO_BOOTMEM |
999159a5 VG |
35 | select OF |
36 | select OF_EARLY_FLATTREE | |
9c57564e | 37 | select PERF_USE_VMALLOC |
d1a1dc0b | 38 | select HAVE_DEBUG_STACKOVERFLOW |
cfdbc2e1 | 39 | |
0dafafc3 VG |
40 | config TRACE_IRQFLAGS_SUPPORT |
41 | def_bool y | |
42 | ||
43 | config LOCKDEP_SUPPORT | |
44 | def_bool y | |
45 | ||
cfdbc2e1 VG |
46 | config SCHED_OMIT_FRAME_POINTER |
47 | def_bool y | |
48 | ||
49 | config GENERIC_CSUM | |
50 | def_bool y | |
51 | ||
52 | config RWSEM_GENERIC_SPINLOCK | |
53 | def_bool y | |
54 | ||
55 | config ARCH_FLATMEM_ENABLE | |
56 | def_bool y | |
57 | ||
58 | config MMU | |
59 | def_bool y | |
60 | ||
ce816fa8 | 61 | config NO_IOPORT_MAP |
cfdbc2e1 VG |
62 | def_bool y |
63 | ||
64 | config GENERIC_CALIBRATE_DELAY | |
65 | def_bool y | |
66 | ||
67 | config GENERIC_HWEIGHT | |
68 | def_bool y | |
69 | ||
44c8bb91 VG |
70 | config STACKTRACE_SUPPORT |
71 | def_bool y | |
72 | select STACKTRACE | |
73 | ||
cfdbc2e1 VG |
74 | config HAVE_LATENCYTOP_SUPPORT |
75 | def_bool y | |
76 | ||
cfdbc2e1 VG |
77 | source "init/Kconfig" |
78 | source "kernel/Kconfig.freezer" | |
79 | ||
80 | menu "ARC Architecture Configuration" | |
81 | ||
93ad700d | 82 | menu "ARC Platform/SoC/Board" |
cfdbc2e1 | 83 | |
fd155792 | 84 | source "arch/arc/plat-sim/Kconfig" |
072eb693 | 85 | source "arch/arc/plat-tb10x/Kconfig" |
cfdbc2e1 | 86 | #New platform adds here |
93ad700d | 87 | |
53d98958 | 88 | endmenu |
cfdbc2e1 VG |
89 | |
90 | menu "ARC CPU Configuration" | |
91 | ||
92 | choice | |
93 | prompt "ARC Core" | |
94 | default ARC_CPU_770 | |
95 | ||
96 | config ARC_CPU_750D | |
97 | bool "ARC750D" | |
98 | help | |
99 | Support for ARC750 core | |
100 | ||
101 | config ARC_CPU_770 | |
102 | bool "ARC770" | |
742f8af6 | 103 | select ARC_HAS_SWAPE |
cfdbc2e1 VG |
104 | help |
105 | Support for ARC770 core introduced with Rel 4.10 (Summer 2011) | |
106 | This core has a bunch of cool new features: | |
107 | -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4) | |
108 | Shared Address Spaces (for sharing TLB entires in MMU) | |
109 | -Caches: New Prog Model, Region Flush | |
110 | -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr | |
111 | ||
112 | endchoice | |
113 | ||
114 | config CPU_BIG_ENDIAN | |
115 | bool "Enable Big Endian Mode" | |
116 | default n | |
117 | help | |
118 | Build kernel for Big Endian Mode of ARC CPU | |
119 | ||
41195d23 VG |
120 | config SMP |
121 | bool "Symmetric Multi-Processing (Incomplete)" | |
122 | default n | |
41195d23 VG |
123 | help |
124 | This enables support for systems with more than one CPU. If you have | |
4a474157 RG |
125 | a system with only one CPU, say N. If you have a system with more |
126 | than one CPU, say Y. | |
41195d23 VG |
127 | |
128 | if SMP | |
129 | ||
130 | config ARC_HAS_COH_CACHES | |
131 | def_bool n | |
132 | ||
41195d23 VG |
133 | config ARC_HAS_REENTRANT_IRQ_LV2 |
134 | def_bool n | |
135 | ||
136 | endif | |
137 | ||
138 | config NR_CPUS | |
3aa4f80e NC |
139 | int "Maximum number of CPUs (2-4096)" |
140 | range 2 4096 | |
41195d23 VG |
141 | depends on SMP |
142 | default "2" | |
143 | ||
cfdbc2e1 VG |
144 | menuconfig ARC_CACHE |
145 | bool "Enable Cache Support" | |
146 | default y | |
41195d23 VG |
147 | # if SMP, cache enabled ONLY if ARC implementation has cache coherency |
148 | depends on !SMP || ARC_HAS_COH_CACHES | |
cfdbc2e1 VG |
149 | |
150 | if ARC_CACHE | |
151 | ||
152 | config ARC_CACHE_LINE_SHIFT | |
153 | int "Cache Line Length (as power of 2)" | |
154 | range 5 7 | |
155 | default "6" | |
156 | help | |
157 | Starting with ARC700 4.9, Cache line length is configurable, | |
158 | This option specifies "N", with Line-len = 2 power N | |
159 | So line lengths of 32, 64, 128 are specified by 5,6,7, respectively | |
160 | Linux only supports same line lengths for I and D caches. | |
161 | ||
162 | config ARC_HAS_ICACHE | |
163 | bool "Use Instruction Cache" | |
164 | default y | |
165 | ||
166 | config ARC_HAS_DCACHE | |
167 | bool "Use Data Cache" | |
168 | default y | |
169 | ||
170 | config ARC_CACHE_PAGES | |
171 | bool "Per Page Cache Control" | |
172 | default y | |
173 | depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE | |
174 | help | |
175 | This can be used to over-ride the global I/D Cache Enable on a | |
176 | per-page basis (but only for pages accessed via MMU such as | |
177 | Kernel Virtual address or User Virtual Address) | |
178 | TLB entries have a per-page Cache Enable Bit. | |
179 | Note that Global I/D ENABLE + Per Page DISABLE works but corollary | |
180 | Global DISABLE + Per Page ENABLE won't work | |
181 | ||
4102b533 VG |
182 | config ARC_CACHE_VIPT_ALIASING |
183 | bool "Support VIPT Aliasing D$" | |
2f9e9961 | 184 | depends on ARC_HAS_DCACHE |
4102b533 VG |
185 | default n |
186 | ||
cfdbc2e1 VG |
187 | endif #ARC_CACHE |
188 | ||
8b5850f8 VG |
189 | config ARC_HAS_ICCM |
190 | bool "Use ICCM" | |
191 | help | |
192 | Single Cycle RAMS to store Fast Path Code | |
193 | default n | |
194 | ||
195 | config ARC_ICCM_SZ | |
196 | int "ICCM Size in KB" | |
197 | default "64" | |
198 | depends on ARC_HAS_ICCM | |
199 | ||
200 | config ARC_HAS_DCCM | |
201 | bool "Use DCCM" | |
202 | help | |
203 | Single Cycle RAMS to store Fast Path Data | |
204 | default n | |
205 | ||
206 | config ARC_DCCM_SZ | |
207 | int "DCCM Size in KB" | |
208 | default "64" | |
209 | depends on ARC_HAS_DCCM | |
210 | ||
211 | config ARC_DCCM_BASE | |
212 | hex "DCCM map address" | |
213 | default "0xA0000000" | |
214 | depends on ARC_HAS_DCCM | |
215 | ||
cfdbc2e1 VG |
216 | config ARC_HAS_HW_MPY |
217 | bool "Use Hardware Multiplier (Normal or Faster XMAC)" | |
218 | default y | |
219 | help | |
220 | Influences how gcc generates code for MPY operations. | |
221 | If enabled, MPYxx insns are generated, provided by Standard/XMAC | |
222 | Multipler. Otherwise software multipy lib is used | |
223 | ||
224 | choice | |
225 | prompt "ARC700 MMU Version" | |
226 | default ARC_MMU_V3 if ARC_CPU_770 | |
227 | default ARC_MMU_V2 if ARC_CPU_750D | |
228 | ||
229 | config ARC_MMU_V1 | |
230 | bool "MMU v1" | |
231 | help | |
232 | Orig ARC700 MMU | |
233 | ||
234 | config ARC_MMU_V2 | |
235 | bool "MMU v2" | |
236 | help | |
237 | Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio | |
238 | when 2 D-TLB and 1 I-TLB entries index into same 2way set. | |
239 | ||
240 | config ARC_MMU_V3 | |
241 | bool "MMU v3" | |
242 | depends on ARC_CPU_770 | |
243 | help | |
244 | Introduced with ARC700 4.10: New Features | |
245 | Variable Page size (1k-16k), var JTLB size 128 x (2 or 4) | |
246 | Shared Address Spaces (SASID) | |
247 | ||
248 | endchoice | |
249 | ||
250 | ||
251 | choice | |
252 | prompt "MMU Page Size" | |
253 | default ARC_PAGE_SIZE_8K | |
254 | ||
255 | config ARC_PAGE_SIZE_8K | |
256 | bool "8KB" | |
257 | help | |
258 | Choose between 8k vs 16k | |
259 | ||
260 | config ARC_PAGE_SIZE_16K | |
261 | bool "16KB" | |
262 | depends on ARC_MMU_V3 | |
263 | ||
264 | config ARC_PAGE_SIZE_4K | |
265 | bool "4KB" | |
266 | depends on ARC_MMU_V3 | |
267 | ||
268 | endchoice | |
269 | ||
4788a594 VG |
270 | config ARC_COMPACT_IRQ_LEVELS |
271 | bool "ARCompact IRQ Priorities: High(2)/Low(1)" | |
272 | default n | |
273 | # Timer HAS to be high priority, for any other high priority config | |
274 | select ARC_IRQ3_LV2 | |
41195d23 VG |
275 | # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy |
276 | depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2 | |
4788a594 VG |
277 | |
278 | if ARC_COMPACT_IRQ_LEVELS | |
279 | ||
280 | config ARC_IRQ3_LV2 | |
281 | bool | |
282 | ||
283 | config ARC_IRQ5_LV2 | |
284 | bool | |
285 | ||
286 | config ARC_IRQ6_LV2 | |
287 | bool | |
288 | ||
289 | endif | |
290 | ||
cfdbc2e1 VG |
291 | config ARC_FPU_SAVE_RESTORE |
292 | bool "Enable FPU state persistence across context switch" | |
293 | default n | |
294 | help | |
295 | Double Precision Floating Point unit had dedictaed regs which | |
296 | need to be saved/restored across context-switch. | |
297 | Note that ARC FPU is overly simplistic, unlike say x86, which has | |
298 | hardware pieces to allow software to conditionally save/restore, | |
299 | based on actual usage of FPU by a task. Thus our implemn does | |
300 | this for all tasks in system. | |
301 | ||
fbf8e13d VG |
302 | config ARC_CANT_LLSC |
303 | def_bool n | |
304 | ||
cfdbc2e1 VG |
305 | config ARC_HAS_LLSC |
306 | bool "Insn: LLOCK/SCOND (efficient atomic ops)" | |
307 | default y | |
fbf8e13d | 308 | depends on ARC_CPU_770 && !ARC_CANT_LLSC |
cfdbc2e1 VG |
309 | |
310 | config ARC_HAS_SWAPE | |
311 | bool "Insn: SWAPE (endian-swap)" | |
312 | default y | |
cfdbc2e1 | 313 | |
cfdbc2e1 VG |
314 | endmenu # "ARC CPU Configuration" |
315 | ||
cfdbc2e1 VG |
316 | config LINUX_LINK_BASE |
317 | hex "Linux Link Address" | |
318 | default "0x80000000" | |
319 | help | |
320 | ARC700 divides the 32 bit phy address space into two equal halves | |
321 | -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU | |
322 | -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel | |
323 | Typically Linux kernel is linked at the start of untransalted addr, | |
324 | hence the default value of 0x8zs. | |
325 | However some customers have peripherals mapped at this addr, so | |
326 | Linux needs to be scooted a bit. | |
327 | If you don't know what the above means, leave this setting alone. | |
328 | ||
080c3747 VG |
329 | config ARC_CURR_IN_REG |
330 | bool "Dedicate Register r25 for current_task pointer" | |
331 | default y | |
332 | help | |
333 | This reserved Register R25 to point to Current Task in | |
334 | kernel mode. This saves memory access for each such access | |
335 | ||
2e651ea1 | 336 | |
1736a56f | 337 | config ARC_EMUL_UNALIGNED |
2e651ea1 | 338 | bool "Emulate unaligned memory access (userspace only)" |
2e651ea1 VG |
339 | select SYSCTL_ARCH_UNALIGN_NO_WARN |
340 | select SYSCTL_ARCH_UNALIGN_ALLOW | |
341 | help | |
342 | This enables misaligned 16 & 32 bit memory access from user space. | |
343 | Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide | |
344 | potential bugs in code | |
345 | ||
cfdbc2e1 VG |
346 | config HZ |
347 | int "Timer Frequency" | |
348 | default 100 | |
349 | ||
cbe056f7 VG |
350 | config ARC_METAWARE_HLINK |
351 | bool "Support for Metaware debugger assisted Host access" | |
352 | default n | |
353 | help | |
354 | This options allows a Linux userland apps to directly access | |
355 | host file system (open/creat/read/write etc) with help from | |
356 | Metaware Debugger. This can come in handy for Linux-host communication | |
357 | when there is no real usable peripheral such as EMAC. | |
358 | ||
cfdbc2e1 VG |
359 | menuconfig ARC_DBG |
360 | bool "ARC debugging" | |
361 | default y | |
362 | ||
854a0d95 VG |
363 | config ARC_DW2_UNWIND |
364 | bool "Enable DWARF specific kernel stack unwind" | |
365 | depends on ARC_DBG | |
366 | default y | |
367 | select KALLSYMS | |
368 | help | |
369 | Compiles the kernel with DWARF unwind information and can be used | |
370 | to get stack backtraces. | |
371 | ||
372 | If you say Y here the resulting kernel image will be slightly larger | |
373 | but not slower, and it will give very useful debugging information. | |
374 | If you don't debug the kernel, you can say N, but we may not be able | |
375 | to solve problems without frame unwind information | |
376 | ||
cfdbc2e1 VG |
377 | config ARC_DBG_TLB_PARANOIA |
378 | bool "Paranoia Checks in Low Level TLB Handlers" | |
f46121bd | 379 | depends on ARC_DBG |
cfdbc2e1 VG |
380 | default n |
381 | ||
382 | config ARC_DBG_TLB_MISS_COUNT | |
383 | bool "Profile TLB Misses" | |
384 | default n | |
385 | select DEBUG_FS | |
386 | depends on ARC_DBG | |
387 | help | |
388 | Counts number of I and D TLB Misses and exports them via Debugfs | |
389 | The counters can be cleared via Debugfs as well | |
390 | ||
999159a5 VG |
391 | config ARC_BUILTIN_DTB_NAME |
392 | string "Built in DTB" | |
393 | help | |
394 | Set the name of the DTB to embed in the vmlinux binary | |
395 | Leaving it blank selects the minimal "skeleton" dtb | |
396 | ||
cfdbc2e1 VG |
397 | source "kernel/Kconfig.preempt" |
398 | ||
5628832f VG |
399 | menu "Executable file formats" |
400 | source "fs/Kconfig.binfmt" | |
401 | endmenu | |
402 | ||
cfdbc2e1 VG |
403 | endmenu # "ARC Architecture Configuration" |
404 | ||
405 | source "mm/Kconfig" | |
406 | source "net/Kconfig" | |
407 | source "drivers/Kconfig" | |
408 | source "fs/Kconfig" | |
409 | source "arch/arc/Kconfig.debug" | |
410 | source "security/Kconfig" | |
411 | source "crypto/Kconfig" | |
412 | source "lib/Kconfig" | |
996bad6c | 413 | source "kernel/power/Kconfig" |