]>
Commit | Line | Data |
---|---|---|
d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
4341881d AC |
2 | /* |
3 | * Copyright (C) 2014 Gumstix, Inc. - https://www.gumstix.com/ | |
4341881d AC |
4 | */ |
5 | /dts-v1/; | |
6 | ||
7 | #include <dt-bindings/input/input.h> | |
8 | #include "am33xx.dtsi" | |
9 | ||
10 | / { | |
11 | model = "Gumstix Pepper"; | |
12 | compatible = "gumstix,am335x-pepper", "ti,am33xx"; | |
13 | ||
14 | cpus { | |
15 | cpu@0 { | |
16 | cpu0-supply = <&dcdc3_reg>; | |
17 | }; | |
18 | }; | |
19 | ||
278cb79c | 20 | memory@80000000 { |
4341881d AC |
21 | device_type = "memory"; |
22 | reg = <0x80000000 0x20000000>; /* 512 MB */ | |
23 | }; | |
24 | ||
25 | buttons: user_buttons { | |
26 | compatible = "gpio-keys"; | |
27 | }; | |
28 | ||
29 | leds: user_leds { | |
30 | compatible = "gpio-leds"; | |
31 | }; | |
32 | ||
33 | panel: lcd_panel { | |
34 | compatible = "ti,tilcdc,panel"; | |
35 | }; | |
36 | ||
37 | sound: sound_iface { | |
38 | compatible = "ti,da830-evm-audio"; | |
39 | }; | |
40 | ||
4c049a5b | 41 | vbat: fixedregulator0 { |
4341881d AC |
42 | compatible = "regulator-fixed"; |
43 | }; | |
44 | ||
4c049a5b | 45 | v3v3c_reg: fixedregulator1 { |
4341881d AC |
46 | compatible = "regulator-fixed"; |
47 | }; | |
48 | ||
4c049a5b | 49 | vdd5_reg: fixedregulator2 { |
4341881d AC |
50 | compatible = "regulator-fixed"; |
51 | }; | |
52 | }; | |
53 | ||
54 | /* I2C Busses */ | |
55 | &i2c0 { | |
56 | status = "okay"; | |
57 | pinctrl-names = "default"; | |
58 | pinctrl-0 = <&i2c0_pins>; | |
59 | ||
60 | clock-frequency = <400000>; | |
61 | ||
62 | tps: tps@24 { | |
63 | reg = <0x24>; | |
64 | }; | |
65 | ||
66 | eeprom: eeprom@50 { | |
05e7d622 | 67 | compatible = "atmel,24c256"; |
4341881d AC |
68 | reg = <0x50>; |
69 | }; | |
70 | ||
71 | audio_codec: tlv320aic3106@1b { | |
72 | compatible = "ti,tlv320aic3106"; | |
73 | reg = <0x1b>; | |
9908ac3d | 74 | ai3x-micbias-vg = <0x2>; |
4341881d AC |
75 | }; |
76 | ||
77 | accel: lis331dlh@1d { | |
78 | compatible = "st,lis3lv02d"; | |
79 | reg = <0x1d>; | |
80 | }; | |
81 | }; | |
82 | ||
83 | &i2c1 { | |
84 | status = "okay"; | |
85 | pinctrl-names = "default"; | |
86 | pinctrl-0 = <&i2c1_pins>; | |
87 | clock-frequency = <400000>; | |
88 | }; | |
89 | ||
90 | &am33xx_pinmux { | |
91 | i2c0_pins: pinmux_i2c0 { | |
92 | pinctrl-single,pins = < | |
891ffb8f CQ |
93 | AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0) |
94 | AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0) | |
4341881d AC |
95 | >; |
96 | }; | |
97 | i2c1_pins: pinmux_i2c1 { | |
98 | pinctrl-single,pins = < | |
891ffb8f CQ |
99 | AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLUP, MUX_MODE3) /* mii1_crs,i2c1_sda */ |
100 | AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLUP, MUX_MODE3) /* mii1_rxerr,i2c1_scl */ | |
4341881d AC |
101 | >; |
102 | }; | |
103 | }; | |
104 | ||
105 | /* Accelerometer */ | |
106 | &accel { | |
107 | pinctrl-names = "default"; | |
108 | pinctrl-0 = <&accel_pins>; | |
109 | ||
110 | Vdd-supply = <&ldo3_reg>; | |
111 | Vdd_IO-supply = <&ldo3_reg>; | |
112 | st,irq1-click; | |
113 | st,wakeup-x-lo; | |
114 | st,wakeup-x-hi; | |
115 | st,wakeup-y-lo; | |
116 | st,wakeup-y-hi; | |
117 | st,wakeup-z-lo; | |
118 | st,wakeup-z-hi; | |
119 | st,min-limit-x = <92>; | |
120 | st,max-limit-x = <14>; | |
121 | st,min-limit-y = <14>; | |
122 | st,max-limit-y = <92>; | |
123 | st,min-limit-z = <92>; | |
124 | st,max-limit-z = <14>; | |
125 | }; | |
126 | ||
127 | &am33xx_pinmux { | |
128 | accel_pins: pinmux_accel { | |
129 | pinctrl-single,pins = < | |
891ffb8f | 130 | AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_INPUT, MUX_MODE7) /* gpmc_wen.gpio2_4 */ |
4341881d AC |
131 | >; |
132 | }; | |
133 | }; | |
134 | ||
135 | /* Audio */ | |
136 | &audio_codec { | |
137 | status = "okay"; | |
138 | ||
e153db03 | 139 | reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; |
4341881d AC |
140 | AVDD-supply = <&ldo3_reg>; |
141 | IOVDD-supply = <&ldo3_reg>; | |
142 | DRVDD-supply = <&ldo3_reg>; | |
143 | DVDD-supply = <&dcdc1_reg>; | |
144 | }; | |
145 | ||
146 | &sound { | |
147 | ti,model = "AM335x-EVM"; | |
148 | ti,audio-codec = <&audio_codec>; | |
149 | ti,mcasp-controller = <&mcasp0>; | |
150 | ti,codec-clock-rate = <12000000>; | |
151 | ti,audio-routing = | |
152 | "Headphone Jack", "HPLOUT", | |
153 | "Headphone Jack", "HPROUT", | |
9908ac3d | 154 | "MIC3L", "Mic3L Switch"; |
4341881d AC |
155 | }; |
156 | ||
157 | &mcasp0 { | |
158 | status = "okay"; | |
159 | pinctrl-names = "default"; | |
160 | pinctrl-0 = <&audio_pins>; | |
161 | ||
162 | op-mode = <0>; /* MCASP_ISS_MODE */ | |
163 | tdm-slots = <2>; | |
164 | serial-dir = < | |
165 | 1 2 0 0 | |
166 | 0 0 0 0 | |
167 | 0 0 0 0 | |
168 | 0 0 0 0 | |
169 | >; | |
170 | tx-num-evt = <1>; | |
171 | rx-num-evt = <1>; | |
172 | }; | |
173 | ||
174 | &am33xx_pinmux { | |
175 | audio_pins: pinmux_audio { | |
176 | pinctrl-single,pins = < | |
891ffb8f CQ |
177 | AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLDOWN, MUX_MODE0) |
178 | AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_INPUT_PULLDOWN, MUX_MODE0) | |
179 | AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_INPUT_PULLDOWN, MUX_MODE0) | |
180 | AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR0, PIN_INPUT_PULLDOWN, MUX_MODE0) | |
181 | AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR1, PIN_INPUT_PULLDOWN, MUX_MODE0) | |
182 | AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT, MUX_MODE7) /* gpmc_a0.gpio1_16 */ | |
4341881d AC |
183 | >; |
184 | }; | |
185 | }; | |
186 | ||
187 | /* Display: 24-bit LCD Screen */ | |
188 | &panel { | |
189 | status = "okay"; | |
190 | pinctrl-names = "default"; | |
191 | pinctrl-0 = <&lcd_pins>; | |
192 | panel-info { | |
193 | ac-bias = <255>; | |
194 | ac-bias-intrpt = <0>; | |
195 | dma-burst-sz = <16>; | |
196 | bpp = <32>; | |
197 | fdd = <0x80>; | |
198 | sync-edge = <0>; | |
199 | sync-ctrl = <1>; | |
200 | raster-order = <0>; | |
201 | fifo-th = <0>; | |
202 | }; | |
203 | display-timings { | |
204 | native-mode = <&timing0>; | |
205 | timing0: 480x272 { | |
206 | clock-frequency = <18400000>; | |
207 | hactive = <480>; | |
208 | vactive = <272>; | |
209 | hfront-porch = <8>; | |
210 | hback-porch = <4>; | |
211 | hsync-len = <41>; | |
212 | vfront-porch = <4>; | |
213 | vback-porch = <2>; | |
214 | vsync-len = <10>; | |
215 | hsync-active = <1>; | |
216 | vsync-active = <1>; | |
217 | }; | |
218 | }; | |
219 | }; | |
220 | ||
221 | &lcdc { | |
222 | status = "okay"; | |
223 | }; | |
224 | ||
225 | &am33xx_pinmux { | |
226 | lcd_pins: pinmux_lcd { | |
227 | pinctrl-single,pins = < | |
891ffb8f CQ |
228 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0) |
229 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0) | |
230 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0) | |
231 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0) | |
232 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0) | |
233 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0) | |
234 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0) | |
235 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0) | |
236 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0) | |
237 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0) | |
238 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0) | |
239 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0) | |
240 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0) | |
241 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0) | |
242 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0) | |
243 | AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0) | |
244 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad8.lcd_data16 */ | |
245 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad9.lcd_data17 */ | |
246 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad10.lcd_data18 */ | |
247 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad11.lcd_data19 */ | |
248 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad12.lcd_data20 */ | |
249 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad13.lcd_data21 */ | |
250 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad14.lcd_data22 */ | |
251 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_OUTPUT, MUX_MODE1) /* gpmc_ad15.lcd_data23 */ | |
252 | AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE0) | |
253 | AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE0) | |
254 | AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE0) | |
255 | AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE0) | |
4341881d | 256 | /* Display Enable */ |
891ffb8f | 257 | AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a11.gpio1_27 */ |
4341881d AC |
258 | >; |
259 | }; | |
260 | }; | |
261 | ||
262 | /* Ethernet */ | |
263 | &cpsw_emac0 { | |
264 | status = "okay"; | |
9e19b4bd | 265 | phy-handle = <ðphy0>; |
4341881d AC |
266 | phy-mode = "rgmii"; |
267 | }; | |
268 | ||
269 | &cpsw_emac1 { | |
270 | status = "okay"; | |
9e19b4bd | 271 | phy-handle = <ðphy1>; |
4341881d AC |
272 | phy-mode = "rgmii"; |
273 | }; | |
274 | ||
275 | &davinci_mdio { | |
276 | status = "okay"; | |
277 | pinctrl-names = "default"; | |
278 | pinctrl-0 = <&mdio_pins>; | |
9e19b4bd GS |
279 | |
280 | ethphy0: ethernet-phy@0 { | |
281 | reg = <0>; | |
282 | }; | |
283 | ||
284 | ethphy1: ethernet-phy@1 { | |
285 | reg = <1>; | |
286 | }; | |
4341881d AC |
287 | }; |
288 | ||
289 | &mac { | |
290 | status = "okay"; | |
291 | pinctrl-names = "default"; | |
292 | pinctrl-0 = <ðernet_pins>; | |
293 | }; | |
294 | ||
295 | ||
296 | &am33xx_pinmux { | |
297 | ethernet_pins: pinmux_ethernet { | |
298 | pinctrl-single,pins = < | |
891ffb8f CQ |
299 | AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txen.rgmii1_tctl */ |
300 | AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLUP, MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ | |
301 | AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ | |
302 | AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ | |
303 | AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ | |
304 | AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ | |
305 | AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE2) | |
306 | AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLUP, MUX_MODE2) | |
307 | AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE2) | |
308 | AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLUP, MUX_MODE2) | |
309 | AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE2) | |
310 | AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLUP, MUX_MODE2) | |
4341881d | 311 | /* ethernet interrupt */ |
891ffb8f | 312 | AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLUP, MUX_MODE7) /* rmii2_refclk.gpio0_29 */ |
4341881d | 313 | /* ethernet PHY nReset */ |
891ffb8f | 314 | AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_OUTPUT_PULLUP, MUX_MODE7) /* mii1_col.gpio3_0 */ |
4341881d AC |
315 | >; |
316 | }; | |
317 | ||
318 | mdio_pins: pinmux_mdio { | |
319 | pinctrl-single,pins = < | |
891ffb8f CQ |
320 | AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0) |
321 | AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0) | |
4341881d AC |
322 | >; |
323 | }; | |
324 | }; | |
325 | ||
326 | /* MMC */ | |
327 | &mmc1 { | |
328 | /* Bootable SD card slot */ | |
329 | status = "okay"; | |
330 | vmmc-supply = <&ldo3_reg>; | |
331 | bus-width = <4>; | |
332 | pinctrl-names = "default"; | |
333 | pinctrl-0 = <&sd_pins>; | |
334 | cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; | |
335 | }; | |
336 | ||
337 | &mmc2 { | |
338 | /* eMMC (not populated) on MMC #2 */ | |
339 | status = "disabled"; | |
340 | pinctrl-names = "default"; | |
341 | pinctrl-0 = <&emmc_pins>; | |
342 | vmmc-supply = <&ldo3_reg>; | |
343 | bus-width = <8>; | |
344 | ti,non-removable; | |
345 | }; | |
346 | ||
4341881d AC |
347 | &mmc3 { |
348 | /* Wifi & Bluetooth on MMC #3 */ | |
349 | status = "okay"; | |
350 | pinctrl-names = "default"; | |
351 | pinctrl-0 = <&wireless_pins>; | |
352 | vmmmc-supply = <&v3v3c_reg>; | |
353 | bus-width = <4>; | |
354 | ti,non-removable; | |
b5e50906 PU |
355 | dmas = <&edma_xbar 12 0 1 |
356 | &edma_xbar 13 0 2>; | |
4341881d AC |
357 | dma-names = "tx", "rx"; |
358 | }; | |
359 | ||
360 | ||
361 | &am33xx_pinmux { | |
362 | sd_pins: pinmux_sd_card { | |
363 | pinctrl-single,pins = < | |
891ffb8f CQ |
364 | AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0) |
365 | AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0) | |
366 | AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0) | |
367 | AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0) | |
368 | AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0) | |
369 | AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0) | |
370 | AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7) /* spi0_cs1.gpio0_6 */ | |
4341881d AC |
371 | >; |
372 | }; | |
373 | emmc_pins: pinmux_emmc { | |
374 | pinctrl-single,pins = < | |
891ffb8f CQ |
375 | AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */ |
376 | AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ | |
377 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ | |
378 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ | |
379 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ | |
380 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ | |
381 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ | |
382 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ | |
383 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ | |
384 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ | |
4341881d | 385 | /* EMMC nReset */ |
891ffb8f | 386 | AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_wpn.gpio0_31 */ |
4341881d AC |
387 | >; |
388 | }; | |
389 | wireless_pins: pinmux_wireless { | |
390 | pinctrl-single,pins = < | |
891ffb8f CQ |
391 | AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_a1.mmc2_dat0 */ |
392 | AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_a2.mmc2_dat1 */ | |
393 | AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_a3.mmc2_dat2 */ | |
394 | AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ben1.mmc2_dat3 */ | |
395 | AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_csn3.mmc2_cmd */ | |
396 | AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_clk.mmc1_clk */ | |
4341881d | 397 | /* WLAN nReset */ |
891ffb8f | 398 | AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a8.gpio1_24 */ |
4341881d | 399 | /* WLAN nPower down */ |
891ffb8f | 400 | AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_wait0.gpio0_30 */ |
4341881d | 401 | /* 32kHz Clock */ |
891ffb8f | 402 | AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* xdma_event_intr1.clkout2 */ |
4341881d AC |
403 | >; |
404 | }; | |
405 | }; | |
406 | ||
407 | /* Power */ | |
408 | &vbat { | |
409 | regulator-name = "vbat"; | |
410 | regulator-min-microvolt = <5000000>; | |
411 | regulator-max-microvolt = <5000000>; | |
412 | }; | |
413 | ||
414 | &v3v3c_reg { | |
415 | regulator-name = "v3v3c_reg"; | |
416 | regulator-min-microvolt = <3300000>; | |
417 | regulator-max-microvolt = <3300000>; | |
418 | vin-supply = <&vbat>; | |
419 | }; | |
420 | ||
421 | &vdd5_reg { | |
422 | regulator-name = "vdd5_reg"; | |
423 | regulator-min-microvolt = <5000000>; | |
424 | regulator-max-microvolt = <5000000>; | |
425 | vin-supply = <&vbat>; | |
426 | }; | |
427 | ||
e327b3f5 | 428 | /include/ "tps65217.dtsi" |
8e6ebfaa | 429 | |
e327b3f5 | 430 | &tps { |
4341881d AC |
431 | backlight { |
432 | isel = <1>; /* ISET1 */ | |
433 | fdim = <200>; /* TPS65217_BL_FDIM_200HZ */ | |
434 | default-brightness = <80>; | |
435 | }; | |
436 | ||
437 | regulators { | |
438 | dcdc1_reg: regulator@0 { | |
439 | /* VDD_1V8 system supply */ | |
5aed4ee7 | 440 | regulator-always-on; |
4341881d AC |
441 | }; |
442 | ||
443 | dcdc2_reg: regulator@1 { | |
444 | /* VDD_CORE voltage limits 0.95V - 1.26V with +/-4% tolerance */ | |
445 | regulator-name = "vdd_core"; | |
446 | regulator-min-microvolt = <925000>; | |
693f4f4c | 447 | regulator-max-microvolt = <1150000>; |
4341881d | 448 | regulator-boot-on; |
5aed4ee7 | 449 | regulator-always-on; |
4341881d AC |
450 | }; |
451 | ||
452 | dcdc3_reg: regulator@2 { | |
453 | /* VDD_MPU voltage limits 0.95V - 1.1V with +/-4% tolerance */ | |
454 | regulator-name = "vdd_mpu"; | |
455 | regulator-min-microvolt = <925000>; | |
693f4f4c | 456 | regulator-max-microvolt = <1325000>; |
4341881d | 457 | regulator-boot-on; |
5aed4ee7 | 458 | regulator-always-on; |
4341881d AC |
459 | }; |
460 | ||
461 | ldo1_reg: regulator@3 { | |
462 | /* VRTC 1.8V always-on supply */ | |
5aed4ee7 | 463 | regulator-name = "vrtc,vdds"; |
4341881d AC |
464 | regulator-always-on; |
465 | }; | |
466 | ||
467 | ldo2_reg: regulator@4 { | |
468 | /* 3.3V rail */ | |
5aed4ee7 AYL |
469 | regulator-name = "vdd_3v3aux"; |
470 | regulator-always-on; | |
4341881d AC |
471 | }; |
472 | ||
473 | ldo3_reg: regulator@5 { | |
474 | /* VDD_3V3A 3.3V rail */ | |
5aed4ee7 | 475 | regulator-name = "vdd_3v3a"; |
4341881d AC |
476 | regulator-min-microvolt = <3300000>; |
477 | regulator-max-microvolt = <3300000>; | |
478 | }; | |
479 | ||
480 | ldo4_reg: regulator@6 { | |
481 | /* VDD_3V3B 3.3V rail */ | |
5aed4ee7 AYL |
482 | regulator-name = "vdd_3v3b"; |
483 | regulator-always-on; | |
4341881d AC |
484 | }; |
485 | }; | |
486 | }; | |
487 | ||
488 | /* SPI Busses */ | |
489 | &spi0 { | |
490 | status = "okay"; | |
491 | pinctrl-names = "default"; | |
492 | pinctrl-0 = <&spi0_pins>; | |
493 | }; | |
494 | ||
495 | &am33xx_pinmux { | |
496 | spi0_pins: pinmux_spi0 { | |
497 | pinctrl-single,pins = < | |
891ffb8f CQ |
498 | AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE0) |
499 | AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE0) | |
500 | AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLUP, MUX_MODE0) | |
501 | AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0) | |
4341881d AC |
502 | >; |
503 | }; | |
504 | }; | |
505 | ||
506 | /* Touch Screen */ | |
507 | &tscadc { | |
508 | status = "okay"; | |
509 | tsc { | |
510 | ti,wires = <4>; | |
511 | ti,x-plate-resistance = <200>; | |
512 | ti,coordinate-readouts = <5>; | |
513 | ti,wire-config = <0x00 0x11 0x22 0x33>; | |
514 | }; | |
515 | ||
516 | adc { | |
517 | ti,adc-channels = <4 5 6 7>; | |
518 | }; | |
519 | }; | |
520 | ||
521 | /* UARTs */ | |
522 | &uart0 { | |
523 | /* Serial Console */ | |
524 | status = "okay"; | |
525 | pinctrl-names = "default"; | |
526 | pinctrl-0 = <&uart0_pins>; | |
527 | }; | |
528 | ||
529 | &uart1 { | |
530 | /* Broken out to J6 header */ | |
531 | status = "okay"; | |
532 | pinctrl-names = "default"; | |
533 | pinctrl-0 = <&uart1_pins>; | |
534 | }; | |
535 | ||
536 | &am33xx_pinmux { | |
537 | uart0_pins: pinmux_uart0 { | |
538 | pinctrl-single,pins = < | |
891ffb8f CQ |
539 | AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0) |
540 | AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) | |
4341881d AC |
541 | >; |
542 | }; | |
543 | uart1_pins: pinmux_uart1 { | |
544 | pinctrl-single,pins = < | |
891ffb8f CQ |
545 | AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE0) |
546 | AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) | |
547 | AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0) | |
548 | AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) | |
4341881d AC |
549 | >; |
550 | }; | |
551 | }; | |
552 | ||
553 | /* USB */ | |
554 | &usb { | |
555 | status = "okay"; | |
556 | ||
557 | pinctrl-names = "default"; | |
558 | pinctrl-0 = <&usb_pins>; | |
559 | }; | |
560 | ||
561 | &usb_ctrl_mod { | |
562 | status = "okay"; | |
563 | }; | |
564 | ||
565 | &usb0_phy { | |
566 | status = "okay"; | |
567 | }; | |
568 | ||
569 | &usb1_phy { | |
570 | status = "okay"; | |
571 | }; | |
572 | ||
573 | &usb0 { | |
574 | status = "okay"; | |
575 | dr_mode = "host"; | |
576 | }; | |
577 | ||
578 | &usb1 { | |
579 | status = "okay"; | |
580 | dr_mode = "host"; | |
581 | }; | |
582 | ||
583 | &cppi41dma { | |
584 | status = "okay"; | |
585 | }; | |
586 | ||
587 | &am33xx_pinmux { | |
588 | usb_pins: pinmux_usb { | |
589 | pinctrl-single,pins = < | |
590 | /* USB0 Over-Current (active low) */ | |
891ffb8f | 591 | AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT, MUX_MODE7) /* gpmc_a9.gpio1_25 */ |
4341881d | 592 | /* USB1 Over-Current (active low) */ |
891ffb8f | 593 | AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT, MUX_MODE7) /* gpmc_a10.gpio1_26 */ |
4341881d AC |
594 | >; |
595 | }; | |
596 | }; | |
597 | ||
598 | /* User IO */ | |
599 | &leds { | |
600 | pinctrl-names = "default"; | |
601 | pinctrl-0 = <&user_leds_pins>; | |
602 | ||
c731abd9 | 603 | led0 { |
4341881d AC |
604 | label = "pepper:user0:blue"; |
605 | gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>; | |
606 | linux,default-trigger = "none"; | |
607 | default-state = "off"; | |
608 | }; | |
609 | ||
c731abd9 | 610 | led1 { |
4341881d AC |
611 | label = "pepper:user1:red"; |
612 | gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; | |
613 | linux,default-trigger = "none"; | |
614 | default-state = "off"; | |
615 | }; | |
616 | }; | |
617 | ||
618 | &buttons { | |
619 | pinctrl-names = "default"; | |
620 | pinctrl-0 = <&user_buttons_pins>; | |
621 | #address-cells = <1>; | |
622 | #size-cells = <0>; | |
623 | ||
57a78a8a | 624 | button0 { |
4341881d AC |
625 | label = "home"; |
626 | linux,code = <KEY_HOME>; | |
627 | gpios = <&gpio1 22 GPIO_ACTIVE_LOW>; | |
3efda001 | 628 | wakeup-source; |
4341881d AC |
629 | }; |
630 | ||
57a78a8a | 631 | button1 { |
4341881d AC |
632 | label = "menu"; |
633 | linux,code = <KEY_MENU>; | |
634 | gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; | |
3efda001 | 635 | wakeup-source; |
4341881d AC |
636 | }; |
637 | ||
57a78a8a | 638 | buttons2 { |
4341881d AC |
639 | label = "power"; |
640 | linux,code = <KEY_POWER>; | |
641 | gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; | |
3efda001 | 642 | wakeup-source; |
4341881d AC |
643 | }; |
644 | }; | |
645 | ||
646 | &am33xx_pinmux { | |
647 | user_leds_pins: pinmux_user_leds { | |
648 | pinctrl-single,pins = < | |
891ffb8f CQ |
649 | AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT, MUX_MODE7) /* gpmc_a4.gpio1_20 */ |
650 | AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7) /* gpmc_a5.gpio1_21 */ | |
4341881d AC |
651 | >; |
652 | }; | |
653 | ||
654 | user_buttons_pins: pinmux_user_buttons { | |
655 | pinctrl-single,pins = < | |
891ffb8f CQ |
656 | AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_INPUT_PULLUP, MUX_MODE7) /* gpmc_a6.gpio1_22 */ |
657 | AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLUP, MUX_MODE7) /* gpmc_a7.gpio1_21 */ | |
658 | AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_INPUT_PULLUP, MUX_MODE7) /* gpmc_a8.gpio0_7 */ | |
4341881d AC |
659 | >; |
660 | }; | |
661 | }; |