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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/kernel/smp.c | |
3 | * | |
4 | * Copyright (C) 2002 ARM Limited, All Rights Reserved. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
c97d4869 | 10 | #include <linux/module.h> |
1da177e4 LT |
11 | #include <linux/delay.h> |
12 | #include <linux/init.h> | |
13 | #include <linux/spinlock.h> | |
14 | #include <linux/sched.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/cache.h> | |
17 | #include <linux/profile.h> | |
18 | #include <linux/errno.h> | |
19 | #include <linux/mm.h> | |
4e950f6f | 20 | #include <linux/err.h> |
1da177e4 LT |
21 | #include <linux/cpu.h> |
22 | #include <linux/smp.h> | |
23 | #include <linux/seq_file.h> | |
c97d4869 | 24 | #include <linux/irq.h> |
1da177e4 LT |
25 | |
26 | #include <asm/atomic.h> | |
27 | #include <asm/cacheflush.h> | |
28 | #include <asm/cpu.h> | |
e65f38ed RK |
29 | #include <asm/mmu_context.h> |
30 | #include <asm/pgtable.h> | |
31 | #include <asm/pgalloc.h> | |
1da177e4 LT |
32 | #include <asm/processor.h> |
33 | #include <asm/tlbflush.h> | |
34 | #include <asm/ptrace.h> | |
35 | ||
e65f38ed RK |
36 | /* |
37 | * as from 2.5, kernels no longer have an init_tasks structure | |
38 | * so we need some other way of telling a new secondary core | |
39 | * where to place its SVC stack | |
40 | */ | |
41 | struct secondary_data secondary_data; | |
42 | ||
1da177e4 LT |
43 | /* |
44 | * structures for inter-processor calls | |
45 | * - A collection of single bit ipi messages. | |
46 | */ | |
47 | struct ipi_data { | |
48 | spinlock_t lock; | |
49 | unsigned long ipi_count; | |
50 | unsigned long bits; | |
51 | }; | |
52 | ||
53 | static DEFINE_PER_CPU(struct ipi_data, ipi_data) = { | |
54 | .lock = SPIN_LOCK_UNLOCKED, | |
55 | }; | |
56 | ||
57 | enum ipi_msg_type { | |
58 | IPI_TIMER, | |
59 | IPI_RESCHEDULE, | |
60 | IPI_CALL_FUNC, | |
f6dd9fa5 | 61 | IPI_CALL_FUNC_SINGLE, |
1da177e4 LT |
62 | IPI_CPU_STOP, |
63 | }; | |
64 | ||
bd6f68af | 65 | int __cpuinit __cpu_up(unsigned int cpu) |
1da177e4 | 66 | { |
71f512e8 RK |
67 | struct cpuinfo_arm *ci = &per_cpu(cpu_data, cpu); |
68 | struct task_struct *idle = ci->idle; | |
e65f38ed RK |
69 | pgd_t *pgd; |
70 | pmd_t *pmd; | |
1da177e4 LT |
71 | int ret; |
72 | ||
73 | /* | |
71f512e8 RK |
74 | * Spawn a new process manually, if not already done. |
75 | * Grab a pointer to its task struct so we can mess with it | |
1da177e4 | 76 | */ |
71f512e8 RK |
77 | if (!idle) { |
78 | idle = fork_idle(cpu); | |
79 | if (IS_ERR(idle)) { | |
80 | printk(KERN_ERR "CPU%u: fork() failed\n", cpu); | |
81 | return PTR_ERR(idle); | |
82 | } | |
83 | ci->idle = idle; | |
1da177e4 LT |
84 | } |
85 | ||
e65f38ed RK |
86 | /* |
87 | * Allocate initial page tables to allow the new CPU to | |
88 | * enable the MMU safely. This essentially means a set | |
89 | * of our "standard" page tables, with the addition of | |
90 | * a 1:1 mapping for the physical address of the kernel. | |
91 | */ | |
92 | pgd = pgd_alloc(&init_mm); | |
058ddee5 | 93 | pmd = pmd_offset(pgd + pgd_index(PHYS_OFFSET), PHYS_OFFSET); |
e65f38ed RK |
94 | *pmd = __pmd((PHYS_OFFSET & PGDIR_MASK) | |
95 | PMD_TYPE_SECT | PMD_SECT_AP_WRITE); | |
e9fc7823 | 96 | flush_pmd_entry(pmd); |
e65f38ed RK |
97 | |
98 | /* | |
99 | * We need to tell the secondary core where to find | |
100 | * its stack and the page tables. | |
101 | */ | |
32d39a93 | 102 | secondary_data.stack = task_stack_page(idle) + THREAD_START_SP; |
e65f38ed RK |
103 | secondary_data.pgdir = virt_to_phys(pgd); |
104 | wmb(); | |
105 | ||
1da177e4 LT |
106 | /* |
107 | * Now bring the CPU into our world. | |
108 | */ | |
109 | ret = boot_secondary(cpu, idle); | |
e65f38ed RK |
110 | if (ret == 0) { |
111 | unsigned long timeout; | |
112 | ||
113 | /* | |
114 | * CPU was successfully started, wait for it | |
115 | * to come online or time out. | |
116 | */ | |
117 | timeout = jiffies + HZ; | |
118 | while (time_before(jiffies, timeout)) { | |
119 | if (cpu_online(cpu)) | |
120 | break; | |
121 | ||
122 | udelay(10); | |
123 | barrier(); | |
124 | } | |
125 | ||
126 | if (!cpu_online(cpu)) | |
127 | ret = -EIO; | |
128 | } | |
129 | ||
5d43045b | 130 | secondary_data.stack = NULL; |
e65f38ed RK |
131 | secondary_data.pgdir = 0; |
132 | ||
058ddee5 | 133 | *pmd = __pmd(0); |
e9fc7823 | 134 | clean_pmd_entry(pmd); |
5e541973 | 135 | pgd_free(&init_mm, pgd); |
e65f38ed | 136 | |
1da177e4 | 137 | if (ret) { |
0908db22 RK |
138 | printk(KERN_CRIT "CPU%u: processor failed to boot\n", cpu); |
139 | ||
1da177e4 LT |
140 | /* |
141 | * FIXME: We need to clean up the new idle thread. --rmk | |
142 | */ | |
143 | } | |
144 | ||
145 | return ret; | |
146 | } | |
147 | ||
a054a811 RK |
148 | #ifdef CONFIG_HOTPLUG_CPU |
149 | /* | |
150 | * __cpu_disable runs on the processor to be shutdown. | |
151 | */ | |
152 | int __cpuexit __cpu_disable(void) | |
153 | { | |
154 | unsigned int cpu = smp_processor_id(); | |
155 | struct task_struct *p; | |
156 | int ret; | |
157 | ||
158 | ret = mach_cpu_disable(cpu); | |
159 | if (ret) | |
160 | return ret; | |
161 | ||
162 | /* | |
163 | * Take this CPU offline. Once we clear this, we can't return, | |
164 | * and we must not schedule until we're ready to give up the cpu. | |
165 | */ | |
166 | cpu_clear(cpu, cpu_online_map); | |
167 | ||
168 | /* | |
169 | * OK - migrate IRQs away from this CPU | |
170 | */ | |
171 | migrate_irqs(); | |
172 | ||
37ee16ae RK |
173 | /* |
174 | * Stop the local timer for this CPU. | |
175 | */ | |
ebac6546 | 176 | local_timer_stop(); |
37ee16ae | 177 | |
a054a811 RK |
178 | /* |
179 | * Flush user cache and TLB mappings, and then remove this CPU | |
180 | * from the vm mask set of all processes. | |
181 | */ | |
182 | flush_cache_all(); | |
183 | local_flush_tlb_all(); | |
184 | ||
185 | read_lock(&tasklist_lock); | |
186 | for_each_process(p) { | |
187 | if (p->mm) | |
188 | cpu_clear(cpu, p->mm->cpu_vm_mask); | |
189 | } | |
190 | read_unlock(&tasklist_lock); | |
191 | ||
192 | return 0; | |
193 | } | |
194 | ||
195 | /* | |
196 | * called on the thread which is asking for a CPU to be shutdown - | |
197 | * waits until shutdown has completed, or it is timed out. | |
198 | */ | |
199 | void __cpuexit __cpu_die(unsigned int cpu) | |
200 | { | |
201 | if (!platform_cpu_kill(cpu)) | |
202 | printk("CPU%u: unable to kill\n", cpu); | |
203 | } | |
204 | ||
205 | /* | |
206 | * Called from the idle thread for the CPU which has been shutdown. | |
207 | * | |
208 | * Note that we disable IRQs here, but do not re-enable them | |
209 | * before returning to the caller. This is also the behaviour | |
210 | * of the other hotplug-cpu capable cores, so presumably coming | |
211 | * out of idle fixes this. | |
212 | */ | |
213 | void __cpuexit cpu_die(void) | |
214 | { | |
215 | unsigned int cpu = smp_processor_id(); | |
216 | ||
217 | local_irq_disable(); | |
218 | idle_task_exit(); | |
219 | ||
220 | /* | |
221 | * actual CPU shutdown procedure is at least platform (if not | |
222 | * CPU) specific | |
223 | */ | |
224 | platform_cpu_die(cpu); | |
225 | ||
226 | /* | |
227 | * Do not return to the idle loop - jump back to the secondary | |
228 | * cpu initialisation. There's some initialisation which needs | |
229 | * to be repeated to undo the effects of taking the CPU offline. | |
230 | */ | |
231 | __asm__("mov sp, %0\n" | |
232 | " b secondary_start_kernel" | |
233 | : | |
32d39a93 | 234 | : "r" (task_stack_page(current) + THREAD_SIZE - 8)); |
a054a811 RK |
235 | } |
236 | #endif /* CONFIG_HOTPLUG_CPU */ | |
237 | ||
e65f38ed RK |
238 | /* |
239 | * This is the secondary CPU boot entry. We're using this CPUs | |
240 | * idle thread stack, but a set of temporary page tables. | |
241 | */ | |
bd6f68af | 242 | asmlinkage void __cpuinit secondary_start_kernel(void) |
e65f38ed RK |
243 | { |
244 | struct mm_struct *mm = &init_mm; | |
da2660d2 | 245 | unsigned int cpu = smp_processor_id(); |
e65f38ed RK |
246 | |
247 | printk("CPU%u: Booted secondary processor\n", cpu); | |
248 | ||
249 | /* | |
250 | * All kernel threads share the same mm context; grab a | |
251 | * reference and switch to it. | |
252 | */ | |
253 | atomic_inc(&mm->mm_users); | |
254 | atomic_inc(&mm->mm_count); | |
255 | current->active_mm = mm; | |
256 | cpu_set(cpu, mm->cpu_vm_mask); | |
257 | cpu_switch_mm(mm->pgd, mm); | |
258 | enter_lazy_tlb(mm, current); | |
505d7b19 | 259 | local_flush_tlb_all(); |
e65f38ed RK |
260 | |
261 | cpu_init(); | |
5bfb5d69 | 262 | preempt_disable(); |
e65f38ed RK |
263 | |
264 | /* | |
265 | * Give the platform a chance to do its own initialisation. | |
266 | */ | |
267 | platform_secondary_init(cpu); | |
268 | ||
269 | /* | |
270 | * Enable local interrupts. | |
271 | */ | |
e545a614 | 272 | notify_cpu_starting(cpu); |
e65f38ed RK |
273 | local_irq_enable(); |
274 | local_fiq_enable(); | |
275 | ||
a8655e83 CM |
276 | /* |
277 | * Setup local timer for this CPU. | |
278 | */ | |
ebac6546 | 279 | local_timer_setup(); |
a8655e83 | 280 | |
e65f38ed RK |
281 | calibrate_delay(); |
282 | ||
283 | smp_store_cpu_info(cpu); | |
284 | ||
285 | /* | |
286 | * OK, now it's safe to let the boot CPU continue | |
287 | */ | |
288 | cpu_set(cpu, cpu_online_map); | |
289 | ||
290 | /* | |
291 | * OK, it's off to the idle thread for us | |
292 | */ | |
293 | cpu_idle(); | |
294 | } | |
295 | ||
1da177e4 LT |
296 | /* |
297 | * Called by both boot and secondaries to move global data into | |
298 | * per-processor storage. | |
299 | */ | |
bd6f68af | 300 | void __cpuinit smp_store_cpu_info(unsigned int cpuid) |
1da177e4 LT |
301 | { |
302 | struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid); | |
303 | ||
304 | cpu_info->loops_per_jiffy = loops_per_jiffy; | |
305 | } | |
306 | ||
307 | void __init smp_cpus_done(unsigned int max_cpus) | |
308 | { | |
309 | int cpu; | |
310 | unsigned long bogosum = 0; | |
311 | ||
312 | for_each_online_cpu(cpu) | |
313 | bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy; | |
314 | ||
315 | printk(KERN_INFO "SMP: Total of %d processors activated " | |
316 | "(%lu.%02lu BogoMIPS).\n", | |
317 | num_online_cpus(), | |
318 | bogosum / (500000/HZ), | |
319 | (bogosum / (5000/HZ)) % 100); | |
320 | } | |
321 | ||
322 | void __init smp_prepare_boot_cpu(void) | |
323 | { | |
324 | unsigned int cpu = smp_processor_id(); | |
325 | ||
71f512e8 | 326 | per_cpu(cpu_data, cpu).idle = current; |
1da177e4 LT |
327 | } |
328 | ||
82668104 | 329 | static void send_ipi_message(const struct cpumask *mask, enum ipi_msg_type msg) |
1da177e4 LT |
330 | { |
331 | unsigned long flags; | |
332 | unsigned int cpu; | |
333 | ||
334 | local_irq_save(flags); | |
335 | ||
82668104 | 336 | for_each_cpu(cpu, mask) { |
1da177e4 LT |
337 | struct ipi_data *ipi = &per_cpu(ipi_data, cpu); |
338 | ||
339 | spin_lock(&ipi->lock); | |
340 | ipi->bits |= 1 << msg; | |
341 | spin_unlock(&ipi->lock); | |
342 | } | |
343 | ||
344 | /* | |
345 | * Call the platform specific cross-CPU call function. | |
346 | */ | |
82668104 | 347 | smp_cross_call(mask); |
1da177e4 LT |
348 | |
349 | local_irq_restore(flags); | |
350 | } | |
351 | ||
82668104 | 352 | void arch_send_call_function_ipi_mask(const struct cpumask *mask) |
1da177e4 | 353 | { |
f6dd9fa5 | 354 | send_ipi_message(mask, IPI_CALL_FUNC); |
1da177e4 LT |
355 | } |
356 | ||
f6dd9fa5 | 357 | void arch_send_call_function_single_ipi(int cpu) |
3e459990 | 358 | { |
82668104 | 359 | send_ipi_message(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE); |
3e459990 | 360 | } |
3e459990 | 361 | |
1da177e4 LT |
362 | void show_ipi_list(struct seq_file *p) |
363 | { | |
364 | unsigned int cpu; | |
365 | ||
366 | seq_puts(p, "IPI:"); | |
367 | ||
e11b2236 | 368 | for_each_present_cpu(cpu) |
1da177e4 LT |
369 | seq_printf(p, " %10lu", per_cpu(ipi_data, cpu).ipi_count); |
370 | ||
371 | seq_putc(p, '\n'); | |
372 | } | |
373 | ||
37ee16ae RK |
374 | void show_local_irqs(struct seq_file *p) |
375 | { | |
376 | unsigned int cpu; | |
377 | ||
378 | seq_printf(p, "LOC: "); | |
379 | ||
380 | for_each_present_cpu(cpu) | |
381 | seq_printf(p, "%10u ", irq_stat[cpu].local_timer_irqs); | |
382 | ||
383 | seq_putc(p, '\n'); | |
384 | } | |
385 | ||
c97d4869 | 386 | static void ipi_timer(void) |
1da177e4 | 387 | { |
1da177e4 | 388 | irq_enter(); |
3e459990 | 389 | local_timer_interrupt(); |
1da177e4 LT |
390 | irq_exit(); |
391 | } | |
392 | ||
37ee16ae | 393 | #ifdef CONFIG_LOCAL_TIMERS |
b9811d7f | 394 | asmlinkage void __exception do_local_timer(struct pt_regs *regs) |
37ee16ae | 395 | { |
c97d4869 | 396 | struct pt_regs *old_regs = set_irq_regs(regs); |
37ee16ae RK |
397 | int cpu = smp_processor_id(); |
398 | ||
399 | if (local_timer_ack()) { | |
400 | irq_stat[cpu].local_timer_irqs++; | |
c97d4869 | 401 | ipi_timer(); |
37ee16ae | 402 | } |
c97d4869 RK |
403 | |
404 | set_irq_regs(old_regs); | |
37ee16ae RK |
405 | } |
406 | #endif | |
407 | ||
1da177e4 LT |
408 | static DEFINE_SPINLOCK(stop_lock); |
409 | ||
410 | /* | |
411 | * ipi_cpu_stop - handle IPI from smp_send_stop() | |
412 | */ | |
413 | static void ipi_cpu_stop(unsigned int cpu) | |
414 | { | |
415 | spin_lock(&stop_lock); | |
416 | printk(KERN_CRIT "CPU%u: stopping\n", cpu); | |
417 | dump_stack(); | |
418 | spin_unlock(&stop_lock); | |
419 | ||
420 | cpu_clear(cpu, cpu_online_map); | |
421 | ||
422 | local_fiq_disable(); | |
423 | local_irq_disable(); | |
424 | ||
425 | while (1) | |
426 | cpu_relax(); | |
427 | } | |
428 | ||
429 | /* | |
430 | * Main handler for inter-processor interrupts | |
431 | * | |
432 | * For ARM, the ipimask now only identifies a single | |
433 | * category of IPI (Bit 1 IPIs have been replaced by a | |
434 | * different mechanism): | |
435 | * | |
436 | * Bit 0 - Inter-processor function call | |
437 | */ | |
b9811d7f | 438 | asmlinkage void __exception do_IPI(struct pt_regs *regs) |
1da177e4 LT |
439 | { |
440 | unsigned int cpu = smp_processor_id(); | |
441 | struct ipi_data *ipi = &per_cpu(ipi_data, cpu); | |
c97d4869 | 442 | struct pt_regs *old_regs = set_irq_regs(regs); |
1da177e4 LT |
443 | |
444 | ipi->ipi_count++; | |
445 | ||
446 | for (;;) { | |
447 | unsigned long msgs; | |
448 | ||
449 | spin_lock(&ipi->lock); | |
450 | msgs = ipi->bits; | |
451 | ipi->bits = 0; | |
452 | spin_unlock(&ipi->lock); | |
453 | ||
454 | if (!msgs) | |
455 | break; | |
456 | ||
457 | do { | |
458 | unsigned nextmsg; | |
459 | ||
460 | nextmsg = msgs & -msgs; | |
461 | msgs &= ~nextmsg; | |
462 | nextmsg = ffz(~nextmsg); | |
463 | ||
464 | switch (nextmsg) { | |
465 | case IPI_TIMER: | |
c97d4869 | 466 | ipi_timer(); |
1da177e4 LT |
467 | break; |
468 | ||
469 | case IPI_RESCHEDULE: | |
470 | /* | |
471 | * nothing more to do - eveything is | |
472 | * done on the interrupt return path | |
473 | */ | |
474 | break; | |
475 | ||
476 | case IPI_CALL_FUNC: | |
f6dd9fa5 JA |
477 | generic_smp_call_function_interrupt(); |
478 | break; | |
479 | ||
480 | case IPI_CALL_FUNC_SINGLE: | |
481 | generic_smp_call_function_single_interrupt(); | |
1da177e4 LT |
482 | break; |
483 | ||
484 | case IPI_CPU_STOP: | |
485 | ipi_cpu_stop(cpu); | |
486 | break; | |
487 | ||
488 | default: | |
489 | printk(KERN_CRIT "CPU%u: Unknown IPI message 0x%x\n", | |
490 | cpu, nextmsg); | |
491 | break; | |
492 | } | |
493 | } while (msgs); | |
494 | } | |
c97d4869 RK |
495 | |
496 | set_irq_regs(old_regs); | |
1da177e4 LT |
497 | } |
498 | ||
499 | void smp_send_reschedule(int cpu) | |
500 | { | |
82668104 | 501 | send_ipi_message(cpumask_of(cpu), IPI_RESCHEDULE); |
1da177e4 LT |
502 | } |
503 | ||
82668104 | 504 | void smp_timer_broadcast(const struct cpumask *mask) |
3e459990 CM |
505 | { |
506 | send_ipi_message(mask, IPI_TIMER); | |
507 | } | |
508 | ||
1da177e4 LT |
509 | void smp_send_stop(void) |
510 | { | |
511 | cpumask_t mask = cpu_online_map; | |
512 | cpu_clear(smp_processor_id(), mask); | |
82668104 | 513 | send_ipi_message(&mask, IPI_CPU_STOP); |
1da177e4 LT |
514 | } |
515 | ||
516 | /* | |
517 | * not supported here | |
518 | */ | |
5048bcba | 519 | int setup_profiling_timer(unsigned int multiplier) |
1da177e4 LT |
520 | { |
521 | return -EINVAL; | |
522 | } | |
4b0ef3b1 | 523 | |
82668104 RK |
524 | static void |
525 | on_each_cpu_mask(void (*func)(void *), void *info, int wait, | |
526 | const struct cpumask *mask) | |
4b0ef3b1 | 527 | { |
4b0ef3b1 RK |
528 | preempt_disable(); |
529 | ||
82668104 RK |
530 | smp_call_function_many(mask, func, info, wait); |
531 | if (cpumask_test_cpu(smp_processor_id(), mask)) | |
4b0ef3b1 RK |
532 | func(info); |
533 | ||
534 | preempt_enable(); | |
4b0ef3b1 RK |
535 | } |
536 | ||
537 | /**********************************************************************/ | |
538 | ||
539 | /* | |
540 | * TLB operations | |
541 | */ | |
542 | struct tlb_args { | |
543 | struct vm_area_struct *ta_vma; | |
544 | unsigned long ta_start; | |
545 | unsigned long ta_end; | |
546 | }; | |
547 | ||
548 | static inline void ipi_flush_tlb_all(void *ignored) | |
549 | { | |
550 | local_flush_tlb_all(); | |
551 | } | |
552 | ||
553 | static inline void ipi_flush_tlb_mm(void *arg) | |
554 | { | |
555 | struct mm_struct *mm = (struct mm_struct *)arg; | |
556 | ||
557 | local_flush_tlb_mm(mm); | |
558 | } | |
559 | ||
560 | static inline void ipi_flush_tlb_page(void *arg) | |
561 | { | |
562 | struct tlb_args *ta = (struct tlb_args *)arg; | |
563 | ||
564 | local_flush_tlb_page(ta->ta_vma, ta->ta_start); | |
565 | } | |
566 | ||
567 | static inline void ipi_flush_tlb_kernel_page(void *arg) | |
568 | { | |
569 | struct tlb_args *ta = (struct tlb_args *)arg; | |
570 | ||
571 | local_flush_tlb_kernel_page(ta->ta_start); | |
572 | } | |
573 | ||
574 | static inline void ipi_flush_tlb_range(void *arg) | |
575 | { | |
576 | struct tlb_args *ta = (struct tlb_args *)arg; | |
577 | ||
578 | local_flush_tlb_range(ta->ta_vma, ta->ta_start, ta->ta_end); | |
579 | } | |
580 | ||
581 | static inline void ipi_flush_tlb_kernel_range(void *arg) | |
582 | { | |
583 | struct tlb_args *ta = (struct tlb_args *)arg; | |
584 | ||
585 | local_flush_tlb_kernel_range(ta->ta_start, ta->ta_end); | |
586 | } | |
587 | ||
588 | void flush_tlb_all(void) | |
589 | { | |
15c8b6c1 | 590 | on_each_cpu(ipi_flush_tlb_all, NULL, 1); |
4b0ef3b1 RK |
591 | } |
592 | ||
593 | void flush_tlb_mm(struct mm_struct *mm) | |
594 | { | |
82668104 | 595 | on_each_cpu_mask(ipi_flush_tlb_mm, mm, 1, &mm->cpu_vm_mask); |
4b0ef3b1 RK |
596 | } |
597 | ||
598 | void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr) | |
599 | { | |
4b0ef3b1 RK |
600 | struct tlb_args ta; |
601 | ||
602 | ta.ta_vma = vma; | |
603 | ta.ta_start = uaddr; | |
604 | ||
82668104 | 605 | on_each_cpu_mask(ipi_flush_tlb_page, &ta, 1, &vma->vm_mm->cpu_vm_mask); |
4b0ef3b1 RK |
606 | } |
607 | ||
608 | void flush_tlb_kernel_page(unsigned long kaddr) | |
609 | { | |
610 | struct tlb_args ta; | |
611 | ||
612 | ta.ta_start = kaddr; | |
613 | ||
15c8b6c1 | 614 | on_each_cpu(ipi_flush_tlb_kernel_page, &ta, 1); |
4b0ef3b1 RK |
615 | } |
616 | ||
617 | void flush_tlb_range(struct vm_area_struct *vma, | |
618 | unsigned long start, unsigned long end) | |
619 | { | |
4b0ef3b1 RK |
620 | struct tlb_args ta; |
621 | ||
622 | ta.ta_vma = vma; | |
623 | ta.ta_start = start; | |
624 | ta.ta_end = end; | |
625 | ||
82668104 | 626 | on_each_cpu_mask(ipi_flush_tlb_range, &ta, 1, &vma->vm_mm->cpu_vm_mask); |
4b0ef3b1 RK |
627 | } |
628 | ||
629 | void flush_tlb_kernel_range(unsigned long start, unsigned long end) | |
630 | { | |
631 | struct tlb_args ta; | |
632 | ||
633 | ta.ta_start = start; | |
634 | ta.ta_end = end; | |
635 | ||
15c8b6c1 | 636 | on_each_cpu(ipi_flush_tlb_kernel_range, &ta, 1); |
4b0ef3b1 | 637 | } |