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749cf76c CD |
1 | /* |
2 | * Copyright (C) 2012 - Virtual Open Systems and Columbia University | |
3 | * Author: Christoffer Dall <c.dall@virtualopensystems.com> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License, version 2, as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | |
17 | */ | |
342cd0ab CD |
18 | |
19 | #include <linux/mman.h> | |
20 | #include <linux/kvm_host.h> | |
21 | #include <linux/io.h> | |
ad361f09 | 22 | #include <linux/hugetlb.h> |
45e96ea6 | 23 | #include <trace/events/kvm.h> |
342cd0ab | 24 | #include <asm/pgalloc.h> |
94f8e641 | 25 | #include <asm/cacheflush.h> |
342cd0ab CD |
26 | #include <asm/kvm_arm.h> |
27 | #include <asm/kvm_mmu.h> | |
45e96ea6 | 28 | #include <asm/kvm_mmio.h> |
d5d8184d | 29 | #include <asm/kvm_asm.h> |
94f8e641 | 30 | #include <asm/kvm_emulate.h> |
1e947bad | 31 | #include <asm/virt.h> |
d5d8184d CD |
32 | |
33 | #include "trace.h" | |
342cd0ab | 34 | |
5a677ce0 | 35 | static pgd_t *boot_hyp_pgd; |
2fb41059 | 36 | static pgd_t *hyp_pgd; |
e4c5a685 | 37 | static pgd_t *merged_hyp_pgd; |
342cd0ab CD |
38 | static DEFINE_MUTEX(kvm_hyp_pgd_mutex); |
39 | ||
5a677ce0 MZ |
40 | static unsigned long hyp_idmap_start; |
41 | static unsigned long hyp_idmap_end; | |
42 | static phys_addr_t hyp_idmap_vector; | |
43 | ||
9163ee23 | 44 | #define S2_PGD_SIZE (PTRS_PER_S2_PGD * sizeof(pgd_t)) |
38f791a4 | 45 | #define hyp_pgd_order get_order(PTRS_PER_PGD * sizeof(pgd_t)) |
5d4e08c4 | 46 | |
15a49a44 MS |
47 | #define KVM_S2PTE_FLAG_IS_IOMAP (1UL << 0) |
48 | #define KVM_S2_FLAG_LOGGING_ACTIVE (1UL << 1) | |
49 | ||
50 | static bool memslot_is_logging(struct kvm_memory_slot *memslot) | |
51 | { | |
15a49a44 | 52 | return memslot->dirty_bitmap && !(memslot->flags & KVM_MEM_READONLY); |
7276030a MS |
53 | } |
54 | ||
55 | /** | |
56 | * kvm_flush_remote_tlbs() - flush all VM TLB entries for v7/8 | |
57 | * @kvm: pointer to kvm structure. | |
58 | * | |
59 | * Interface to HYP function to flush all VM TLB entries | |
60 | */ | |
61 | void kvm_flush_remote_tlbs(struct kvm *kvm) | |
62 | { | |
63 | kvm_call_hyp(__kvm_tlb_flush_vmid, kvm); | |
15a49a44 | 64 | } |
ad361f09 | 65 | |
48762767 | 66 | static void kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) |
d5d8184d | 67 | { |
8684e701 | 68 | kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, kvm, ipa); |
d5d8184d CD |
69 | } |
70 | ||
363ef89f MZ |
71 | /* |
72 | * D-Cache management functions. They take the page table entries by | |
73 | * value, as they are flushing the cache using the kernel mapping (or | |
74 | * kmap on 32bit). | |
75 | */ | |
76 | static void kvm_flush_dcache_pte(pte_t pte) | |
77 | { | |
78 | __kvm_flush_dcache_pte(pte); | |
79 | } | |
80 | ||
81 | static void kvm_flush_dcache_pmd(pmd_t pmd) | |
82 | { | |
83 | __kvm_flush_dcache_pmd(pmd); | |
84 | } | |
85 | ||
86 | static void kvm_flush_dcache_pud(pud_t pud) | |
87 | { | |
88 | __kvm_flush_dcache_pud(pud); | |
89 | } | |
90 | ||
e6fab544 AB |
91 | static bool kvm_is_device_pfn(unsigned long pfn) |
92 | { | |
93 | return !pfn_valid(pfn); | |
94 | } | |
95 | ||
15a49a44 MS |
96 | /** |
97 | * stage2_dissolve_pmd() - clear and flush huge PMD entry | |
98 | * @kvm: pointer to kvm structure. | |
99 | * @addr: IPA | |
100 | * @pmd: pmd pointer for IPA | |
101 | * | |
102 | * Function clears a PMD entry, flushes addr 1st and 2nd stage TLBs. Marks all | |
103 | * pages in the range dirty. | |
104 | */ | |
105 | static void stage2_dissolve_pmd(struct kvm *kvm, phys_addr_t addr, pmd_t *pmd) | |
106 | { | |
bbb3b6b3 | 107 | if (!pmd_thp_or_huge(*pmd)) |
15a49a44 MS |
108 | return; |
109 | ||
110 | pmd_clear(pmd); | |
111 | kvm_tlb_flush_vmid_ipa(kvm, addr); | |
112 | put_page(virt_to_page(pmd)); | |
113 | } | |
114 | ||
d5d8184d CD |
115 | static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache, |
116 | int min, int max) | |
117 | { | |
118 | void *page; | |
119 | ||
120 | BUG_ON(max > KVM_NR_MEM_OBJS); | |
121 | if (cache->nobjs >= min) | |
122 | return 0; | |
123 | while (cache->nobjs < max) { | |
124 | page = (void *)__get_free_page(PGALLOC_GFP); | |
125 | if (!page) | |
126 | return -ENOMEM; | |
127 | cache->objects[cache->nobjs++] = page; | |
128 | } | |
129 | return 0; | |
130 | } | |
131 | ||
132 | static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc) | |
133 | { | |
134 | while (mc->nobjs) | |
135 | free_page((unsigned long)mc->objects[--mc->nobjs]); | |
136 | } | |
137 | ||
138 | static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc) | |
139 | { | |
140 | void *p; | |
141 | ||
142 | BUG_ON(!mc || !mc->nobjs); | |
143 | p = mc->objects[--mc->nobjs]; | |
144 | return p; | |
145 | } | |
146 | ||
7a1c831e | 147 | static void clear_stage2_pgd_entry(struct kvm *kvm, pgd_t *pgd, phys_addr_t addr) |
979acd5e | 148 | { |
7a1c831e SP |
149 | pud_t *pud_table __maybe_unused = stage2_pud_offset(pgd, 0UL); |
150 | stage2_pgd_clear(pgd); | |
4f853a71 | 151 | kvm_tlb_flush_vmid_ipa(kvm, addr); |
7a1c831e | 152 | stage2_pud_free(pud_table); |
4f853a71 | 153 | put_page(virt_to_page(pgd)); |
979acd5e MZ |
154 | } |
155 | ||
7a1c831e | 156 | static void clear_stage2_pud_entry(struct kvm *kvm, pud_t *pud, phys_addr_t addr) |
342cd0ab | 157 | { |
7a1c831e SP |
158 | pmd_t *pmd_table __maybe_unused = stage2_pmd_offset(pud, 0); |
159 | VM_BUG_ON(stage2_pud_huge(*pud)); | |
160 | stage2_pud_clear(pud); | |
4f853a71 | 161 | kvm_tlb_flush_vmid_ipa(kvm, addr); |
7a1c831e | 162 | stage2_pmd_free(pmd_table); |
4f728276 MZ |
163 | put_page(virt_to_page(pud)); |
164 | } | |
342cd0ab | 165 | |
7a1c831e | 166 | static void clear_stage2_pmd_entry(struct kvm *kvm, pmd_t *pmd, phys_addr_t addr) |
4f728276 | 167 | { |
4f853a71 | 168 | pte_t *pte_table = pte_offset_kernel(pmd, 0); |
bbb3b6b3 | 169 | VM_BUG_ON(pmd_thp_or_huge(*pmd)); |
4f853a71 CD |
170 | pmd_clear(pmd); |
171 | kvm_tlb_flush_vmid_ipa(kvm, addr); | |
172 | pte_free_kernel(NULL, pte_table); | |
4f728276 MZ |
173 | put_page(virt_to_page(pmd)); |
174 | } | |
175 | ||
363ef89f MZ |
176 | /* |
177 | * Unmapping vs dcache management: | |
178 | * | |
179 | * If a guest maps certain memory pages as uncached, all writes will | |
180 | * bypass the data cache and go directly to RAM. However, the CPUs | |
181 | * can still speculate reads (not writes) and fill cache lines with | |
182 | * data. | |
183 | * | |
184 | * Those cache lines will be *clean* cache lines though, so a | |
185 | * clean+invalidate operation is equivalent to an invalidate | |
186 | * operation, because no cache lines are marked dirty. | |
187 | * | |
188 | * Those clean cache lines could be filled prior to an uncached write | |
189 | * by the guest, and the cache coherent IO subsystem would therefore | |
190 | * end up writing old data to disk. | |
191 | * | |
192 | * This is why right after unmapping a page/section and invalidating | |
193 | * the corresponding TLBs, we call kvm_flush_dcache_p*() to make sure | |
194 | * the IO subsystem will never hit in the cache. | |
195 | */ | |
7a1c831e | 196 | static void unmap_stage2_ptes(struct kvm *kvm, pmd_t *pmd, |
4f853a71 | 197 | phys_addr_t addr, phys_addr_t end) |
4f728276 | 198 | { |
4f853a71 CD |
199 | phys_addr_t start_addr = addr; |
200 | pte_t *pte, *start_pte; | |
201 | ||
202 | start_pte = pte = pte_offset_kernel(pmd, addr); | |
203 | do { | |
204 | if (!pte_none(*pte)) { | |
363ef89f MZ |
205 | pte_t old_pte = *pte; |
206 | ||
4f853a71 | 207 | kvm_set_pte(pte, __pte(0)); |
4f853a71 | 208 | kvm_tlb_flush_vmid_ipa(kvm, addr); |
363ef89f MZ |
209 | |
210 | /* No need to invalidate the cache for device mappings */ | |
0de58f85 | 211 | if (!kvm_is_device_pfn(pte_pfn(old_pte))) |
363ef89f MZ |
212 | kvm_flush_dcache_pte(old_pte); |
213 | ||
214 | put_page(virt_to_page(pte)); | |
4f853a71 CD |
215 | } |
216 | } while (pte++, addr += PAGE_SIZE, addr != end); | |
217 | ||
7a1c831e SP |
218 | if (stage2_pte_table_empty(start_pte)) |
219 | clear_stage2_pmd_entry(kvm, pmd, start_addr); | |
342cd0ab CD |
220 | } |
221 | ||
7a1c831e | 222 | static void unmap_stage2_pmds(struct kvm *kvm, pud_t *pud, |
4f853a71 | 223 | phys_addr_t addr, phys_addr_t end) |
000d3996 | 224 | { |
4f853a71 CD |
225 | phys_addr_t next, start_addr = addr; |
226 | pmd_t *pmd, *start_pmd; | |
000d3996 | 227 | |
7a1c831e | 228 | start_pmd = pmd = stage2_pmd_offset(pud, addr); |
4f853a71 | 229 | do { |
7a1c831e | 230 | next = stage2_pmd_addr_end(addr, end); |
4f853a71 | 231 | if (!pmd_none(*pmd)) { |
bbb3b6b3 | 232 | if (pmd_thp_or_huge(*pmd)) { |
363ef89f MZ |
233 | pmd_t old_pmd = *pmd; |
234 | ||
4f853a71 CD |
235 | pmd_clear(pmd); |
236 | kvm_tlb_flush_vmid_ipa(kvm, addr); | |
363ef89f MZ |
237 | |
238 | kvm_flush_dcache_pmd(old_pmd); | |
239 | ||
4f853a71 CD |
240 | put_page(virt_to_page(pmd)); |
241 | } else { | |
7a1c831e | 242 | unmap_stage2_ptes(kvm, pmd, addr, next); |
4f853a71 | 243 | } |
ad361f09 | 244 | } |
4f853a71 | 245 | } while (pmd++, addr = next, addr != end); |
ad361f09 | 246 | |
7a1c831e SP |
247 | if (stage2_pmd_table_empty(start_pmd)) |
248 | clear_stage2_pud_entry(kvm, pud, start_addr); | |
4f853a71 | 249 | } |
000d3996 | 250 | |
7a1c831e | 251 | static void unmap_stage2_puds(struct kvm *kvm, pgd_t *pgd, |
4f853a71 CD |
252 | phys_addr_t addr, phys_addr_t end) |
253 | { | |
254 | phys_addr_t next, start_addr = addr; | |
255 | pud_t *pud, *start_pud; | |
4f728276 | 256 | |
7a1c831e | 257 | start_pud = pud = stage2_pud_offset(pgd, addr); |
4f853a71 | 258 | do { |
7a1c831e SP |
259 | next = stage2_pud_addr_end(addr, end); |
260 | if (!stage2_pud_none(*pud)) { | |
261 | if (stage2_pud_huge(*pud)) { | |
363ef89f MZ |
262 | pud_t old_pud = *pud; |
263 | ||
7a1c831e | 264 | stage2_pud_clear(pud); |
4f853a71 | 265 | kvm_tlb_flush_vmid_ipa(kvm, addr); |
363ef89f | 266 | kvm_flush_dcache_pud(old_pud); |
4f853a71 CD |
267 | put_page(virt_to_page(pud)); |
268 | } else { | |
7a1c831e | 269 | unmap_stage2_pmds(kvm, pud, addr, next); |
4f728276 MZ |
270 | } |
271 | } | |
4f853a71 | 272 | } while (pud++, addr = next, addr != end); |
4f728276 | 273 | |
7a1c831e SP |
274 | if (stage2_pud_table_empty(start_pud)) |
275 | clear_stage2_pgd_entry(kvm, pgd, start_addr); | |
4f853a71 CD |
276 | } |
277 | ||
7a1c831e SP |
278 | /** |
279 | * unmap_stage2_range -- Clear stage2 page table entries to unmap a range | |
280 | * @kvm: The VM pointer | |
281 | * @start: The intermediate physical base address of the range to unmap | |
282 | * @size: The size of the area to unmap | |
283 | * | |
284 | * Clear a range of stage-2 mappings, lowering the various ref-counts. Must | |
285 | * be called while holding mmu_lock (unless for freeing the stage2 pgd before | |
286 | * destroying the VM), otherwise another faulting VCPU may come in and mess | |
287 | * with things behind our backs. | |
288 | */ | |
289 | static void unmap_stage2_range(struct kvm *kvm, phys_addr_t start, u64 size) | |
4f853a71 CD |
290 | { |
291 | pgd_t *pgd; | |
292 | phys_addr_t addr = start, end = start + size; | |
293 | phys_addr_t next; | |
294 | ||
7a1c831e | 295 | pgd = kvm->arch.pgd + stage2_pgd_index(addr); |
4f853a71 | 296 | do { |
7a1c831e SP |
297 | next = stage2_pgd_addr_end(addr, end); |
298 | if (!stage2_pgd_none(*pgd)) | |
299 | unmap_stage2_puds(kvm, pgd, addr, next); | |
4f853a71 | 300 | } while (pgd++, addr = next, addr != end); |
000d3996 MZ |
301 | } |
302 | ||
9d218a1f MZ |
303 | static void stage2_flush_ptes(struct kvm *kvm, pmd_t *pmd, |
304 | phys_addr_t addr, phys_addr_t end) | |
305 | { | |
306 | pte_t *pte; | |
307 | ||
308 | pte = pte_offset_kernel(pmd, addr); | |
309 | do { | |
0de58f85 | 310 | if (!pte_none(*pte) && !kvm_is_device_pfn(pte_pfn(*pte))) |
363ef89f | 311 | kvm_flush_dcache_pte(*pte); |
9d218a1f MZ |
312 | } while (pte++, addr += PAGE_SIZE, addr != end); |
313 | } | |
314 | ||
315 | static void stage2_flush_pmds(struct kvm *kvm, pud_t *pud, | |
316 | phys_addr_t addr, phys_addr_t end) | |
317 | { | |
318 | pmd_t *pmd; | |
319 | phys_addr_t next; | |
320 | ||
70fd1906 | 321 | pmd = stage2_pmd_offset(pud, addr); |
9d218a1f | 322 | do { |
70fd1906 | 323 | next = stage2_pmd_addr_end(addr, end); |
9d218a1f | 324 | if (!pmd_none(*pmd)) { |
bbb3b6b3 | 325 | if (pmd_thp_or_huge(*pmd)) |
363ef89f MZ |
326 | kvm_flush_dcache_pmd(*pmd); |
327 | else | |
9d218a1f | 328 | stage2_flush_ptes(kvm, pmd, addr, next); |
9d218a1f MZ |
329 | } |
330 | } while (pmd++, addr = next, addr != end); | |
331 | } | |
332 | ||
333 | static void stage2_flush_puds(struct kvm *kvm, pgd_t *pgd, | |
334 | phys_addr_t addr, phys_addr_t end) | |
335 | { | |
336 | pud_t *pud; | |
337 | phys_addr_t next; | |
338 | ||
70fd1906 | 339 | pud = stage2_pud_offset(pgd, addr); |
9d218a1f | 340 | do { |
70fd1906 SP |
341 | next = stage2_pud_addr_end(addr, end); |
342 | if (!stage2_pud_none(*pud)) { | |
343 | if (stage2_pud_huge(*pud)) | |
363ef89f MZ |
344 | kvm_flush_dcache_pud(*pud); |
345 | else | |
9d218a1f | 346 | stage2_flush_pmds(kvm, pud, addr, next); |
9d218a1f MZ |
347 | } |
348 | } while (pud++, addr = next, addr != end); | |
349 | } | |
350 | ||
351 | static void stage2_flush_memslot(struct kvm *kvm, | |
352 | struct kvm_memory_slot *memslot) | |
353 | { | |
354 | phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT; | |
355 | phys_addr_t end = addr + PAGE_SIZE * memslot->npages; | |
356 | phys_addr_t next; | |
357 | pgd_t *pgd; | |
358 | ||
70fd1906 | 359 | pgd = kvm->arch.pgd + stage2_pgd_index(addr); |
9d218a1f | 360 | do { |
70fd1906 | 361 | next = stage2_pgd_addr_end(addr, end); |
9d218a1f MZ |
362 | stage2_flush_puds(kvm, pgd, addr, next); |
363 | } while (pgd++, addr = next, addr != end); | |
364 | } | |
365 | ||
366 | /** | |
367 | * stage2_flush_vm - Invalidate cache for pages mapped in stage 2 | |
368 | * @kvm: The struct kvm pointer | |
369 | * | |
370 | * Go through the stage 2 page tables and invalidate any cache lines | |
371 | * backing memory already mapped to the VM. | |
372 | */ | |
3c1e7165 | 373 | static void stage2_flush_vm(struct kvm *kvm) |
9d218a1f MZ |
374 | { |
375 | struct kvm_memslots *slots; | |
376 | struct kvm_memory_slot *memslot; | |
377 | int idx; | |
378 | ||
379 | idx = srcu_read_lock(&kvm->srcu); | |
380 | spin_lock(&kvm->mmu_lock); | |
381 | ||
382 | slots = kvm_memslots(kvm); | |
383 | kvm_for_each_memslot(memslot, slots) | |
384 | stage2_flush_memslot(kvm, memslot); | |
385 | ||
386 | spin_unlock(&kvm->mmu_lock); | |
387 | srcu_read_unlock(&kvm->srcu, idx); | |
388 | } | |
389 | ||
64f32497 SP |
390 | static void clear_hyp_pgd_entry(pgd_t *pgd) |
391 | { | |
392 | pud_t *pud_table __maybe_unused = pud_offset(pgd, 0UL); | |
393 | pgd_clear(pgd); | |
394 | pud_free(NULL, pud_table); | |
395 | put_page(virt_to_page(pgd)); | |
396 | } | |
397 | ||
398 | static void clear_hyp_pud_entry(pud_t *pud) | |
399 | { | |
400 | pmd_t *pmd_table __maybe_unused = pmd_offset(pud, 0); | |
401 | VM_BUG_ON(pud_huge(*pud)); | |
402 | pud_clear(pud); | |
403 | pmd_free(NULL, pmd_table); | |
404 | put_page(virt_to_page(pud)); | |
405 | } | |
406 | ||
407 | static void clear_hyp_pmd_entry(pmd_t *pmd) | |
408 | { | |
409 | pte_t *pte_table = pte_offset_kernel(pmd, 0); | |
410 | VM_BUG_ON(pmd_thp_or_huge(*pmd)); | |
411 | pmd_clear(pmd); | |
412 | pte_free_kernel(NULL, pte_table); | |
413 | put_page(virt_to_page(pmd)); | |
414 | } | |
415 | ||
416 | static void unmap_hyp_ptes(pmd_t *pmd, phys_addr_t addr, phys_addr_t end) | |
417 | { | |
418 | pte_t *pte, *start_pte; | |
419 | ||
420 | start_pte = pte = pte_offset_kernel(pmd, addr); | |
421 | do { | |
422 | if (!pte_none(*pte)) { | |
423 | kvm_set_pte(pte, __pte(0)); | |
424 | put_page(virt_to_page(pte)); | |
425 | } | |
426 | } while (pte++, addr += PAGE_SIZE, addr != end); | |
427 | ||
428 | if (hyp_pte_table_empty(start_pte)) | |
429 | clear_hyp_pmd_entry(pmd); | |
430 | } | |
431 | ||
432 | static void unmap_hyp_pmds(pud_t *pud, phys_addr_t addr, phys_addr_t end) | |
433 | { | |
434 | phys_addr_t next; | |
435 | pmd_t *pmd, *start_pmd; | |
436 | ||
437 | start_pmd = pmd = pmd_offset(pud, addr); | |
438 | do { | |
439 | next = pmd_addr_end(addr, end); | |
440 | /* Hyp doesn't use huge pmds */ | |
441 | if (!pmd_none(*pmd)) | |
442 | unmap_hyp_ptes(pmd, addr, next); | |
443 | } while (pmd++, addr = next, addr != end); | |
444 | ||
445 | if (hyp_pmd_table_empty(start_pmd)) | |
446 | clear_hyp_pud_entry(pud); | |
447 | } | |
448 | ||
449 | static void unmap_hyp_puds(pgd_t *pgd, phys_addr_t addr, phys_addr_t end) | |
450 | { | |
451 | phys_addr_t next; | |
452 | pud_t *pud, *start_pud; | |
453 | ||
454 | start_pud = pud = pud_offset(pgd, addr); | |
455 | do { | |
456 | next = pud_addr_end(addr, end); | |
457 | /* Hyp doesn't use huge puds */ | |
458 | if (!pud_none(*pud)) | |
459 | unmap_hyp_pmds(pud, addr, next); | |
460 | } while (pud++, addr = next, addr != end); | |
461 | ||
462 | if (hyp_pud_table_empty(start_pud)) | |
463 | clear_hyp_pgd_entry(pgd); | |
464 | } | |
465 | ||
466 | static void unmap_hyp_range(pgd_t *pgdp, phys_addr_t start, u64 size) | |
467 | { | |
468 | pgd_t *pgd; | |
469 | phys_addr_t addr = start, end = start + size; | |
470 | phys_addr_t next; | |
471 | ||
472 | /* | |
473 | * We don't unmap anything from HYP, except at the hyp tear down. | |
474 | * Hence, we don't have to invalidate the TLBs here. | |
475 | */ | |
476 | pgd = pgdp + pgd_index(addr); | |
477 | do { | |
478 | next = pgd_addr_end(addr, end); | |
479 | if (!pgd_none(*pgd)) | |
480 | unmap_hyp_puds(pgd, addr, next); | |
481 | } while (pgd++, addr = next, addr != end); | |
482 | } | |
483 | ||
342cd0ab | 484 | /** |
4f728276 | 485 | * free_hyp_pgds - free Hyp-mode page tables |
342cd0ab | 486 | * |
5a677ce0 MZ |
487 | * Assumes hyp_pgd is a page table used strictly in Hyp-mode and |
488 | * therefore contains either mappings in the kernel memory area (above | |
489 | * PAGE_OFFSET), or device mappings in the vmalloc range (from | |
490 | * VMALLOC_START to VMALLOC_END). | |
491 | * | |
492 | * boot_hyp_pgd should only map two pages for the init code. | |
342cd0ab | 493 | */ |
4f728276 | 494 | void free_hyp_pgds(void) |
342cd0ab | 495 | { |
342cd0ab CD |
496 | unsigned long addr; |
497 | ||
d157f4a5 | 498 | mutex_lock(&kvm_hyp_pgd_mutex); |
5a677ce0 | 499 | |
26781f9c MZ |
500 | if (boot_hyp_pgd) { |
501 | unmap_hyp_range(boot_hyp_pgd, hyp_idmap_start, PAGE_SIZE); | |
502 | free_pages((unsigned long)boot_hyp_pgd, hyp_pgd_order); | |
503 | boot_hyp_pgd = NULL; | |
504 | } | |
505 | ||
4f728276 | 506 | if (hyp_pgd) { |
26781f9c | 507 | unmap_hyp_range(hyp_pgd, hyp_idmap_start, PAGE_SIZE); |
4f728276 | 508 | for (addr = PAGE_OFFSET; virt_addr_valid(addr); addr += PGDIR_SIZE) |
6c41a413 | 509 | unmap_hyp_range(hyp_pgd, kern_hyp_va(addr), PGDIR_SIZE); |
4f728276 | 510 | for (addr = VMALLOC_START; is_vmalloc_addr((void*)addr); addr += PGDIR_SIZE) |
6c41a413 | 511 | unmap_hyp_range(hyp_pgd, kern_hyp_va(addr), PGDIR_SIZE); |
d4cb9df5 | 512 | |
38f791a4 | 513 | free_pages((unsigned long)hyp_pgd, hyp_pgd_order); |
d157f4a5 | 514 | hyp_pgd = NULL; |
4f728276 | 515 | } |
e4c5a685 AB |
516 | if (merged_hyp_pgd) { |
517 | clear_page(merged_hyp_pgd); | |
518 | free_page((unsigned long)merged_hyp_pgd); | |
519 | merged_hyp_pgd = NULL; | |
520 | } | |
4f728276 | 521 | |
342cd0ab CD |
522 | mutex_unlock(&kvm_hyp_pgd_mutex); |
523 | } | |
524 | ||
525 | static void create_hyp_pte_mappings(pmd_t *pmd, unsigned long start, | |
6060df84 MZ |
526 | unsigned long end, unsigned long pfn, |
527 | pgprot_t prot) | |
342cd0ab CD |
528 | { |
529 | pte_t *pte; | |
530 | unsigned long addr; | |
342cd0ab | 531 | |
3562c76d MZ |
532 | addr = start; |
533 | do { | |
6060df84 MZ |
534 | pte = pte_offset_kernel(pmd, addr); |
535 | kvm_set_pte(pte, pfn_pte(pfn, prot)); | |
4f728276 | 536 | get_page(virt_to_page(pte)); |
5a677ce0 | 537 | kvm_flush_dcache_to_poc(pte, sizeof(*pte)); |
6060df84 | 538 | pfn++; |
3562c76d | 539 | } while (addr += PAGE_SIZE, addr != end); |
342cd0ab CD |
540 | } |
541 | ||
542 | static int create_hyp_pmd_mappings(pud_t *pud, unsigned long start, | |
6060df84 MZ |
543 | unsigned long end, unsigned long pfn, |
544 | pgprot_t prot) | |
342cd0ab CD |
545 | { |
546 | pmd_t *pmd; | |
547 | pte_t *pte; | |
548 | unsigned long addr, next; | |
549 | ||
3562c76d MZ |
550 | addr = start; |
551 | do { | |
6060df84 | 552 | pmd = pmd_offset(pud, addr); |
342cd0ab CD |
553 | |
554 | BUG_ON(pmd_sect(*pmd)); | |
555 | ||
556 | if (pmd_none(*pmd)) { | |
6060df84 | 557 | pte = pte_alloc_one_kernel(NULL, addr); |
342cd0ab CD |
558 | if (!pte) { |
559 | kvm_err("Cannot allocate Hyp pte\n"); | |
560 | return -ENOMEM; | |
561 | } | |
562 | pmd_populate_kernel(NULL, pmd, pte); | |
4f728276 | 563 | get_page(virt_to_page(pmd)); |
5a677ce0 | 564 | kvm_flush_dcache_to_poc(pmd, sizeof(*pmd)); |
342cd0ab CD |
565 | } |
566 | ||
567 | next = pmd_addr_end(addr, end); | |
568 | ||
6060df84 MZ |
569 | create_hyp_pte_mappings(pmd, addr, next, pfn, prot); |
570 | pfn += (next - addr) >> PAGE_SHIFT; | |
3562c76d | 571 | } while (addr = next, addr != end); |
342cd0ab CD |
572 | |
573 | return 0; | |
574 | } | |
575 | ||
38f791a4 CD |
576 | static int create_hyp_pud_mappings(pgd_t *pgd, unsigned long start, |
577 | unsigned long end, unsigned long pfn, | |
578 | pgprot_t prot) | |
579 | { | |
580 | pud_t *pud; | |
581 | pmd_t *pmd; | |
582 | unsigned long addr, next; | |
583 | int ret; | |
584 | ||
585 | addr = start; | |
586 | do { | |
587 | pud = pud_offset(pgd, addr); | |
588 | ||
589 | if (pud_none_or_clear_bad(pud)) { | |
590 | pmd = pmd_alloc_one(NULL, addr); | |
591 | if (!pmd) { | |
592 | kvm_err("Cannot allocate Hyp pmd\n"); | |
593 | return -ENOMEM; | |
594 | } | |
595 | pud_populate(NULL, pud, pmd); | |
596 | get_page(virt_to_page(pud)); | |
597 | kvm_flush_dcache_to_poc(pud, sizeof(*pud)); | |
598 | } | |
599 | ||
600 | next = pud_addr_end(addr, end); | |
601 | ret = create_hyp_pmd_mappings(pud, addr, next, pfn, prot); | |
602 | if (ret) | |
603 | return ret; | |
604 | pfn += (next - addr) >> PAGE_SHIFT; | |
605 | } while (addr = next, addr != end); | |
606 | ||
607 | return 0; | |
608 | } | |
609 | ||
6060df84 MZ |
610 | static int __create_hyp_mappings(pgd_t *pgdp, |
611 | unsigned long start, unsigned long end, | |
612 | unsigned long pfn, pgprot_t prot) | |
342cd0ab | 613 | { |
342cd0ab CD |
614 | pgd_t *pgd; |
615 | pud_t *pud; | |
342cd0ab CD |
616 | unsigned long addr, next; |
617 | int err = 0; | |
618 | ||
342cd0ab | 619 | mutex_lock(&kvm_hyp_pgd_mutex); |
3562c76d MZ |
620 | addr = start & PAGE_MASK; |
621 | end = PAGE_ALIGN(end); | |
622 | do { | |
6060df84 | 623 | pgd = pgdp + pgd_index(addr); |
342cd0ab | 624 | |
38f791a4 CD |
625 | if (pgd_none(*pgd)) { |
626 | pud = pud_alloc_one(NULL, addr); | |
627 | if (!pud) { | |
628 | kvm_err("Cannot allocate Hyp pud\n"); | |
342cd0ab CD |
629 | err = -ENOMEM; |
630 | goto out; | |
631 | } | |
38f791a4 CD |
632 | pgd_populate(NULL, pgd, pud); |
633 | get_page(virt_to_page(pgd)); | |
634 | kvm_flush_dcache_to_poc(pgd, sizeof(*pgd)); | |
342cd0ab CD |
635 | } |
636 | ||
637 | next = pgd_addr_end(addr, end); | |
38f791a4 | 638 | err = create_hyp_pud_mappings(pgd, addr, next, pfn, prot); |
342cd0ab CD |
639 | if (err) |
640 | goto out; | |
6060df84 | 641 | pfn += (next - addr) >> PAGE_SHIFT; |
3562c76d | 642 | } while (addr = next, addr != end); |
342cd0ab CD |
643 | out: |
644 | mutex_unlock(&kvm_hyp_pgd_mutex); | |
645 | return err; | |
646 | } | |
647 | ||
40c2729b CD |
648 | static phys_addr_t kvm_kaddr_to_phys(void *kaddr) |
649 | { | |
650 | if (!is_vmalloc_addr(kaddr)) { | |
651 | BUG_ON(!virt_addr_valid(kaddr)); | |
652 | return __pa(kaddr); | |
653 | } else { | |
654 | return page_to_phys(vmalloc_to_page(kaddr)) + | |
655 | offset_in_page(kaddr); | |
656 | } | |
657 | } | |
658 | ||
342cd0ab | 659 | /** |
06e8c3b0 | 660 | * create_hyp_mappings - duplicate a kernel virtual address range in Hyp mode |
342cd0ab CD |
661 | * @from: The virtual kernel start address of the range |
662 | * @to: The virtual kernel end address of the range (exclusive) | |
c8dddecd | 663 | * @prot: The protection to be applied to this range |
342cd0ab | 664 | * |
06e8c3b0 MZ |
665 | * The same virtual address as the kernel virtual address is also used |
666 | * in Hyp-mode mapping (modulo HYP_PAGE_OFFSET) to the same underlying | |
667 | * physical pages. | |
342cd0ab | 668 | */ |
c8dddecd | 669 | int create_hyp_mappings(void *from, void *to, pgprot_t prot) |
342cd0ab | 670 | { |
40c2729b CD |
671 | phys_addr_t phys_addr; |
672 | unsigned long virt_addr; | |
6c41a413 MZ |
673 | unsigned long start = kern_hyp_va((unsigned long)from); |
674 | unsigned long end = kern_hyp_va((unsigned long)to); | |
6060df84 | 675 | |
1e947bad MZ |
676 | if (is_kernel_in_hyp_mode()) |
677 | return 0; | |
678 | ||
40c2729b CD |
679 | start = start & PAGE_MASK; |
680 | end = PAGE_ALIGN(end); | |
6060df84 | 681 | |
40c2729b CD |
682 | for (virt_addr = start; virt_addr < end; virt_addr += PAGE_SIZE) { |
683 | int err; | |
6060df84 | 684 | |
40c2729b CD |
685 | phys_addr = kvm_kaddr_to_phys(from + virt_addr - start); |
686 | err = __create_hyp_mappings(hyp_pgd, virt_addr, | |
687 | virt_addr + PAGE_SIZE, | |
688 | __phys_to_pfn(phys_addr), | |
c8dddecd | 689 | prot); |
40c2729b CD |
690 | if (err) |
691 | return err; | |
692 | } | |
693 | ||
694 | return 0; | |
342cd0ab CD |
695 | } |
696 | ||
697 | /** | |
06e8c3b0 MZ |
698 | * create_hyp_io_mappings - duplicate a kernel IO mapping into Hyp mode |
699 | * @from: The kernel start VA of the range | |
700 | * @to: The kernel end VA of the range (exclusive) | |
6060df84 | 701 | * @phys_addr: The physical start address which gets mapped |
06e8c3b0 MZ |
702 | * |
703 | * The resulting HYP VA is the same as the kernel VA, modulo | |
704 | * HYP_PAGE_OFFSET. | |
342cd0ab | 705 | */ |
6060df84 | 706 | int create_hyp_io_mappings(void *from, void *to, phys_addr_t phys_addr) |
342cd0ab | 707 | { |
6c41a413 MZ |
708 | unsigned long start = kern_hyp_va((unsigned long)from); |
709 | unsigned long end = kern_hyp_va((unsigned long)to); | |
6060df84 | 710 | |
1e947bad MZ |
711 | if (is_kernel_in_hyp_mode()) |
712 | return 0; | |
713 | ||
6060df84 MZ |
714 | /* Check for a valid kernel IO mapping */ |
715 | if (!is_vmalloc_addr(from) || !is_vmalloc_addr(to - 1)) | |
716 | return -EINVAL; | |
717 | ||
718 | return __create_hyp_mappings(hyp_pgd, start, end, | |
719 | __phys_to_pfn(phys_addr), PAGE_HYP_DEVICE); | |
342cd0ab CD |
720 | } |
721 | ||
d5d8184d CD |
722 | /** |
723 | * kvm_alloc_stage2_pgd - allocate level-1 table for stage-2 translation. | |
724 | * @kvm: The KVM struct pointer for the VM. | |
725 | * | |
9d4dc688 VM |
726 | * Allocates only the stage-2 HW PGD level table(s) (can support either full |
727 | * 40-bit input addresses or limited to 32-bit input addresses). Clears the | |
728 | * allocated pages. | |
d5d8184d CD |
729 | * |
730 | * Note we don't need locking here as this is only called when the VM is | |
731 | * created, which can only be done once. | |
732 | */ | |
733 | int kvm_alloc_stage2_pgd(struct kvm *kvm) | |
734 | { | |
735 | pgd_t *pgd; | |
736 | ||
737 | if (kvm->arch.pgd != NULL) { | |
738 | kvm_err("kvm_arch already initialized?\n"); | |
739 | return -EINVAL; | |
740 | } | |
741 | ||
9163ee23 SP |
742 | /* Allocate the HW PGD, making sure that each page gets its own refcount */ |
743 | pgd = alloc_pages_exact(S2_PGD_SIZE, GFP_KERNEL | __GFP_ZERO); | |
744 | if (!pgd) | |
a987370f MZ |
745 | return -ENOMEM; |
746 | ||
c62ee2b2 | 747 | kvm_clean_pgd(pgd); |
d5d8184d | 748 | kvm->arch.pgd = pgd; |
d5d8184d CD |
749 | return 0; |
750 | } | |
751 | ||
957db105 CD |
752 | static void stage2_unmap_memslot(struct kvm *kvm, |
753 | struct kvm_memory_slot *memslot) | |
754 | { | |
755 | hva_t hva = memslot->userspace_addr; | |
756 | phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT; | |
757 | phys_addr_t size = PAGE_SIZE * memslot->npages; | |
758 | hva_t reg_end = hva + size; | |
759 | ||
760 | /* | |
761 | * A memory region could potentially cover multiple VMAs, and any holes | |
762 | * between them, so iterate over all of them to find out if we should | |
763 | * unmap any of them. | |
764 | * | |
765 | * +--------------------------------------------+ | |
766 | * +---------------+----------------+ +----------------+ | |
767 | * | : VMA 1 | VMA 2 | | VMA 3 : | | |
768 | * +---------------+----------------+ +----------------+ | |
769 | * | memory region | | |
770 | * +--------------------------------------------+ | |
771 | */ | |
772 | do { | |
773 | struct vm_area_struct *vma = find_vma(current->mm, hva); | |
774 | hva_t vm_start, vm_end; | |
775 | ||
776 | if (!vma || vma->vm_start >= reg_end) | |
777 | break; | |
778 | ||
779 | /* | |
780 | * Take the intersection of this VMA with the memory region | |
781 | */ | |
782 | vm_start = max(hva, vma->vm_start); | |
783 | vm_end = min(reg_end, vma->vm_end); | |
784 | ||
785 | if (!(vma->vm_flags & VM_PFNMAP)) { | |
786 | gpa_t gpa = addr + (vm_start - memslot->userspace_addr); | |
787 | unmap_stage2_range(kvm, gpa, vm_end - vm_start); | |
788 | } | |
789 | hva = vm_end; | |
790 | } while (hva < reg_end); | |
791 | } | |
792 | ||
793 | /** | |
794 | * stage2_unmap_vm - Unmap Stage-2 RAM mappings | |
795 | * @kvm: The struct kvm pointer | |
796 | * | |
797 | * Go through the memregions and unmap any reguler RAM | |
798 | * backing memory already mapped to the VM. | |
799 | */ | |
800 | void stage2_unmap_vm(struct kvm *kvm) | |
801 | { | |
802 | struct kvm_memslots *slots; | |
803 | struct kvm_memory_slot *memslot; | |
804 | int idx; | |
805 | ||
806 | idx = srcu_read_lock(&kvm->srcu); | |
807 | spin_lock(&kvm->mmu_lock); | |
808 | ||
809 | slots = kvm_memslots(kvm); | |
810 | kvm_for_each_memslot(memslot, slots) | |
811 | stage2_unmap_memslot(kvm, memslot); | |
812 | ||
813 | spin_unlock(&kvm->mmu_lock); | |
814 | srcu_read_unlock(&kvm->srcu, idx); | |
815 | } | |
816 | ||
d5d8184d CD |
817 | /** |
818 | * kvm_free_stage2_pgd - free all stage-2 tables | |
819 | * @kvm: The KVM struct pointer for the VM. | |
820 | * | |
821 | * Walks the level-1 page table pointed to by kvm->arch.pgd and frees all | |
822 | * underlying level-2 and level-3 tables before freeing the actual level-1 table | |
823 | * and setting the struct pointer to NULL. | |
824 | * | |
825 | * Note we don't need locking here as this is only called when the VM is | |
826 | * destroyed, which can only be done once. | |
827 | */ | |
828 | void kvm_free_stage2_pgd(struct kvm *kvm) | |
829 | { | |
830 | if (kvm->arch.pgd == NULL) | |
831 | return; | |
832 | ||
833 | unmap_stage2_range(kvm, 0, KVM_PHYS_SIZE); | |
9163ee23 SP |
834 | /* Free the HW pgd, one page at a time */ |
835 | free_pages_exact(kvm->arch.pgd, S2_PGD_SIZE); | |
d5d8184d CD |
836 | kvm->arch.pgd = NULL; |
837 | } | |
838 | ||
38f791a4 | 839 | static pud_t *stage2_get_pud(struct kvm *kvm, struct kvm_mmu_memory_cache *cache, |
ad361f09 | 840 | phys_addr_t addr) |
d5d8184d CD |
841 | { |
842 | pgd_t *pgd; | |
843 | pud_t *pud; | |
d5d8184d | 844 | |
70fd1906 SP |
845 | pgd = kvm->arch.pgd + stage2_pgd_index(addr); |
846 | if (WARN_ON(stage2_pgd_none(*pgd))) { | |
38f791a4 CD |
847 | if (!cache) |
848 | return NULL; | |
849 | pud = mmu_memory_cache_alloc(cache); | |
70fd1906 | 850 | stage2_pgd_populate(pgd, pud); |
38f791a4 CD |
851 | get_page(virt_to_page(pgd)); |
852 | } | |
853 | ||
70fd1906 | 854 | return stage2_pud_offset(pgd, addr); |
38f791a4 CD |
855 | } |
856 | ||
857 | static pmd_t *stage2_get_pmd(struct kvm *kvm, struct kvm_mmu_memory_cache *cache, | |
858 | phys_addr_t addr) | |
859 | { | |
860 | pud_t *pud; | |
861 | pmd_t *pmd; | |
862 | ||
863 | pud = stage2_get_pud(kvm, cache, addr); | |
70fd1906 | 864 | if (stage2_pud_none(*pud)) { |
d5d8184d | 865 | if (!cache) |
ad361f09 | 866 | return NULL; |
d5d8184d | 867 | pmd = mmu_memory_cache_alloc(cache); |
70fd1906 | 868 | stage2_pud_populate(pud, pmd); |
d5d8184d | 869 | get_page(virt_to_page(pud)); |
c62ee2b2 MZ |
870 | } |
871 | ||
70fd1906 | 872 | return stage2_pmd_offset(pud, addr); |
ad361f09 CD |
873 | } |
874 | ||
875 | static int stage2_set_pmd_huge(struct kvm *kvm, struct kvm_mmu_memory_cache | |
876 | *cache, phys_addr_t addr, const pmd_t *new_pmd) | |
877 | { | |
878 | pmd_t *pmd, old_pmd; | |
879 | ||
880 | pmd = stage2_get_pmd(kvm, cache, addr); | |
881 | VM_BUG_ON(!pmd); | |
d5d8184d | 882 | |
ad361f09 CD |
883 | /* |
884 | * Mapping in huge pages should only happen through a fault. If a | |
885 | * page is merged into a transparent huge page, the individual | |
886 | * subpages of that huge page should be unmapped through MMU | |
887 | * notifiers before we get here. | |
888 | * | |
889 | * Merging of CompoundPages is not supported; they should become | |
890 | * splitting first, unmapped, merged, and mapped back in on-demand. | |
891 | */ | |
892 | VM_BUG_ON(pmd_present(*pmd) && pmd_pfn(*pmd) != pmd_pfn(*new_pmd)); | |
893 | ||
894 | old_pmd = *pmd; | |
d4b9e079 MZ |
895 | if (pmd_present(old_pmd)) { |
896 | pmd_clear(pmd); | |
ad361f09 | 897 | kvm_tlb_flush_vmid_ipa(kvm, addr); |
d4b9e079 | 898 | } else { |
ad361f09 | 899 | get_page(virt_to_page(pmd)); |
d4b9e079 MZ |
900 | } |
901 | ||
902 | kvm_set_pmd(pmd, *new_pmd); | |
ad361f09 CD |
903 | return 0; |
904 | } | |
905 | ||
906 | static int stage2_set_pte(struct kvm *kvm, struct kvm_mmu_memory_cache *cache, | |
15a49a44 MS |
907 | phys_addr_t addr, const pte_t *new_pte, |
908 | unsigned long flags) | |
ad361f09 CD |
909 | { |
910 | pmd_t *pmd; | |
911 | pte_t *pte, old_pte; | |
15a49a44 MS |
912 | bool iomap = flags & KVM_S2PTE_FLAG_IS_IOMAP; |
913 | bool logging_active = flags & KVM_S2_FLAG_LOGGING_ACTIVE; | |
914 | ||
915 | VM_BUG_ON(logging_active && !cache); | |
ad361f09 | 916 | |
38f791a4 | 917 | /* Create stage-2 page table mapping - Levels 0 and 1 */ |
ad361f09 CD |
918 | pmd = stage2_get_pmd(kvm, cache, addr); |
919 | if (!pmd) { | |
920 | /* | |
921 | * Ignore calls from kvm_set_spte_hva for unallocated | |
922 | * address ranges. | |
923 | */ | |
924 | return 0; | |
925 | } | |
926 | ||
15a49a44 MS |
927 | /* |
928 | * While dirty page logging - dissolve huge PMD, then continue on to | |
929 | * allocate page. | |
930 | */ | |
931 | if (logging_active) | |
932 | stage2_dissolve_pmd(kvm, addr, pmd); | |
933 | ||
ad361f09 | 934 | /* Create stage-2 page mappings - Level 2 */ |
d5d8184d CD |
935 | if (pmd_none(*pmd)) { |
936 | if (!cache) | |
937 | return 0; /* ignore calls from kvm_set_spte_hva */ | |
938 | pte = mmu_memory_cache_alloc(cache); | |
c62ee2b2 | 939 | kvm_clean_pte(pte); |
d5d8184d | 940 | pmd_populate_kernel(NULL, pmd, pte); |
d5d8184d | 941 | get_page(virt_to_page(pmd)); |
c62ee2b2 MZ |
942 | } |
943 | ||
944 | pte = pte_offset_kernel(pmd, addr); | |
d5d8184d CD |
945 | |
946 | if (iomap && pte_present(*pte)) | |
947 | return -EFAULT; | |
948 | ||
949 | /* Create 2nd stage page table mapping - Level 3 */ | |
950 | old_pte = *pte; | |
d4b9e079 MZ |
951 | if (pte_present(old_pte)) { |
952 | kvm_set_pte(pte, __pte(0)); | |
48762767 | 953 | kvm_tlb_flush_vmid_ipa(kvm, addr); |
d4b9e079 | 954 | } else { |
d5d8184d | 955 | get_page(virt_to_page(pte)); |
d4b9e079 | 956 | } |
d5d8184d | 957 | |
d4b9e079 | 958 | kvm_set_pte(pte, *new_pte); |
d5d8184d CD |
959 | return 0; |
960 | } | |
d5d8184d | 961 | |
06485053 CM |
962 | #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG |
963 | static int stage2_ptep_test_and_clear_young(pte_t *pte) | |
964 | { | |
965 | if (pte_young(*pte)) { | |
966 | *pte = pte_mkold(*pte); | |
967 | return 1; | |
968 | } | |
d5d8184d CD |
969 | return 0; |
970 | } | |
06485053 CM |
971 | #else |
972 | static int stage2_ptep_test_and_clear_young(pte_t *pte) | |
973 | { | |
974 | return __ptep_test_and_clear_young(pte); | |
975 | } | |
976 | #endif | |
977 | ||
978 | static int stage2_pmdp_test_and_clear_young(pmd_t *pmd) | |
979 | { | |
980 | return stage2_ptep_test_and_clear_young((pte_t *)pmd); | |
981 | } | |
d5d8184d CD |
982 | |
983 | /** | |
984 | * kvm_phys_addr_ioremap - map a device range to guest IPA | |
985 | * | |
986 | * @kvm: The KVM pointer | |
987 | * @guest_ipa: The IPA at which to insert the mapping | |
988 | * @pa: The physical address of the device | |
989 | * @size: The size of the mapping | |
990 | */ | |
991 | int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa, | |
c40f2f8f | 992 | phys_addr_t pa, unsigned long size, bool writable) |
d5d8184d CD |
993 | { |
994 | phys_addr_t addr, end; | |
995 | int ret = 0; | |
996 | unsigned long pfn; | |
997 | struct kvm_mmu_memory_cache cache = { 0, }; | |
998 | ||
999 | end = (guest_ipa + size + PAGE_SIZE - 1) & PAGE_MASK; | |
1000 | pfn = __phys_to_pfn(pa); | |
1001 | ||
1002 | for (addr = guest_ipa; addr < end; addr += PAGE_SIZE) { | |
c62ee2b2 | 1003 | pte_t pte = pfn_pte(pfn, PAGE_S2_DEVICE); |
d5d8184d | 1004 | |
c40f2f8f | 1005 | if (writable) |
06485053 | 1006 | pte = kvm_s2pte_mkwrite(pte); |
c40f2f8f | 1007 | |
38f791a4 CD |
1008 | ret = mmu_topup_memory_cache(&cache, KVM_MMU_CACHE_MIN_PAGES, |
1009 | KVM_NR_MEM_OBJS); | |
d5d8184d CD |
1010 | if (ret) |
1011 | goto out; | |
1012 | spin_lock(&kvm->mmu_lock); | |
15a49a44 MS |
1013 | ret = stage2_set_pte(kvm, &cache, addr, &pte, |
1014 | KVM_S2PTE_FLAG_IS_IOMAP); | |
d5d8184d CD |
1015 | spin_unlock(&kvm->mmu_lock); |
1016 | if (ret) | |
1017 | goto out; | |
1018 | ||
1019 | pfn++; | |
1020 | } | |
1021 | ||
1022 | out: | |
1023 | mmu_free_memory_cache(&cache); | |
1024 | return ret; | |
1025 | } | |
1026 | ||
ba049e93 | 1027 | static bool transparent_hugepage_adjust(kvm_pfn_t *pfnp, phys_addr_t *ipap) |
9b5fdb97 | 1028 | { |
ba049e93 | 1029 | kvm_pfn_t pfn = *pfnp; |
9b5fdb97 CD |
1030 | gfn_t gfn = *ipap >> PAGE_SHIFT; |
1031 | ||
127393fb | 1032 | if (PageTransCompoundMap(pfn_to_page(pfn))) { |
9b5fdb97 CD |
1033 | unsigned long mask; |
1034 | /* | |
1035 | * The address we faulted on is backed by a transparent huge | |
1036 | * page. However, because we map the compound huge page and | |
1037 | * not the individual tail page, we need to transfer the | |
1038 | * refcount to the head page. We have to be careful that the | |
1039 | * THP doesn't start to split while we are adjusting the | |
1040 | * refcounts. | |
1041 | * | |
1042 | * We are sure this doesn't happen, because mmu_notifier_retry | |
1043 | * was successful and we are holding the mmu_lock, so if this | |
1044 | * THP is trying to split, it will be blocked in the mmu | |
1045 | * notifier before touching any of the pages, specifically | |
1046 | * before being able to call __split_huge_page_refcount(). | |
1047 | * | |
1048 | * We can therefore safely transfer the refcount from PG_tail | |
1049 | * to PG_head and switch the pfn from a tail page to the head | |
1050 | * page accordingly. | |
1051 | */ | |
1052 | mask = PTRS_PER_PMD - 1; | |
1053 | VM_BUG_ON((gfn & mask) != (pfn & mask)); | |
1054 | if (pfn & mask) { | |
1055 | *ipap &= PMD_MASK; | |
1056 | kvm_release_pfn_clean(pfn); | |
1057 | pfn &= ~mask; | |
1058 | kvm_get_pfn(pfn); | |
1059 | *pfnp = pfn; | |
1060 | } | |
1061 | ||
1062 | return true; | |
1063 | } | |
1064 | ||
1065 | return false; | |
1066 | } | |
1067 | ||
a7d079ce AB |
1068 | static bool kvm_is_write_fault(struct kvm_vcpu *vcpu) |
1069 | { | |
1070 | if (kvm_vcpu_trap_is_iabt(vcpu)) | |
1071 | return false; | |
1072 | ||
1073 | return kvm_vcpu_dabt_iswrite(vcpu); | |
1074 | } | |
1075 | ||
c6473555 MS |
1076 | /** |
1077 | * stage2_wp_ptes - write protect PMD range | |
1078 | * @pmd: pointer to pmd entry | |
1079 | * @addr: range start address | |
1080 | * @end: range end address | |
1081 | */ | |
1082 | static void stage2_wp_ptes(pmd_t *pmd, phys_addr_t addr, phys_addr_t end) | |
1083 | { | |
1084 | pte_t *pte; | |
1085 | ||
1086 | pte = pte_offset_kernel(pmd, addr); | |
1087 | do { | |
1088 | if (!pte_none(*pte)) { | |
1089 | if (!kvm_s2pte_readonly(pte)) | |
1090 | kvm_set_s2pte_readonly(pte); | |
1091 | } | |
1092 | } while (pte++, addr += PAGE_SIZE, addr != end); | |
1093 | } | |
1094 | ||
1095 | /** | |
1096 | * stage2_wp_pmds - write protect PUD range | |
1097 | * @pud: pointer to pud entry | |
1098 | * @addr: range start address | |
1099 | * @end: range end address | |
1100 | */ | |
1101 | static void stage2_wp_pmds(pud_t *pud, phys_addr_t addr, phys_addr_t end) | |
1102 | { | |
1103 | pmd_t *pmd; | |
1104 | phys_addr_t next; | |
1105 | ||
70fd1906 | 1106 | pmd = stage2_pmd_offset(pud, addr); |
c6473555 MS |
1107 | |
1108 | do { | |
70fd1906 | 1109 | next = stage2_pmd_addr_end(addr, end); |
c6473555 | 1110 | if (!pmd_none(*pmd)) { |
bbb3b6b3 | 1111 | if (pmd_thp_or_huge(*pmd)) { |
c6473555 MS |
1112 | if (!kvm_s2pmd_readonly(pmd)) |
1113 | kvm_set_s2pmd_readonly(pmd); | |
1114 | } else { | |
1115 | stage2_wp_ptes(pmd, addr, next); | |
1116 | } | |
1117 | } | |
1118 | } while (pmd++, addr = next, addr != end); | |
1119 | } | |
1120 | ||
1121 | /** | |
1122 | * stage2_wp_puds - write protect PGD range | |
1123 | * @pgd: pointer to pgd entry | |
1124 | * @addr: range start address | |
1125 | * @end: range end address | |
1126 | * | |
1127 | * Process PUD entries, for a huge PUD we cause a panic. | |
1128 | */ | |
1129 | static void stage2_wp_puds(pgd_t *pgd, phys_addr_t addr, phys_addr_t end) | |
1130 | { | |
1131 | pud_t *pud; | |
1132 | phys_addr_t next; | |
1133 | ||
70fd1906 | 1134 | pud = stage2_pud_offset(pgd, addr); |
c6473555 | 1135 | do { |
70fd1906 SP |
1136 | next = stage2_pud_addr_end(addr, end); |
1137 | if (!stage2_pud_none(*pud)) { | |
c6473555 | 1138 | /* TODO:PUD not supported, revisit later if supported */ |
70fd1906 | 1139 | BUG_ON(stage2_pud_huge(*pud)); |
c6473555 MS |
1140 | stage2_wp_pmds(pud, addr, next); |
1141 | } | |
1142 | } while (pud++, addr = next, addr != end); | |
1143 | } | |
1144 | ||
1145 | /** | |
1146 | * stage2_wp_range() - write protect stage2 memory region range | |
1147 | * @kvm: The KVM pointer | |
1148 | * @addr: Start address of range | |
1149 | * @end: End address of range | |
1150 | */ | |
1151 | static void stage2_wp_range(struct kvm *kvm, phys_addr_t addr, phys_addr_t end) | |
1152 | { | |
1153 | pgd_t *pgd; | |
1154 | phys_addr_t next; | |
1155 | ||
70fd1906 | 1156 | pgd = kvm->arch.pgd + stage2_pgd_index(addr); |
c6473555 MS |
1157 | do { |
1158 | /* | |
1159 | * Release kvm_mmu_lock periodically if the memory region is | |
1160 | * large. Otherwise, we may see kernel panics with | |
227ea818 CD |
1161 | * CONFIG_DETECT_HUNG_TASK, CONFIG_LOCKUP_DETECTOR, |
1162 | * CONFIG_LOCKDEP. Additionally, holding the lock too long | |
c6473555 MS |
1163 | * will also starve other vCPUs. |
1164 | */ | |
1165 | if (need_resched() || spin_needbreak(&kvm->mmu_lock)) | |
1166 | cond_resched_lock(&kvm->mmu_lock); | |
1167 | ||
70fd1906 SP |
1168 | next = stage2_pgd_addr_end(addr, end); |
1169 | if (stage2_pgd_present(*pgd)) | |
c6473555 MS |
1170 | stage2_wp_puds(pgd, addr, next); |
1171 | } while (pgd++, addr = next, addr != end); | |
1172 | } | |
1173 | ||
1174 | /** | |
1175 | * kvm_mmu_wp_memory_region() - write protect stage 2 entries for memory slot | |
1176 | * @kvm: The KVM pointer | |
1177 | * @slot: The memory slot to write protect | |
1178 | * | |
1179 | * Called to start logging dirty pages after memory region | |
1180 | * KVM_MEM_LOG_DIRTY_PAGES operation is called. After this function returns | |
1181 | * all present PMD and PTEs are write protected in the memory region. | |
1182 | * Afterwards read of dirty page log can be called. | |
1183 | * | |
1184 | * Acquires kvm_mmu_lock. Called with kvm->slots_lock mutex acquired, | |
1185 | * serializing operations for VM memory regions. | |
1186 | */ | |
1187 | void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot) | |
1188 | { | |
9f6b8029 PB |
1189 | struct kvm_memslots *slots = kvm_memslots(kvm); |
1190 | struct kvm_memory_slot *memslot = id_to_memslot(slots, slot); | |
c6473555 MS |
1191 | phys_addr_t start = memslot->base_gfn << PAGE_SHIFT; |
1192 | phys_addr_t end = (memslot->base_gfn + memslot->npages) << PAGE_SHIFT; | |
1193 | ||
1194 | spin_lock(&kvm->mmu_lock); | |
1195 | stage2_wp_range(kvm, start, end); | |
1196 | spin_unlock(&kvm->mmu_lock); | |
1197 | kvm_flush_remote_tlbs(kvm); | |
1198 | } | |
53c810c3 MS |
1199 | |
1200 | /** | |
3b0f1d01 | 1201 | * kvm_mmu_write_protect_pt_masked() - write protect dirty pages |
53c810c3 MS |
1202 | * @kvm: The KVM pointer |
1203 | * @slot: The memory slot associated with mask | |
1204 | * @gfn_offset: The gfn offset in memory slot | |
1205 | * @mask: The mask of dirty pages at offset 'gfn_offset' in this memory | |
1206 | * slot to be write protected | |
1207 | * | |
1208 | * Walks bits set in mask write protects the associated pte's. Caller must | |
1209 | * acquire kvm_mmu_lock. | |
1210 | */ | |
3b0f1d01 | 1211 | static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm, |
53c810c3 MS |
1212 | struct kvm_memory_slot *slot, |
1213 | gfn_t gfn_offset, unsigned long mask) | |
1214 | { | |
1215 | phys_addr_t base_gfn = slot->base_gfn + gfn_offset; | |
1216 | phys_addr_t start = (base_gfn + __ffs(mask)) << PAGE_SHIFT; | |
1217 | phys_addr_t end = (base_gfn + __fls(mask) + 1) << PAGE_SHIFT; | |
1218 | ||
1219 | stage2_wp_range(kvm, start, end); | |
1220 | } | |
c6473555 | 1221 | |
3b0f1d01 KH |
1222 | /* |
1223 | * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected | |
1224 | * dirty pages. | |
1225 | * | |
1226 | * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to | |
1227 | * enable dirty logging for them. | |
1228 | */ | |
1229 | void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm, | |
1230 | struct kvm_memory_slot *slot, | |
1231 | gfn_t gfn_offset, unsigned long mask) | |
1232 | { | |
1233 | kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask); | |
1234 | } | |
1235 | ||
ba049e93 | 1236 | static void coherent_cache_guest_page(struct kvm_vcpu *vcpu, kvm_pfn_t pfn, |
0d3e4d4f MZ |
1237 | unsigned long size, bool uncached) |
1238 | { | |
1239 | __coherent_cache_guest_page(vcpu, pfn, size, uncached); | |
1240 | } | |
1241 | ||
94f8e641 | 1242 | static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, |
98047888 | 1243 | struct kvm_memory_slot *memslot, unsigned long hva, |
94f8e641 CD |
1244 | unsigned long fault_status) |
1245 | { | |
94f8e641 | 1246 | int ret; |
9b5fdb97 | 1247 | bool write_fault, writable, hugetlb = false, force_pte = false; |
94f8e641 | 1248 | unsigned long mmu_seq; |
ad361f09 | 1249 | gfn_t gfn = fault_ipa >> PAGE_SHIFT; |
ad361f09 | 1250 | struct kvm *kvm = vcpu->kvm; |
94f8e641 | 1251 | struct kvm_mmu_memory_cache *memcache = &vcpu->arch.mmu_page_cache; |
ad361f09 | 1252 | struct vm_area_struct *vma; |
ba049e93 | 1253 | kvm_pfn_t pfn; |
b8865767 | 1254 | pgprot_t mem_type = PAGE_S2; |
840f4bfb | 1255 | bool fault_ipa_uncached; |
15a49a44 MS |
1256 | bool logging_active = memslot_is_logging(memslot); |
1257 | unsigned long flags = 0; | |
94f8e641 | 1258 | |
a7d079ce | 1259 | write_fault = kvm_is_write_fault(vcpu); |
94f8e641 CD |
1260 | if (fault_status == FSC_PERM && !write_fault) { |
1261 | kvm_err("Unexpected L2 read permission error\n"); | |
1262 | return -EFAULT; | |
1263 | } | |
1264 | ||
ad361f09 CD |
1265 | /* Let's check if we will get back a huge page backed by hugetlbfs */ |
1266 | down_read(¤t->mm->mmap_sem); | |
1267 | vma = find_vma_intersection(current->mm, hva, hva + 1); | |
37b54408 AB |
1268 | if (unlikely(!vma)) { |
1269 | kvm_err("Failed to find VMA for hva 0x%lx\n", hva); | |
1270 | up_read(¤t->mm->mmap_sem); | |
1271 | return -EFAULT; | |
1272 | } | |
1273 | ||
15a49a44 | 1274 | if (is_vm_hugetlb_page(vma) && !logging_active) { |
ad361f09 CD |
1275 | hugetlb = true; |
1276 | gfn = (fault_ipa & PMD_MASK) >> PAGE_SHIFT; | |
9b5fdb97 CD |
1277 | } else { |
1278 | /* | |
136d737f MZ |
1279 | * Pages belonging to memslots that don't have the same |
1280 | * alignment for userspace and IPA cannot be mapped using | |
1281 | * block descriptors even if the pages belong to a THP for | |
1282 | * the process, because the stage-2 block descriptor will | |
1283 | * cover more than a single THP and we loose atomicity for | |
1284 | * unmapping, updates, and splits of the THP or other pages | |
1285 | * in the stage-2 block range. | |
9b5fdb97 | 1286 | */ |
136d737f MZ |
1287 | if ((memslot->userspace_addr & ~PMD_MASK) != |
1288 | ((memslot->base_gfn << PAGE_SHIFT) & ~PMD_MASK)) | |
9b5fdb97 | 1289 | force_pte = true; |
ad361f09 CD |
1290 | } |
1291 | up_read(¤t->mm->mmap_sem); | |
1292 | ||
94f8e641 | 1293 | /* We need minimum second+third level pages */ |
38f791a4 CD |
1294 | ret = mmu_topup_memory_cache(memcache, KVM_MMU_CACHE_MIN_PAGES, |
1295 | KVM_NR_MEM_OBJS); | |
94f8e641 CD |
1296 | if (ret) |
1297 | return ret; | |
1298 | ||
1299 | mmu_seq = vcpu->kvm->mmu_notifier_seq; | |
1300 | /* | |
1301 | * Ensure the read of mmu_notifier_seq happens before we call | |
1302 | * gfn_to_pfn_prot (which calls get_user_pages), so that we don't risk | |
1303 | * the page we just got a reference to gets unmapped before we have a | |
1304 | * chance to grab the mmu_lock, which ensure that if the page gets | |
1305 | * unmapped afterwards, the call to kvm_unmap_hva will take it away | |
1306 | * from us again properly. This smp_rmb() interacts with the smp_wmb() | |
1307 | * in kvm_mmu_notifier_invalidate_<page|range_end>. | |
1308 | */ | |
1309 | smp_rmb(); | |
1310 | ||
ad361f09 | 1311 | pfn = gfn_to_pfn_prot(kvm, gfn, write_fault, &writable); |
9ac71595 | 1312 | if (is_error_noslot_pfn(pfn)) |
94f8e641 CD |
1313 | return -EFAULT; |
1314 | ||
15a49a44 | 1315 | if (kvm_is_device_pfn(pfn)) { |
b8865767 | 1316 | mem_type = PAGE_S2_DEVICE; |
15a49a44 MS |
1317 | flags |= KVM_S2PTE_FLAG_IS_IOMAP; |
1318 | } else if (logging_active) { | |
1319 | /* | |
1320 | * Faults on pages in a memslot with logging enabled | |
1321 | * should not be mapped with huge pages (it introduces churn | |
1322 | * and performance degradation), so force a pte mapping. | |
1323 | */ | |
1324 | force_pte = true; | |
1325 | flags |= KVM_S2_FLAG_LOGGING_ACTIVE; | |
1326 | ||
1327 | /* | |
1328 | * Only actually map the page as writable if this was a write | |
1329 | * fault. | |
1330 | */ | |
1331 | if (!write_fault) | |
1332 | writable = false; | |
1333 | } | |
b8865767 | 1334 | |
ad361f09 CD |
1335 | spin_lock(&kvm->mmu_lock); |
1336 | if (mmu_notifier_retry(kvm, mmu_seq)) | |
94f8e641 | 1337 | goto out_unlock; |
15a49a44 | 1338 | |
9b5fdb97 CD |
1339 | if (!hugetlb && !force_pte) |
1340 | hugetlb = transparent_hugepage_adjust(&pfn, &fault_ipa); | |
ad361f09 | 1341 | |
849260c7 | 1342 | fault_ipa_uncached = memslot->flags & KVM_MEMSLOT_INCOHERENT; |
840f4bfb | 1343 | |
ad361f09 | 1344 | if (hugetlb) { |
b8865767 | 1345 | pmd_t new_pmd = pfn_pmd(pfn, mem_type); |
ad361f09 CD |
1346 | new_pmd = pmd_mkhuge(new_pmd); |
1347 | if (writable) { | |
06485053 | 1348 | new_pmd = kvm_s2pmd_mkwrite(new_pmd); |
ad361f09 CD |
1349 | kvm_set_pfn_dirty(pfn); |
1350 | } | |
0d3e4d4f | 1351 | coherent_cache_guest_page(vcpu, pfn, PMD_SIZE, fault_ipa_uncached); |
ad361f09 CD |
1352 | ret = stage2_set_pmd_huge(kvm, memcache, fault_ipa, &new_pmd); |
1353 | } else { | |
b8865767 | 1354 | pte_t new_pte = pfn_pte(pfn, mem_type); |
15a49a44 | 1355 | |
ad361f09 | 1356 | if (writable) { |
06485053 | 1357 | new_pte = kvm_s2pte_mkwrite(new_pte); |
ad361f09 | 1358 | kvm_set_pfn_dirty(pfn); |
15a49a44 | 1359 | mark_page_dirty(kvm, gfn); |
ad361f09 | 1360 | } |
0d3e4d4f | 1361 | coherent_cache_guest_page(vcpu, pfn, PAGE_SIZE, fault_ipa_uncached); |
15a49a44 | 1362 | ret = stage2_set_pte(kvm, memcache, fault_ipa, &new_pte, flags); |
94f8e641 | 1363 | } |
ad361f09 | 1364 | |
94f8e641 | 1365 | out_unlock: |
ad361f09 | 1366 | spin_unlock(&kvm->mmu_lock); |
35307b9a | 1367 | kvm_set_pfn_accessed(pfn); |
94f8e641 | 1368 | kvm_release_pfn_clean(pfn); |
ad361f09 | 1369 | return ret; |
94f8e641 CD |
1370 | } |
1371 | ||
aeda9130 MZ |
1372 | /* |
1373 | * Resolve the access fault by making the page young again. | |
1374 | * Note that because the faulting entry is guaranteed not to be | |
1375 | * cached in the TLB, we don't need to invalidate anything. | |
06485053 CM |
1376 | * Only the HW Access Flag updates are supported for Stage 2 (no DBM), |
1377 | * so there is no need for atomic (pte|pmd)_mkyoung operations. | |
aeda9130 MZ |
1378 | */ |
1379 | static void handle_access_fault(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa) | |
1380 | { | |
1381 | pmd_t *pmd; | |
1382 | pte_t *pte; | |
ba049e93 | 1383 | kvm_pfn_t pfn; |
aeda9130 MZ |
1384 | bool pfn_valid = false; |
1385 | ||
1386 | trace_kvm_access_fault(fault_ipa); | |
1387 | ||
1388 | spin_lock(&vcpu->kvm->mmu_lock); | |
1389 | ||
1390 | pmd = stage2_get_pmd(vcpu->kvm, NULL, fault_ipa); | |
1391 | if (!pmd || pmd_none(*pmd)) /* Nothing there */ | |
1392 | goto out; | |
1393 | ||
bbb3b6b3 | 1394 | if (pmd_thp_or_huge(*pmd)) { /* THP, HugeTLB */ |
aeda9130 MZ |
1395 | *pmd = pmd_mkyoung(*pmd); |
1396 | pfn = pmd_pfn(*pmd); | |
1397 | pfn_valid = true; | |
1398 | goto out; | |
1399 | } | |
1400 | ||
1401 | pte = pte_offset_kernel(pmd, fault_ipa); | |
1402 | if (pte_none(*pte)) /* Nothing there either */ | |
1403 | goto out; | |
1404 | ||
1405 | *pte = pte_mkyoung(*pte); /* Just a page... */ | |
1406 | pfn = pte_pfn(*pte); | |
1407 | pfn_valid = true; | |
1408 | out: | |
1409 | spin_unlock(&vcpu->kvm->mmu_lock); | |
1410 | if (pfn_valid) | |
1411 | kvm_set_pfn_accessed(pfn); | |
1412 | } | |
1413 | ||
94f8e641 CD |
1414 | /** |
1415 | * kvm_handle_guest_abort - handles all 2nd stage aborts | |
1416 | * @vcpu: the VCPU pointer | |
1417 | * @run: the kvm_run structure | |
1418 | * | |
1419 | * Any abort that gets to the host is almost guaranteed to be caused by a | |
1420 | * missing second stage translation table entry, which can mean that either the | |
1421 | * guest simply needs more memory and we must allocate an appropriate page or it | |
1422 | * can mean that the guest tried to access I/O memory, which is emulated by user | |
1423 | * space. The distinction is based on the IPA causing the fault and whether this | |
1424 | * memory region has been registered as standard RAM by user space. | |
1425 | */ | |
342cd0ab CD |
1426 | int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run) |
1427 | { | |
94f8e641 CD |
1428 | unsigned long fault_status; |
1429 | phys_addr_t fault_ipa; | |
1430 | struct kvm_memory_slot *memslot; | |
98047888 CD |
1431 | unsigned long hva; |
1432 | bool is_iabt, write_fault, writable; | |
94f8e641 CD |
1433 | gfn_t gfn; |
1434 | int ret, idx; | |
1435 | ||
52d1dba9 | 1436 | is_iabt = kvm_vcpu_trap_is_iabt(vcpu); |
7393b599 | 1437 | fault_ipa = kvm_vcpu_get_fault_ipa(vcpu); |
94f8e641 | 1438 | |
7393b599 MZ |
1439 | trace_kvm_guest_fault(*vcpu_pc(vcpu), kvm_vcpu_get_hsr(vcpu), |
1440 | kvm_vcpu_get_hfar(vcpu), fault_ipa); | |
94f8e641 CD |
1441 | |
1442 | /* Check the stage-2 fault is trans. fault or write fault */ | |
0496daa5 | 1443 | fault_status = kvm_vcpu_trap_get_fault_type(vcpu); |
35307b9a MZ |
1444 | if (fault_status != FSC_FAULT && fault_status != FSC_PERM && |
1445 | fault_status != FSC_ACCESS) { | |
0496daa5 CD |
1446 | kvm_err("Unsupported FSC: EC=%#x xFSC=%#lx ESR_EL2=%#lx\n", |
1447 | kvm_vcpu_trap_get_class(vcpu), | |
1448 | (unsigned long)kvm_vcpu_trap_get_fault(vcpu), | |
1449 | (unsigned long)kvm_vcpu_get_hsr(vcpu)); | |
94f8e641 CD |
1450 | return -EFAULT; |
1451 | } | |
1452 | ||
1453 | idx = srcu_read_lock(&vcpu->kvm->srcu); | |
1454 | ||
1455 | gfn = fault_ipa >> PAGE_SHIFT; | |
98047888 CD |
1456 | memslot = gfn_to_memslot(vcpu->kvm, gfn); |
1457 | hva = gfn_to_hva_memslot_prot(memslot, gfn, &writable); | |
a7d079ce | 1458 | write_fault = kvm_is_write_fault(vcpu); |
98047888 | 1459 | if (kvm_is_error_hva(hva) || (write_fault && !writable)) { |
94f8e641 CD |
1460 | if (is_iabt) { |
1461 | /* Prefetch Abort on I/O address */ | |
7393b599 | 1462 | kvm_inject_pabt(vcpu, kvm_vcpu_get_hfar(vcpu)); |
94f8e641 CD |
1463 | ret = 1; |
1464 | goto out_unlock; | |
1465 | } | |
1466 | ||
57c841f1 MZ |
1467 | /* |
1468 | * Check for a cache maintenance operation. Since we | |
1469 | * ended-up here, we know it is outside of any memory | |
1470 | * slot. But we can't find out if that is for a device, | |
1471 | * or if the guest is just being stupid. The only thing | |
1472 | * we know for sure is that this range cannot be cached. | |
1473 | * | |
1474 | * So let's assume that the guest is just being | |
1475 | * cautious, and skip the instruction. | |
1476 | */ | |
1477 | if (kvm_vcpu_dabt_is_cm(vcpu)) { | |
1478 | kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu)); | |
1479 | ret = 1; | |
1480 | goto out_unlock; | |
1481 | } | |
1482 | ||
cfe3950c MZ |
1483 | /* |
1484 | * The IPA is reported as [MAX:12], so we need to | |
1485 | * complement it with the bottom 12 bits from the | |
1486 | * faulting VA. This is always 12 bits, irrespective | |
1487 | * of the page size. | |
1488 | */ | |
1489 | fault_ipa |= kvm_vcpu_get_hfar(vcpu) & ((1 << 12) - 1); | |
45e96ea6 | 1490 | ret = io_mem_abort(vcpu, run, fault_ipa); |
94f8e641 CD |
1491 | goto out_unlock; |
1492 | } | |
1493 | ||
c3058d5d CD |
1494 | /* Userspace should not be able to register out-of-bounds IPAs */ |
1495 | VM_BUG_ON(fault_ipa >= KVM_PHYS_SIZE); | |
1496 | ||
aeda9130 MZ |
1497 | if (fault_status == FSC_ACCESS) { |
1498 | handle_access_fault(vcpu, fault_ipa); | |
1499 | ret = 1; | |
1500 | goto out_unlock; | |
1501 | } | |
1502 | ||
98047888 | 1503 | ret = user_mem_abort(vcpu, fault_ipa, memslot, hva, fault_status); |
94f8e641 CD |
1504 | if (ret == 0) |
1505 | ret = 1; | |
1506 | out_unlock: | |
1507 | srcu_read_unlock(&vcpu->kvm->srcu, idx); | |
1508 | return ret; | |
342cd0ab CD |
1509 | } |
1510 | ||
1d2ebacc MZ |
1511 | static int handle_hva_to_gpa(struct kvm *kvm, |
1512 | unsigned long start, | |
1513 | unsigned long end, | |
1514 | int (*handler)(struct kvm *kvm, | |
1515 | gpa_t gpa, void *data), | |
1516 | void *data) | |
d5d8184d CD |
1517 | { |
1518 | struct kvm_memslots *slots; | |
1519 | struct kvm_memory_slot *memslot; | |
1d2ebacc | 1520 | int ret = 0; |
d5d8184d CD |
1521 | |
1522 | slots = kvm_memslots(kvm); | |
1523 | ||
1524 | /* we only care about the pages that the guest sees */ | |
1525 | kvm_for_each_memslot(memslot, slots) { | |
1526 | unsigned long hva_start, hva_end; | |
1527 | gfn_t gfn, gfn_end; | |
1528 | ||
1529 | hva_start = max(start, memslot->userspace_addr); | |
1530 | hva_end = min(end, memslot->userspace_addr + | |
1531 | (memslot->npages << PAGE_SHIFT)); | |
1532 | if (hva_start >= hva_end) | |
1533 | continue; | |
1534 | ||
1535 | /* | |
1536 | * {gfn(page) | page intersects with [hva_start, hva_end)} = | |
1537 | * {gfn_start, gfn_start+1, ..., gfn_end-1}. | |
1538 | */ | |
1539 | gfn = hva_to_gfn_memslot(hva_start, memslot); | |
1540 | gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot); | |
1541 | ||
1542 | for (; gfn < gfn_end; ++gfn) { | |
1543 | gpa_t gpa = gfn << PAGE_SHIFT; | |
1d2ebacc | 1544 | ret |= handler(kvm, gpa, data); |
d5d8184d CD |
1545 | } |
1546 | } | |
1d2ebacc MZ |
1547 | |
1548 | return ret; | |
d5d8184d CD |
1549 | } |
1550 | ||
1d2ebacc | 1551 | static int kvm_unmap_hva_handler(struct kvm *kvm, gpa_t gpa, void *data) |
d5d8184d CD |
1552 | { |
1553 | unmap_stage2_range(kvm, gpa, PAGE_SIZE); | |
1d2ebacc | 1554 | return 0; |
d5d8184d CD |
1555 | } |
1556 | ||
1557 | int kvm_unmap_hva(struct kvm *kvm, unsigned long hva) | |
1558 | { | |
1559 | unsigned long end = hva + PAGE_SIZE; | |
1560 | ||
1561 | if (!kvm->arch.pgd) | |
1562 | return 0; | |
1563 | ||
1564 | trace_kvm_unmap_hva(hva); | |
1565 | handle_hva_to_gpa(kvm, hva, end, &kvm_unmap_hva_handler, NULL); | |
1566 | return 0; | |
1567 | } | |
1568 | ||
1569 | int kvm_unmap_hva_range(struct kvm *kvm, | |
1570 | unsigned long start, unsigned long end) | |
1571 | { | |
1572 | if (!kvm->arch.pgd) | |
1573 | return 0; | |
1574 | ||
1575 | trace_kvm_unmap_hva_range(start, end); | |
1576 | handle_hva_to_gpa(kvm, start, end, &kvm_unmap_hva_handler, NULL); | |
1577 | return 0; | |
1578 | } | |
1579 | ||
1d2ebacc | 1580 | static int kvm_set_spte_handler(struct kvm *kvm, gpa_t gpa, void *data) |
d5d8184d CD |
1581 | { |
1582 | pte_t *pte = (pte_t *)data; | |
1583 | ||
15a49a44 MS |
1584 | /* |
1585 | * We can always call stage2_set_pte with KVM_S2PTE_FLAG_LOGGING_ACTIVE | |
1586 | * flag clear because MMU notifiers will have unmapped a huge PMD before | |
1587 | * calling ->change_pte() (which in turn calls kvm_set_spte_hva()) and | |
1588 | * therefore stage2_set_pte() never needs to clear out a huge PMD | |
1589 | * through this calling path. | |
1590 | */ | |
1591 | stage2_set_pte(kvm, NULL, gpa, pte, 0); | |
1d2ebacc | 1592 | return 0; |
d5d8184d CD |
1593 | } |
1594 | ||
1595 | ||
1596 | void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte) | |
1597 | { | |
1598 | unsigned long end = hva + PAGE_SIZE; | |
1599 | pte_t stage2_pte; | |
1600 | ||
1601 | if (!kvm->arch.pgd) | |
1602 | return; | |
1603 | ||
1604 | trace_kvm_set_spte_hva(hva); | |
1605 | stage2_pte = pfn_pte(pte_pfn(pte), PAGE_S2); | |
1606 | handle_hva_to_gpa(kvm, hva, end, &kvm_set_spte_handler, &stage2_pte); | |
1607 | } | |
1608 | ||
35307b9a MZ |
1609 | static int kvm_age_hva_handler(struct kvm *kvm, gpa_t gpa, void *data) |
1610 | { | |
1611 | pmd_t *pmd; | |
1612 | pte_t *pte; | |
1613 | ||
1614 | pmd = stage2_get_pmd(kvm, NULL, gpa); | |
1615 | if (!pmd || pmd_none(*pmd)) /* Nothing there */ | |
1616 | return 0; | |
1617 | ||
06485053 CM |
1618 | if (pmd_thp_or_huge(*pmd)) /* THP, HugeTLB */ |
1619 | return stage2_pmdp_test_and_clear_young(pmd); | |
35307b9a MZ |
1620 | |
1621 | pte = pte_offset_kernel(pmd, gpa); | |
1622 | if (pte_none(*pte)) | |
1623 | return 0; | |
1624 | ||
06485053 | 1625 | return stage2_ptep_test_and_clear_young(pte); |
35307b9a MZ |
1626 | } |
1627 | ||
1628 | static int kvm_test_age_hva_handler(struct kvm *kvm, gpa_t gpa, void *data) | |
1629 | { | |
1630 | pmd_t *pmd; | |
1631 | pte_t *pte; | |
1632 | ||
1633 | pmd = stage2_get_pmd(kvm, NULL, gpa); | |
1634 | if (!pmd || pmd_none(*pmd)) /* Nothing there */ | |
1635 | return 0; | |
1636 | ||
bbb3b6b3 | 1637 | if (pmd_thp_or_huge(*pmd)) /* THP, HugeTLB */ |
35307b9a MZ |
1638 | return pmd_young(*pmd); |
1639 | ||
1640 | pte = pte_offset_kernel(pmd, gpa); | |
1641 | if (!pte_none(*pte)) /* Just a page... */ | |
1642 | return pte_young(*pte); | |
1643 | ||
1644 | return 0; | |
1645 | } | |
1646 | ||
1647 | int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end) | |
1648 | { | |
1649 | trace_kvm_age_hva(start, end); | |
1650 | return handle_hva_to_gpa(kvm, start, end, kvm_age_hva_handler, NULL); | |
1651 | } | |
1652 | ||
1653 | int kvm_test_age_hva(struct kvm *kvm, unsigned long hva) | |
1654 | { | |
1655 | trace_kvm_test_age_hva(hva); | |
1656 | return handle_hva_to_gpa(kvm, hva, hva, kvm_test_age_hva_handler, NULL); | |
1657 | } | |
1658 | ||
d5d8184d CD |
1659 | void kvm_mmu_free_memory_caches(struct kvm_vcpu *vcpu) |
1660 | { | |
1661 | mmu_free_memory_cache(&vcpu->arch.mmu_page_cache); | |
1662 | } | |
1663 | ||
342cd0ab CD |
1664 | phys_addr_t kvm_mmu_get_httbr(void) |
1665 | { | |
e4c5a685 AB |
1666 | if (__kvm_cpu_uses_extended_idmap()) |
1667 | return virt_to_phys(merged_hyp_pgd); | |
1668 | else | |
1669 | return virt_to_phys(hyp_pgd); | |
342cd0ab CD |
1670 | } |
1671 | ||
5a677ce0 MZ |
1672 | phys_addr_t kvm_get_idmap_vector(void) |
1673 | { | |
1674 | return hyp_idmap_vector; | |
1675 | } | |
1676 | ||
67f69197 AT |
1677 | phys_addr_t kvm_get_idmap_start(void) |
1678 | { | |
1679 | return hyp_idmap_start; | |
1680 | } | |
1681 | ||
0535a3e2 MZ |
1682 | static int kvm_map_idmap_text(pgd_t *pgd) |
1683 | { | |
1684 | int err; | |
1685 | ||
1686 | /* Create the idmap in the boot page tables */ | |
1687 | err = __create_hyp_mappings(pgd, | |
1688 | hyp_idmap_start, hyp_idmap_end, | |
1689 | __phys_to_pfn(hyp_idmap_start), | |
1690 | PAGE_HYP_EXEC); | |
1691 | if (err) | |
1692 | kvm_err("Failed to idmap %lx-%lx\n", | |
1693 | hyp_idmap_start, hyp_idmap_end); | |
1694 | ||
1695 | return err; | |
1696 | } | |
1697 | ||
342cd0ab CD |
1698 | int kvm_mmu_init(void) |
1699 | { | |
2fb41059 MZ |
1700 | int err; |
1701 | ||
4fda342c SS |
1702 | hyp_idmap_start = kvm_virt_to_phys(__hyp_idmap_text_start); |
1703 | hyp_idmap_end = kvm_virt_to_phys(__hyp_idmap_text_end); | |
1704 | hyp_idmap_vector = kvm_virt_to_phys(__kvm_hyp_init); | |
5a677ce0 | 1705 | |
06f75a1f AB |
1706 | /* |
1707 | * We rely on the linker script to ensure at build time that the HYP | |
1708 | * init code does not cross a page boundary. | |
1709 | */ | |
1710 | BUG_ON((hyp_idmap_start ^ (hyp_idmap_end - 1)) & PAGE_MASK); | |
5a677ce0 | 1711 | |
eac378a9 MZ |
1712 | kvm_info("IDMAP page: %lx\n", hyp_idmap_start); |
1713 | kvm_info("HYP VA range: %lx:%lx\n", | |
6c41a413 | 1714 | kern_hyp_va(PAGE_OFFSET), kern_hyp_va(~0UL)); |
eac378a9 | 1715 | |
6c41a413 MZ |
1716 | if (hyp_idmap_start >= kern_hyp_va(PAGE_OFFSET) && |
1717 | hyp_idmap_start < kern_hyp_va(~0UL)) { | |
eac378a9 MZ |
1718 | /* |
1719 | * The idmap page is intersecting with the VA space, | |
1720 | * it is not safe to continue further. | |
1721 | */ | |
1722 | kvm_err("IDMAP intersecting with HYP VA, unable to continue\n"); | |
1723 | err = -EINVAL; | |
1724 | goto out; | |
1725 | } | |
1726 | ||
38f791a4 | 1727 | hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, hyp_pgd_order); |
0535a3e2 | 1728 | if (!hyp_pgd) { |
d5d8184d | 1729 | kvm_err("Hyp mode PGD not allocated\n"); |
2fb41059 MZ |
1730 | err = -ENOMEM; |
1731 | goto out; | |
1732 | } | |
1733 | ||
0535a3e2 MZ |
1734 | if (__kvm_cpu_uses_extended_idmap()) { |
1735 | boot_hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, | |
1736 | hyp_pgd_order); | |
1737 | if (!boot_hyp_pgd) { | |
1738 | kvm_err("Hyp boot PGD not allocated\n"); | |
1739 | err = -ENOMEM; | |
1740 | goto out; | |
1741 | } | |
2fb41059 | 1742 | |
0535a3e2 MZ |
1743 | err = kvm_map_idmap_text(boot_hyp_pgd); |
1744 | if (err) | |
1745 | goto out; | |
d5d8184d | 1746 | |
e4c5a685 AB |
1747 | merged_hyp_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO); |
1748 | if (!merged_hyp_pgd) { | |
1749 | kvm_err("Failed to allocate extra HYP pgd\n"); | |
1750 | goto out; | |
1751 | } | |
1752 | __kvm_extend_hypmap(boot_hyp_pgd, hyp_pgd, merged_hyp_pgd, | |
1753 | hyp_idmap_start); | |
0535a3e2 MZ |
1754 | } else { |
1755 | err = kvm_map_idmap_text(hyp_pgd); | |
1756 | if (err) | |
1757 | goto out; | |
5a677ce0 MZ |
1758 | } |
1759 | ||
d5d8184d | 1760 | return 0; |
2fb41059 | 1761 | out: |
4f728276 | 1762 | free_hyp_pgds(); |
2fb41059 | 1763 | return err; |
342cd0ab | 1764 | } |
df6ce24f EA |
1765 | |
1766 | void kvm_arch_commit_memory_region(struct kvm *kvm, | |
09170a49 | 1767 | const struct kvm_userspace_memory_region *mem, |
df6ce24f | 1768 | const struct kvm_memory_slot *old, |
f36f3f28 | 1769 | const struct kvm_memory_slot *new, |
df6ce24f EA |
1770 | enum kvm_mr_change change) |
1771 | { | |
c6473555 MS |
1772 | /* |
1773 | * At this point memslot has been committed and there is an | |
1774 | * allocated dirty_bitmap[], dirty pages will be be tracked while the | |
1775 | * memory slot is write protected. | |
1776 | */ | |
1777 | if (change != KVM_MR_DELETE && mem->flags & KVM_MEM_LOG_DIRTY_PAGES) | |
1778 | kvm_mmu_wp_memory_region(kvm, mem->slot); | |
df6ce24f EA |
1779 | } |
1780 | ||
1781 | int kvm_arch_prepare_memory_region(struct kvm *kvm, | |
1782 | struct kvm_memory_slot *memslot, | |
09170a49 | 1783 | const struct kvm_userspace_memory_region *mem, |
df6ce24f EA |
1784 | enum kvm_mr_change change) |
1785 | { | |
8eef9123 AB |
1786 | hva_t hva = mem->userspace_addr; |
1787 | hva_t reg_end = hva + mem->memory_size; | |
1788 | bool writable = !(mem->flags & KVM_MEM_READONLY); | |
1789 | int ret = 0; | |
1790 | ||
15a49a44 MS |
1791 | if (change != KVM_MR_CREATE && change != KVM_MR_MOVE && |
1792 | change != KVM_MR_FLAGS_ONLY) | |
8eef9123 AB |
1793 | return 0; |
1794 | ||
c3058d5d CD |
1795 | /* |
1796 | * Prevent userspace from creating a memory region outside of the IPA | |
1797 | * space addressable by the KVM guest IPA space. | |
1798 | */ | |
1799 | if (memslot->base_gfn + memslot->npages >= | |
1800 | (KVM_PHYS_SIZE >> PAGE_SHIFT)) | |
1801 | return -EFAULT; | |
1802 | ||
8eef9123 AB |
1803 | /* |
1804 | * A memory region could potentially cover multiple VMAs, and any holes | |
1805 | * between them, so iterate over all of them to find out if we can map | |
1806 | * any of them right now. | |
1807 | * | |
1808 | * +--------------------------------------------+ | |
1809 | * +---------------+----------------+ +----------------+ | |
1810 | * | : VMA 1 | VMA 2 | | VMA 3 : | | |
1811 | * +---------------+----------------+ +----------------+ | |
1812 | * | memory region | | |
1813 | * +--------------------------------------------+ | |
1814 | */ | |
1815 | do { | |
1816 | struct vm_area_struct *vma = find_vma(current->mm, hva); | |
1817 | hva_t vm_start, vm_end; | |
1818 | ||
1819 | if (!vma || vma->vm_start >= reg_end) | |
1820 | break; | |
1821 | ||
1822 | /* | |
1823 | * Mapping a read-only VMA is only allowed if the | |
1824 | * memory region is configured as read-only. | |
1825 | */ | |
1826 | if (writable && !(vma->vm_flags & VM_WRITE)) { | |
1827 | ret = -EPERM; | |
1828 | break; | |
1829 | } | |
1830 | ||
1831 | /* | |
1832 | * Take the intersection of this VMA with the memory region | |
1833 | */ | |
1834 | vm_start = max(hva, vma->vm_start); | |
1835 | vm_end = min(reg_end, vma->vm_end); | |
1836 | ||
1837 | if (vma->vm_flags & VM_PFNMAP) { | |
1838 | gpa_t gpa = mem->guest_phys_addr + | |
1839 | (vm_start - mem->userspace_addr); | |
ca09f02f MM |
1840 | phys_addr_t pa; |
1841 | ||
1842 | pa = (phys_addr_t)vma->vm_pgoff << PAGE_SHIFT; | |
1843 | pa += vm_start - vma->vm_start; | |
8eef9123 | 1844 | |
15a49a44 MS |
1845 | /* IO region dirty page logging not allowed */ |
1846 | if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES) | |
1847 | return -EINVAL; | |
1848 | ||
8eef9123 AB |
1849 | ret = kvm_phys_addr_ioremap(kvm, gpa, pa, |
1850 | vm_end - vm_start, | |
1851 | writable); | |
1852 | if (ret) | |
1853 | break; | |
1854 | } | |
1855 | hva = vm_end; | |
1856 | } while (hva < reg_end); | |
1857 | ||
15a49a44 MS |
1858 | if (change == KVM_MR_FLAGS_ONLY) |
1859 | return ret; | |
1860 | ||
849260c7 AB |
1861 | spin_lock(&kvm->mmu_lock); |
1862 | if (ret) | |
8eef9123 | 1863 | unmap_stage2_range(kvm, mem->guest_phys_addr, mem->memory_size); |
849260c7 AB |
1864 | else |
1865 | stage2_flush_memslot(kvm, memslot); | |
1866 | spin_unlock(&kvm->mmu_lock); | |
8eef9123 | 1867 | return ret; |
df6ce24f EA |
1868 | } |
1869 | ||
1870 | void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free, | |
1871 | struct kvm_memory_slot *dont) | |
1872 | { | |
1873 | } | |
1874 | ||
1875 | int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot, | |
1876 | unsigned long npages) | |
1877 | { | |
849260c7 AB |
1878 | /* |
1879 | * Readonly memslots are not incoherent with the caches by definition, | |
1880 | * but in practice, they are used mostly to emulate ROMs or NOR flashes | |
1881 | * that the guest may consider devices and hence map as uncached. | |
1882 | * To prevent incoherency issues in these cases, tag all readonly | |
1883 | * regions as incoherent. | |
1884 | */ | |
1885 | if (slot->flags & KVM_MEM_READONLY) | |
1886 | slot->flags |= KVM_MEMSLOT_INCOHERENT; | |
df6ce24f EA |
1887 | return 0; |
1888 | } | |
1889 | ||
15f46015 | 1890 | void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots) |
df6ce24f EA |
1891 | { |
1892 | } | |
1893 | ||
1894 | void kvm_arch_flush_shadow_all(struct kvm *kvm) | |
1895 | { | |
1896 | } | |
1897 | ||
1898 | void kvm_arch_flush_shadow_memslot(struct kvm *kvm, | |
1899 | struct kvm_memory_slot *slot) | |
1900 | { | |
8eef9123 AB |
1901 | gpa_t gpa = slot->base_gfn << PAGE_SHIFT; |
1902 | phys_addr_t size = slot->npages << PAGE_SHIFT; | |
1903 | ||
1904 | spin_lock(&kvm->mmu_lock); | |
1905 | unmap_stage2_range(kvm, gpa, size); | |
1906 | spin_unlock(&kvm->mmu_lock); | |
df6ce24f | 1907 | } |
3c1e7165 MZ |
1908 | |
1909 | /* | |
1910 | * See note at ARMv7 ARM B1.14.4 (TL;DR: S/W ops are not easily virtualized). | |
1911 | * | |
1912 | * Main problems: | |
1913 | * - S/W ops are local to a CPU (not broadcast) | |
1914 | * - We have line migration behind our back (speculation) | |
1915 | * - System caches don't support S/W at all (damn!) | |
1916 | * | |
1917 | * In the face of the above, the best we can do is to try and convert | |
1918 | * S/W ops to VA ops. Because the guest is not allowed to infer the | |
1919 | * S/W to PA mapping, it can only use S/W to nuke the whole cache, | |
1920 | * which is a rather good thing for us. | |
1921 | * | |
1922 | * Also, it is only used when turning caches on/off ("The expected | |
1923 | * usage of the cache maintenance instructions that operate by set/way | |
1924 | * is associated with the cache maintenance instructions associated | |
1925 | * with the powerdown and powerup of caches, if this is required by | |
1926 | * the implementation."). | |
1927 | * | |
1928 | * We use the following policy: | |
1929 | * | |
1930 | * - If we trap a S/W operation, we enable VM trapping to detect | |
1931 | * caches being turned on/off, and do a full clean. | |
1932 | * | |
1933 | * - We flush the caches on both caches being turned on and off. | |
1934 | * | |
1935 | * - Once the caches are enabled, we stop trapping VM ops. | |
1936 | */ | |
1937 | void kvm_set_way_flush(struct kvm_vcpu *vcpu) | |
1938 | { | |
1939 | unsigned long hcr = vcpu_get_hcr(vcpu); | |
1940 | ||
1941 | /* | |
1942 | * If this is the first time we do a S/W operation | |
1943 | * (i.e. HCR_TVM not set) flush the whole memory, and set the | |
1944 | * VM trapping. | |
1945 | * | |
1946 | * Otherwise, rely on the VM trapping to wait for the MMU + | |
1947 | * Caches to be turned off. At that point, we'll be able to | |
1948 | * clean the caches again. | |
1949 | */ | |
1950 | if (!(hcr & HCR_TVM)) { | |
1951 | trace_kvm_set_way_flush(*vcpu_pc(vcpu), | |
1952 | vcpu_has_cache_enabled(vcpu)); | |
1953 | stage2_flush_vm(vcpu->kvm); | |
1954 | vcpu_set_hcr(vcpu, hcr | HCR_TVM); | |
1955 | } | |
1956 | } | |
1957 | ||
1958 | void kvm_toggle_cache(struct kvm_vcpu *vcpu, bool was_enabled) | |
1959 | { | |
1960 | bool now_enabled = vcpu_has_cache_enabled(vcpu); | |
1961 | ||
1962 | /* | |
1963 | * If switching the MMU+caches on, need to invalidate the caches. | |
1964 | * If switching it off, need to clean the caches. | |
1965 | * Clean + invalidate does the trick always. | |
1966 | */ | |
1967 | if (now_enabled != was_enabled) | |
1968 | stage2_flush_vm(vcpu->kvm); | |
1969 | ||
1970 | /* Caches are now on, stop trapping VM ops (until a S/W op) */ | |
1971 | if (now_enabled) | |
1972 | vcpu_set_hcr(vcpu, vcpu_get_hcr(vcpu) & ~HCR_TVM); | |
1973 | ||
1974 | trace_kvm_toggle_cache(*vcpu_pc(vcpu), was_enabled, now_enabled); | |
1975 | } |