[mirror_ubuntu-jammy-kernel.git] / arch / arm / mach-ep93xx / ts72xx.c

/*
 * arch/arm/mach-ep93xx/ts72xx.c
 * Technologic Systems TS72xx SBC support.
 *
 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or (at
 * your option) any later version.
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/platform_data/spi-ep93xx.h>

#include <mach/gpio-ep93xx.h>
#include <mach/hardware.h>

#include <asm/mach-types.h>
#include <asm/mach/map.h>
#include <asm/mach/arch.h>

#include "soc.h"
#include "ts72xx.h"

static struct map_desc ts72xx_io_desc[] __initdata = {
	{
		.virtual	= (unsigned long)TS72XX_MODEL_VIRT_BASE,
		.pfn		= __phys_to_pfn(TS72XX_MODEL_PHYS_BASE),
		.length		= TS72XX_MODEL_SIZE,
		.type		= MT_DEVICE,
	}, {
		.virtual	= (unsigned long)TS72XX_OPTIONS_VIRT_BASE,
		.pfn		= __phys_to_pfn(TS72XX_OPTIONS_PHYS_BASE),
		.length		= TS72XX_OPTIONS_SIZE,
		.type		= MT_DEVICE,
	}, {
		.virtual	= (unsigned long)TS72XX_OPTIONS2_VIRT_BASE,
		.pfn		= __phys_to_pfn(TS72XX_OPTIONS2_PHYS_BASE),
		.length		= TS72XX_OPTIONS2_SIZE,
		.type		= MT_DEVICE,
	}
};

static void __init ts72xx_map_io(void)
{
	ep93xx_map_io();
	iotable_init(ts72xx_io_desc, ARRAY_SIZE(ts72xx_io_desc));
}


/*************************************************************************
 * NAND flash
 *************************************************************************/
#define TS72XX_NAND_CONTROL_ADDR_LINE	22	/* 0xN0400000 */
#define TS72XX_NAND_BUSY_ADDR_LINE	23	/* 0xN0800000 */

static void ts72xx_nand_hwcontrol(struct mtd_info *mtd,
				  int cmd, unsigned int ctrl)
{
	struct nand_chip *chip = mtd_to_nand(mtd);

	if (ctrl & NAND_CTRL_CHANGE) {
		void __iomem *addr = chip->IO_ADDR_R;
		unsigned char bits;

		addr += (1 << TS72XX_NAND_CONTROL_ADDR_LINE);

		bits = __raw_readb(addr) & ~0x07;
		bits |= (ctrl & NAND_NCE) << 2;	/* bit 0 -> bit 2 */
		bits |= (ctrl & NAND_CLE);	/* bit 1 -> bit 1 */
		bits |= (ctrl & NAND_ALE) >> 2;	/* bit 2 -> bit 0 */

		__raw_writeb(bits, addr);
	}

	if (cmd != NAND_CMD_NONE)
		__raw_writeb(cmd, chip->IO_ADDR_W);
}

static int ts72xx_nand_device_ready(struct mtd_info *mtd)
{
	struct nand_chip *chip = mtd_to_nand(mtd);
	void __iomem *addr = chip->IO_ADDR_R;

	addr += (1 << TS72XX_NAND_BUSY_ADDR_LINE);

	return !!(__raw_readb(addr) & 0x20);
}

#define TS72XX_BOOTROM_PART_SIZE	(SZ_16K)
#define TS72XX_REDBOOT_PART_SIZE	(SZ_2M + SZ_1M)

static struct mtd_partition ts72xx_nand_parts[] = {
	{
		.name		= "TS-BOOTROM",
		.offset		= 0,
		.size		= TS72XX_BOOTROM_PART_SIZE,
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	}, {
		.name		= "Linux",
		.offset		= MTDPART_OFS_RETAIN,
		.size		= TS72XX_REDBOOT_PART_SIZE,
				/* leave so much for last partition */
	}, {
		.name		= "RedBoot",
		.offset		= MTDPART_OFS_APPEND,
		.size		= MTDPART_SIZ_FULL,
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
};

static struct platform_nand_data ts72xx_nand_data = {
	.chip = {
		.nr_chips	= 1,
		.chip_offset	= 0,
		.chip_delay	= 15,
		.partitions	= ts72xx_nand_parts,
		.nr_partitions	= ARRAY_SIZE(ts72xx_nand_parts),
	},
	.ctrl = {
		.cmd_ctrl	= ts72xx_nand_hwcontrol,
		.dev_ready	= ts72xx_nand_device_ready,
	},
};

static struct resource ts72xx_nand_resource[] = {
	{
		.start		= 0,			/* filled in later */
		.end		= 0,			/* filled in later */
		.flags		= IORESOURCE_MEM,
	},
};

static struct platform_device ts72xx_nand_flash = {
	.name			= "gen_nand",
	.id			= -1,
	.dev.platform_data	= &ts72xx_nand_data,
	.resource		= ts72xx_nand_resource,
	.num_resources		= ARRAY_SIZE(ts72xx_nand_resource),
};


static void __init ts72xx_register_flash(void)
{
	/*
	 * TS7200 has NOR flash all other TS72xx board have NAND flash.
	 */
	if (board_is_ts7200()) {
		ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_16M);
	} else {
		resource_size_t start;

		if (is_ts9420_installed())
			start = EP93XX_CS7_PHYS_BASE;
		else
			start = EP93XX_CS6_PHYS_BASE;

		ts72xx_nand_resource[0].start = start;
		ts72xx_nand_resource[0].end = start + SZ_16M - 1;

		platform_device_register(&ts72xx_nand_flash);
	}
}

/*************************************************************************
 * RTC M48T86
 *************************************************************************/
#define TS72XX_RTC_INDEX_PHYS_BASE	(EP93XX_CS1_PHYS_BASE + 0x00800000)
#define TS72XX_RTC_DATA_PHYS_BASE	(EP93XX_CS1_PHYS_BASE + 0x01700000)

static struct resource ts72xx_rtc_resources[] = {
	DEFINE_RES_MEM(TS72XX_RTC_INDEX_PHYS_BASE, 0x01),
	DEFINE_RES_MEM(TS72XX_RTC_DATA_PHYS_BASE, 0x01),
};

static struct platform_device ts72xx_rtc_device = {
	.name		= "rtc-m48t86",
	.id		= -1,
	.resource	= ts72xx_rtc_resources,
	.num_resources 	= ARRAY_SIZE(ts72xx_rtc_resources),
};

/*************************************************************************
 * Watchdog (in CPLD)
 *************************************************************************/
#define TS72XX_WDT_CONTROL_PHYS_BASE	(EP93XX_CS2_PHYS_BASE + 0x03800000)
#define TS72XX_WDT_FEED_PHYS_BASE	(EP93XX_CS2_PHYS_BASE + 0x03c00000)

static struct resource ts72xx_wdt_resources[] = {
	DEFINE_RES_MEM(TS72XX_WDT_CONTROL_PHYS_BASE, 0x01),
	DEFINE_RES_MEM(TS72XX_WDT_FEED_PHYS_BASE, 0x01),
};

static struct platform_device ts72xx_wdt_device = {
	.name		= "ts72xx-wdt",
	.id		= -1,
	.resource	= ts72xx_wdt_resources,
	.num_resources	= ARRAY_SIZE(ts72xx_wdt_resources),
};

static struct ep93xx_eth_data __initdata ts72xx_eth_data = {
	.phy_id		= 1,
};

#if IS_ENABLED(CONFIG_FPGA_MGR_TS73XX)

/* Relative to EP93XX_CS1_PHYS_BASE */
#define TS73XX_FPGA_LOADER_BASE		0x03c00000

static struct resource ts73xx_fpga_resources[] = {
	{
		.start	= EP93XX_CS1_PHYS_BASE + TS73XX_FPGA_LOADER_BASE,
		.end	= EP93XX_CS1_PHYS_BASE + TS73XX_FPGA_LOADER_BASE + 1,
		.flags	= IORESOURCE_MEM,
	},
};

static struct platform_device ts73xx_fpga_device = {
	.name	= "ts73xx-fpga-mgr",
	.id	= -1,
	.resource = ts73xx_fpga_resources,
	.num_resources = ARRAY_SIZE(ts73xx_fpga_resources),
};

#endif

/*************************************************************************
 * SPI Bus
 *************************************************************************/
static struct spi_board_info ts72xx_spi_devices[] __initdata = {
	{
		.modalias		= "tmp122",
		.max_speed_hz		= 2 * 1000 * 1000,
		.bus_num		= 0,
		.chip_select		= 0,
	},
};

static int ts72xx_spi_chipselects[] __initdata = {
	EP93XX_GPIO_LINE_F(2),		/* DIO_17 */
};

static struct ep93xx_spi_info ts72xx_spi_info __initdata = {
	.chipselect	= ts72xx_spi_chipselects,
	.num_chipselect	= ARRAY_SIZE(ts72xx_spi_chipselects),
};

static void __init ts72xx_init_machine(void)
{
	ep93xx_init_devices();
	ts72xx_register_flash();
	platform_device_register(&ts72xx_rtc_device);
	platform_device_register(&ts72xx_wdt_device);

	ep93xx_register_eth(&ts72xx_eth_data, 1);
#if IS_ENABLED(CONFIG_FPGA_MGR_TS73XX)
	if (board_is_ts7300())
		platform_device_register(&ts73xx_fpga_device);
#endif
	ep93xx_register_spi(&ts72xx_spi_info, ts72xx_spi_devices,
			    ARRAY_SIZE(ts72xx_spi_devices));
}

MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
	/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
	.atag_offset	= 0x100,
	.map_io		= ts72xx_map_io,
	.init_irq	= ep93xx_init_irq,
	.init_time	= ep93xx_timer_init,
	.init_machine	= ts72xx_init_machine,
	.init_late	= ep93xx_init_late,
	.restart	= ep93xx_restart,
MACHINE_END
Commit	Line	Data
e7736d47 LB	1	/*
	2	* arch/arm/mach-ep93xx/ts72xx.c
	3	* Technologic Systems TS72xx SBC support.
	4	*
	5	* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or (at
	10	* your option) any later version.
	11	*/
	12
030d2dd4 HS	13	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
030d2dd4 HS	14
e7736d47 LB	15	#include <linux/kernel.h>
e7736d47 LB	16	#include <linux/init.h>
7ba01f97	17	#include <linux/platform_device.h>
fced80c7	18	#include <linux/io.h>
d4092d76	19	#include <linux/mtd/rawnand.h>
030d2dd4	20	#include <linux/mtd/partitions.h>
7aef828d HS	21	#include <linux/spi/spi.h>
7aef828d HS	22	#include <linux/platform_data/spi-ep93xx.h>
583ddafe	23
7aef828d	24	#include <mach/gpio-ep93xx.h>
a09e64fb	25	#include <mach/hardware.h>
583ddafe	26
e7736d47	27	#include <asm/mach-types.h>
e7736d47	28	#include <asm/mach/map.h>
583ddafe HS	29	#include <asm/mach/arch.h>
583ddafe HS	30
258249ec	31	#include "soc.h"
e4d4a902	32	#include "ts72xx.h"
e7736d47 LB	33
	34	static struct map_desc ts72xx_io_desc[] __initdata = {
	35	{
29fe651f	36	.virtual = (unsigned long)TS72XX_MODEL_VIRT_BASE,
e7736d47 LB	37	.pfn = __phys_to_pfn(TS72XX_MODEL_PHYS_BASE),
	38	.length = TS72XX_MODEL_SIZE,
	39	.type = MT_DEVICE,
	40	}, {
29fe651f	41	.virtual = (unsigned long)TS72XX_OPTIONS_VIRT_BASE,
e7736d47 LB	42	.pfn = __phys_to_pfn(TS72XX_OPTIONS_PHYS_BASE),
	43	.length = TS72XX_OPTIONS_SIZE,
	44	.type = MT_DEVICE,
	45	}, {
29fe651f	46	.virtual = (unsigned long)TS72XX_OPTIONS2_VIRT_BASE,
e7736d47 LB	47	.pfn = __phys_to_pfn(TS72XX_OPTIONS2_PHYS_BASE),
	48	.length = TS72XX_OPTIONS2_SIZE,
	49	.type = MT_DEVICE,
	50	}
	51	};
	52
030d2dd4 HS	53	static void __init ts72xx_map_io(void)
	54	{
	55	ep93xx_map_io();
	56	iotable_init(ts72xx_io_desc, ARRAY_SIZE(ts72xx_io_desc));
	57	}
	58
	59
	60	/*************************************************************************
	61	* NAND flash
	62	*************************************************************************/
	63	#define TS72XX_NAND_CONTROL_ADDR_LINE 22 /* 0xN0400000 */
	64	#define TS72XX_NAND_BUSY_ADDR_LINE 23 /* 0xN0800000 */
	65
	66	static void ts72xx_nand_hwcontrol(struct mtd_info *mtd,
	67	int cmd, unsigned int ctrl)
	68	{
c993e095	69	struct nand_chip *chip = mtd_to_nand(mtd);
030d2dd4 HS	70
	71	if (ctrl & NAND_CTRL_CHANGE) {
	72	void __iomem *addr = chip->IO_ADDR_R;
	73	unsigned char bits;
	74
	75	addr += (1 << TS72XX_NAND_CONTROL_ADDR_LINE);
	76
	77	bits = __raw_readb(addr) & ~0x07;
	78	bits \|= (ctrl & NAND_NCE) << 2; /* bit 0 -> bit 2 */
	79	bits \|= (ctrl & NAND_CLE); /* bit 1 -> bit 1 */
	80	bits \|= (ctrl & NAND_ALE) >> 2; /* bit 2 -> bit 0 */
	81
	82	__raw_writeb(bits, addr);
e7736d47	83	}
e7736d47	84
030d2dd4 HS	85	if (cmd != NAND_CMD_NONE)
	86	__raw_writeb(cmd, chip->IO_ADDR_W);
	87	}
	88
	89	static int ts72xx_nand_device_ready(struct mtd_info *mtd)
	90	{
c993e095	91	struct nand_chip *chip = mtd_to_nand(mtd);
030d2dd4 HS	92	void __iomem *addr = chip->IO_ADDR_R;
	93
	94	addr += (1 << TS72XX_NAND_BUSY_ADDR_LINE);
	95
	96	return !!(__raw_readb(addr) & 0x20);
	97	}
	98
030d2dd4 HS	99	#define TS72XX_BOOTROM_PART_SIZE (SZ_16K)
	100	#define TS72XX_REDBOOT_PART_SIZE (SZ_2M + SZ_1M)
	101
	102	static struct mtd_partition ts72xx_nand_parts[] = {
e7736d47	103	{
030d2dd4 HS	104	.name = "TS-BOOTROM",
	105	.offset = 0,
	106	.size = TS72XX_BOOTROM_PART_SIZE,
	107	.mask_flags = MTD_WRITEABLE, /* force read-only */
e7736d47	108	}, {
030d2dd4	109	.name = "Linux",
78dd9e35 DB	110	.offset = MTDPART_OFS_RETAIN,
	111	.size = TS72XX_REDBOOT_PART_SIZE,
	112	/* leave so much for last partition */
e7736d47	113	}, {
030d2dd4 HS	114	.name = "RedBoot",
	115	.offset = MTDPART_OFS_APPEND,
	116	.size = MTDPART_SIZ_FULL,
	117	.mask_flags = MTD_WRITEABLE, /* force read-only */
	118	},
e7736d47 LB	119	};
e7736d47 LB	120
030d2dd4 HS	121	static struct platform_nand_data ts72xx_nand_data = {
	122	.chip = {
	123	.nr_chips = 1,
	124	.chip_offset = 0,
	125	.chip_delay = 15,
78dd9e35 DB	126	.partitions = ts72xx_nand_parts,
78dd9e35 DB	127	.nr_partitions = ARRAY_SIZE(ts72xx_nand_parts),
030d2dd4 HS	128	},
	129	.ctrl = {
	130	.cmd_ctrl = ts72xx_nand_hwcontrol,
	131	.dev_ready = ts72xx_nand_device_ready,
	132	},
	133	};
	134
	135	static struct resource ts72xx_nand_resource[] = {
	136	{
	137	.start = 0, /* filled in later */
	138	.end = 0, /* filled in later */
	139	.flags = IORESOURCE_MEM,
	140	},
	141	};
	142
	143	static struct platform_device ts72xx_nand_flash = {
	144	.name = "gen_nand",
	145	.id = -1,
	146	.dev.platform_data = &ts72xx_nand_data,
	147	.resource = ts72xx_nand_resource,
	148	.num_resources = ARRAY_SIZE(ts72xx_nand_resource),
	149	};
	150
	151
3174c88a HS	152	static void __init ts72xx_register_flash(void)
3174c88a HS	153	{
16bcf78f HS	154	/*
	155	* TS7200 has NOR flash all other TS72xx board have NAND flash.
	156	*/
030d2dd4	157	if (board_is_ts7200()) {
16bcf78f	158	ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_16M);
030d2dd4 HS	159	} else {
	160	resource_size_t start;
	161
	162	if (is_ts9420_installed())
	163	start = EP93XX_CS7_PHYS_BASE;
	164	else
	165	start = EP93XX_CS6_PHYS_BASE;
	166
	167	ts72xx_nand_resource[0].start = start;
	168	ts72xx_nand_resource[0].end = start + SZ_16M - 1;
	169
	170	platform_device_register(&ts72xx_nand_flash);
	171	}
3174c88a HS	172	}
3174c88a HS	173
5594e88a HS	174	/*************************************************************************
	175	* RTC M48T86
	176	*************************************************************************/
	177	#define TS72XX_RTC_INDEX_PHYS_BASE (EP93XX_CS1_PHYS_BASE + 0x00800000)
	178	#define TS72XX_RTC_DATA_PHYS_BASE (EP93XX_CS1_PHYS_BASE + 0x01700000)
030d2dd4	179
5594e88a HS	180	static struct resource ts72xx_rtc_resources[] = {
	181	DEFINE_RES_MEM(TS72XX_RTC_INDEX_PHYS_BASE, 0x01),
	182	DEFINE_RES_MEM(TS72XX_RTC_DATA_PHYS_BASE, 0x01),
7ba01f97 LB	183	};
	184
	185	static struct platform_device ts72xx_rtc_device = {
e48f3fa3 HS	186	.name = "rtc-m48t86",
e48f3fa3 HS	187	.id = -1,
5594e88a HS	188	.resource = ts72xx_rtc_resources,
5594e88a HS	189	.num_resources = ARRAY_SIZE(ts72xx_rtc_resources),
7ba01f97 LB	190	};
7ba01f97 LB	191
97c3bca9 HS	192	/*************************************************************************
	193	* Watchdog (in CPLD)
	194	*************************************************************************/
	195	#define TS72XX_WDT_CONTROL_PHYS_BASE (EP93XX_CS2_PHYS_BASE + 0x03800000)
	196	#define TS72XX_WDT_FEED_PHYS_BASE (EP93XX_CS2_PHYS_BASE + 0x03c00000)
	197
12926dc4	198	static struct resource ts72xx_wdt_resources[] = {
97c3bca9 HS	199	DEFINE_RES_MEM(TS72XX_WDT_CONTROL_PHYS_BASE, 0x01),
97c3bca9 HS	200	DEFINE_RES_MEM(TS72XX_WDT_FEED_PHYS_BASE, 0x01),
12926dc4 MW	201	};
	202
	203	static struct platform_device ts72xx_wdt_device = {
	204	.name = "ts72xx-wdt",
	205	.id = -1,
12926dc4	206	.resource = ts72xx_wdt_resources,
97c3bca9	207	.num_resources = ARRAY_SIZE(ts72xx_wdt_resources),
12926dc4 MW	208	};
12926dc4 MW	209
b370e082	210	static struct ep93xx_eth_data __initdata ts72xx_eth_data = {
e48f3fa3	211	.phy_id = 1,
730ee9f3 LB	212	};
730ee9f3 LB	213
f677e0f3 FF	214	#if IS_ENABLED(CONFIG_FPGA_MGR_TS73XX)
	215
	216	/* Relative to EP93XX_CS1_PHYS_BASE */
	217	#define TS73XX_FPGA_LOADER_BASE 0x03c00000
	218
	219	static struct resource ts73xx_fpga_resources[] = {
	220	{
	221	.start = EP93XX_CS1_PHYS_BASE + TS73XX_FPGA_LOADER_BASE,
	222	.end = EP93XX_CS1_PHYS_BASE + TS73XX_FPGA_LOADER_BASE + 1,
	223	.flags = IORESOURCE_MEM,
	224	},
	225	};
	226
	227	static struct platform_device ts73xx_fpga_device = {
	228	.name = "ts73xx-fpga-mgr",
	229	.id = -1,
	230	.resource = ts73xx_fpga_resources,
	231	.num_resources = ARRAY_SIZE(ts73xx_fpga_resources),
	232	};
	233
	234	#endif
	235
7aef828d HS	236	/*************************************************************************
	237	* SPI Bus
	238	*************************************************************************/
	239	static struct spi_board_info ts72xx_spi_devices[] __initdata = {
	240	{
	241	.modalias = "tmp122",
	242	.max_speed_hz = 2 * 1000 * 1000,
	243	.bus_num = 0,
	244	.chip_select = 0,
	245	},
	246	};
	247
	248	static int ts72xx_spi_chipselects[] __initdata = {
	249	EP93XX_GPIO_LINE_F(2), /* DIO_17 */
	250	};
	251
	252	static struct ep93xx_spi_info ts72xx_spi_info __initdata = {
	253	.chipselect = ts72xx_spi_chipselects,
	254	.num_chipselect = ARRAY_SIZE(ts72xx_spi_chipselects),
	255	};
	256
e7736d47 LB	257	static void __init ts72xx_init_machine(void)
	258	{
	259	ep93xx_init_devices();
3174c88a	260	ts72xx_register_flash();
7ba01f97	261	platform_device_register(&ts72xx_rtc_device);
12926dc4	262	platform_device_register(&ts72xx_wdt_device);
730ee9f3	263
a0a08fdc	264	ep93xx_register_eth(&ts72xx_eth_data, 1);
f677e0f3 FF	265	#if IS_ENABLED(CONFIG_FPGA_MGR_TS73XX)
	266	if (board_is_ts7300())
	267	platform_device_register(&ts73xx_fpga_device);
	268	#endif
7aef828d HS	269	ep93xx_register_spi(&ts72xx_spi_info, ts72xx_spi_devices,
7aef828d HS	270	ARRAY_SIZE(ts72xx_spi_devices));
e7736d47 LB	271	}
	272
	273	MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
	274	/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
e562cf17	275	.atag_offset = 0x100,
e7736d47 LB	276	.map_io = ts72xx_map_io,
e7736d47 LB	277	.init_irq = ep93xx_init_irq,
6bb27d73	278	.init_time = ep93xx_timer_init,
e7736d47	279	.init_machine = ts72xx_init_machine,
c914283f	280	.init_late = ep93xx_init_late,
3275166e	281	.restart = ep93xx_restart,
e7736d47	282	MACHINE_END