[mirror_ubuntu-jammy-kernel.git] / arch / arm / mach-ep93xx / ts72xx.c

/*
 * arch/arm/mach-ep93xx/ts72xx.c
 * Technologic Systems TS72xx SBC support.
 *
 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or (at
 * your option) any later version.
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/mtd/platnand.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#include <linux/spi/mmc_spi.h>
#include <linux/mmc/host.h>
#include <linux/platform_data/spi-ep93xx.h>
#include <linux/gpio/machine.h>

#include "gpio-ep93xx.h"
#include "hardware.h"
#include <mach/irqs.h>

#include <asm/mach-types.h>
#include <asm/mach/map.h>
#include <asm/mach/arch.h>

#include "soc.h"
#include "ts72xx.h"

/*************************************************************************
 * IO map
 *************************************************************************/
static struct map_desc ts72xx_io_desc[] __initdata = {
	{
		.virtual	= (unsigned long)TS72XX_MODEL_VIRT_BASE,
		.pfn		= __phys_to_pfn(TS72XX_MODEL_PHYS_BASE),
		.length		= TS72XX_MODEL_SIZE,
		.type		= MT_DEVICE,
	}, {
		.virtual	= (unsigned long)TS72XX_OPTIONS_VIRT_BASE,
		.pfn		= __phys_to_pfn(TS72XX_OPTIONS_PHYS_BASE),
		.length		= TS72XX_OPTIONS_SIZE,
		.type		= MT_DEVICE,
	}, {
		.virtual	= (unsigned long)TS72XX_OPTIONS2_VIRT_BASE,
		.pfn		= __phys_to_pfn(TS72XX_OPTIONS2_PHYS_BASE),
		.length		= TS72XX_OPTIONS2_SIZE,
		.type		= MT_DEVICE,
	}, {
		.virtual	= (unsigned long)TS72XX_CPLDVER_VIRT_BASE,
		.pfn		= __phys_to_pfn(TS72XX_CPLDVER_PHYS_BASE),
		.length		= TS72XX_CPLDVER_SIZE,
		.type		= MT_DEVICE,
	}
};

static void __init ts72xx_map_io(void)
{
	ep93xx_map_io();
	iotable_init(ts72xx_io_desc, ARRAY_SIZE(ts72xx_io_desc));
}


/*************************************************************************
 * NAND flash
 *************************************************************************/
#define TS72XX_NAND_CONTROL_ADDR_LINE	22	/* 0xN0400000 */
#define TS72XX_NAND_BUSY_ADDR_LINE	23	/* 0xN0800000 */

static void ts72xx_nand_hwcontrol(struct nand_chip *chip,
				  int cmd, unsigned int ctrl)
{
	if (ctrl & NAND_CTRL_CHANGE) {
		void __iomem *addr = chip->legacy.IO_ADDR_R;
		unsigned char bits;

		addr += (1 << TS72XX_NAND_CONTROL_ADDR_LINE);

		bits = __raw_readb(addr) & ~0x07;
		bits |= (ctrl & NAND_NCE) << 2;	/* bit 0 -> bit 2 */
		bits |= (ctrl & NAND_CLE);	/* bit 1 -> bit 1 */
		bits |= (ctrl & NAND_ALE) >> 2;	/* bit 2 -> bit 0 */

		__raw_writeb(bits, addr);
	}

	if (cmd != NAND_CMD_NONE)
		__raw_writeb(cmd, chip->legacy.IO_ADDR_W);
}

static int ts72xx_nand_device_ready(struct nand_chip *chip)
{
	void __iomem *addr = chip->legacy.IO_ADDR_R;

	addr += (1 << TS72XX_NAND_BUSY_ADDR_LINE);

	return !!(__raw_readb(addr) & 0x20);
}

#define TS72XX_BOOTROM_PART_SIZE	(SZ_16K)
#define TS72XX_REDBOOT_PART_SIZE	(SZ_2M + SZ_1M)

static struct mtd_partition ts72xx_nand_parts[] = {
	{
		.name		= "TS-BOOTROM",
		.offset		= 0,
		.size		= TS72XX_BOOTROM_PART_SIZE,
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	}, {
		.name		= "Linux",
		.offset		= MTDPART_OFS_RETAIN,
		.size		= TS72XX_REDBOOT_PART_SIZE,
				/* leave so much for last partition */
	}, {
		.name		= "RedBoot",
		.offset		= MTDPART_OFS_APPEND,
		.size		= MTDPART_SIZ_FULL,
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
};

static struct platform_nand_data ts72xx_nand_data = {
	.chip = {
		.nr_chips	= 1,
		.chip_offset	= 0,
		.chip_delay	= 15,
	},
	.ctrl = {
		.cmd_ctrl	= ts72xx_nand_hwcontrol,
		.dev_ready	= ts72xx_nand_device_ready,
	},
};

static struct resource ts72xx_nand_resource[] = {
	{
		.start		= 0,			/* filled in later */
		.end		= 0,			/* filled in later */
		.flags		= IORESOURCE_MEM,
	},
};

static struct platform_device ts72xx_nand_flash = {
	.name			= "gen_nand",
	.id			= -1,
	.dev.platform_data	= &ts72xx_nand_data,
	.resource		= ts72xx_nand_resource,
	.num_resources		= ARRAY_SIZE(ts72xx_nand_resource),
};

void __init ts72xx_register_flash(struct mtd_partition *parts, int n,
				  resource_size_t start)
{
	/*
	 * TS7200 has NOR flash all other TS72xx board have NAND flash.
	 */
	if (board_is_ts7200()) {
		ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_16M);
	} else {
		ts72xx_nand_resource[0].start = start;
		ts72xx_nand_resource[0].end = start + SZ_16M - 1;

		ts72xx_nand_data.chip.partitions = parts;
		ts72xx_nand_data.chip.nr_partitions = n;

		platform_device_register(&ts72xx_nand_flash);
	}
}

/*************************************************************************
 * RTC M48T86
 *************************************************************************/
#define TS72XX_RTC_INDEX_PHYS_BASE	(EP93XX_CS1_PHYS_BASE + 0x00800000)
#define TS72XX_RTC_DATA_PHYS_BASE	(EP93XX_CS1_PHYS_BASE + 0x01700000)

static struct resource ts72xx_rtc_resources[] = {
	DEFINE_RES_MEM(TS72XX_RTC_INDEX_PHYS_BASE, 0x01),
	DEFINE_RES_MEM(TS72XX_RTC_DATA_PHYS_BASE, 0x01),
};

static struct platform_device ts72xx_rtc_device = {
	.name		= "rtc-m48t86",
	.id		= -1,
	.resource	= ts72xx_rtc_resources,
	.num_resources 	= ARRAY_SIZE(ts72xx_rtc_resources),
};

/*************************************************************************
 * Watchdog (in CPLD)
 *************************************************************************/
#define TS72XX_WDT_CONTROL_PHYS_BASE	(EP93XX_CS2_PHYS_BASE + 0x03800000)
#define TS72XX_WDT_FEED_PHYS_BASE	(EP93XX_CS2_PHYS_BASE + 0x03c00000)

static struct resource ts72xx_wdt_resources[] = {
	DEFINE_RES_MEM(TS72XX_WDT_CONTROL_PHYS_BASE, 0x01),
	DEFINE_RES_MEM(TS72XX_WDT_FEED_PHYS_BASE, 0x01),
};

static struct platform_device ts72xx_wdt_device = {
	.name		= "ts72xx-wdt",
	.id		= -1,
	.resource	= ts72xx_wdt_resources,
	.num_resources	= ARRAY_SIZE(ts72xx_wdt_resources),
};

/*************************************************************************
 * ETH
 *************************************************************************/
static struct ep93xx_eth_data __initdata ts72xx_eth_data = {
	.phy_id		= 1,
};

/*************************************************************************
 * SPI SD/MMC host
 *************************************************************************/
#define BK3_EN_SDCARD_PHYS_BASE         0x12400000
#define BK3_EN_SDCARD_PWR 0x0
#define BK3_DIS_SDCARD_PWR 0x0C
static void bk3_mmc_spi_setpower(struct device *dev, unsigned int vdd)
{
	void __iomem *pwr_sd = ioremap(BK3_EN_SDCARD_PHYS_BASE, SZ_4K);

	if (!pwr_sd) {
		pr_err("Failed to enable SD card power!");
		return;
	}

	pr_debug("%s: SD card pwr %s VDD:0x%x\n", __func__,
		 !!vdd ? "ON" : "OFF", vdd);

	if (!!vdd)
		__raw_writeb(BK3_EN_SDCARD_PWR, pwr_sd);
	else
		__raw_writeb(BK3_DIS_SDCARD_PWR, pwr_sd);

	iounmap(pwr_sd);
}

static struct mmc_spi_platform_data bk3_spi_mmc_data = {
	.detect_delay	= 500,
	.powerup_msecs	= 100,
	.ocr_mask	= MMC_VDD_32_33 | MMC_VDD_33_34,
	.caps		= MMC_CAP_NONREMOVABLE,
	.setpower       = bk3_mmc_spi_setpower,
};

/*************************************************************************
 * SPI Bus - SD card access
 *************************************************************************/
static struct spi_board_info bk3_spi_board_info[] __initdata = {
	{
		.modalias		= "mmc_spi",
		.platform_data		= &bk3_spi_mmc_data,
		.max_speed_hz		= 7.4E6,
		.bus_num		= 0,
		.chip_select		= 0,
		.mode			= SPI_MODE_0,
	},
};

/*
 * This is a stub -> the FGPIO[3] pin is not connected on the schematic
 * The all work is performed automatically by !SPI_FRAME (SFRM1) and
 * goes through CPLD
 */
static struct gpiod_lookup_table bk3_spi_cs_gpio_table = {
	.dev_id = "ep93xx-spi.0",
	.table = {
		GPIO_LOOKUP("F", 3, "cs", GPIO_ACTIVE_LOW),
		{ },
	},
};

static struct ep93xx_spi_info bk3_spi_master __initdata = {
	.use_dma	= 1,
};

/*************************************************************************
 * TS72XX support code
 *************************************************************************/
#if IS_ENABLED(CONFIG_FPGA_MGR_TS73XX)

/* Relative to EP93XX_CS1_PHYS_BASE */
#define TS73XX_FPGA_LOADER_BASE		0x03c00000

static struct resource ts73xx_fpga_resources[] = {
	{
		.start	= EP93XX_CS1_PHYS_BASE + TS73XX_FPGA_LOADER_BASE,
		.end	= EP93XX_CS1_PHYS_BASE + TS73XX_FPGA_LOADER_BASE + 1,
		.flags	= IORESOURCE_MEM,
	},
};

static struct platform_device ts73xx_fpga_device = {
	.name	= "ts73xx-fpga-mgr",
	.id	= -1,
	.resource = ts73xx_fpga_resources,
	.num_resources = ARRAY_SIZE(ts73xx_fpga_resources),
};

#endif

/*************************************************************************
 * SPI Bus
 *************************************************************************/
static struct spi_board_info ts72xx_spi_devices[] __initdata = {
	{
		.modalias		= "tmp122",
		.max_speed_hz		= 2 * 1000 * 1000,
		.bus_num		= 0,
		.chip_select		= 0,
	},
};

static struct gpiod_lookup_table ts72xx_spi_cs_gpio_table = {
	.dev_id = "ep93xx-spi.0",
	.table = {
		/* DIO_17 */
		GPIO_LOOKUP("F", 2, "cs", GPIO_ACTIVE_LOW),
		{ },
	},
};

static struct ep93xx_spi_info ts72xx_spi_info __initdata = {
	/* Intentionally left blank */
};

static void __init ts72xx_init_machine(void)
{
	ep93xx_init_devices();
	ts72xx_register_flash(ts72xx_nand_parts, ARRAY_SIZE(ts72xx_nand_parts),
			      is_ts9420_installed() ?
			      EP93XX_CS7_PHYS_BASE : EP93XX_CS6_PHYS_BASE);
	platform_device_register(&ts72xx_rtc_device);
	platform_device_register(&ts72xx_wdt_device);

	ep93xx_register_eth(&ts72xx_eth_data, 1);
#if IS_ENABLED(CONFIG_FPGA_MGR_TS73XX)
	if (board_is_ts7300())
		platform_device_register(&ts73xx_fpga_device);
#endif
	gpiod_add_lookup_table(&ts72xx_spi_cs_gpio_table);
	ep93xx_register_spi(&ts72xx_spi_info, ts72xx_spi_devices,
			    ARRAY_SIZE(ts72xx_spi_devices));
}

MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
	/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
	.atag_offset	= 0x100,
	.map_io		= ts72xx_map_io,
	.init_irq	= ep93xx_init_irq,
	.init_time	= ep93xx_timer_init,
	.init_machine	= ts72xx_init_machine,
	.init_late	= ep93xx_init_late,
	.restart	= ep93xx_restart,
MACHINE_END

/*************************************************************************
 * EP93xx I2S audio peripheral handling
 *************************************************************************/
static struct resource ep93xx_i2s_resource[] = {
	DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),
	DEFINE_RES_IRQ_NAMED(IRQ_EP93XX_SAI, "spilink i2s slave"),
};

static struct platform_device ep93xx_i2s_device = {
	.name		= "ep93xx-spilink-i2s",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(ep93xx_i2s_resource),
	.resource	= ep93xx_i2s_resource,
};

/*************************************************************************
 * BK3 support code
 *************************************************************************/
static struct mtd_partition bk3_nand_parts[] = {
	{
		.name		= "System",
		.offset	= 0x00000000,
		.size		= 0x01e00000,
	}, {
		.name		= "Data",
		.offset	= 0x01e00000,
		.size		= 0x05f20000
	}, {
		.name		= "RedBoot",
		.offset	= 0x07d20000,
		.size		= 0x002e0000,
		.mask_flags	= MTD_WRITEABLE,	/* force RO */
	},
};

static void __init bk3_init_machine(void)
{
	ep93xx_init_devices();

	ts72xx_register_flash(bk3_nand_parts, ARRAY_SIZE(bk3_nand_parts),
			      EP93XX_CS6_PHYS_BASE);

	ep93xx_register_eth(&ts72xx_eth_data, 1);

	gpiod_add_lookup_table(&bk3_spi_cs_gpio_table);
	ep93xx_register_spi(&bk3_spi_master, bk3_spi_board_info,
			    ARRAY_SIZE(bk3_spi_board_info));

	/* Configure ep93xx's I2S to use AC97 pins */
	ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
	platform_device_register(&ep93xx_i2s_device);
}

MACHINE_START(BK3, "Liebherr controller BK3.1")
	/* Maintainer: Lukasz Majewski <lukma@denx.de> */
	.atag_offset	= 0x100,
	.map_io		= ts72xx_map_io,
	.init_irq	= ep93xx_init_irq,
	.init_time	= ep93xx_timer_init,
	.init_machine	= bk3_init_machine,
	.init_late	= ep93xx_init_late,
	.restart	= ep93xx_restart,
MACHINE_END
Commit	Line	Data
e7736d47 LB	1	/*
	2	* arch/arm/mach-ep93xx/ts72xx.c
	3	* Technologic Systems TS72xx SBC support.
	4	*
	5	* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or (at
	10	* your option) any later version.
	11	*/
	12
030d2dd4 HS	13	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
030d2dd4 HS	14
e7736d47 LB	15	#include <linux/kernel.h>
e7736d47 LB	16	#include <linux/init.h>
7ba01f97	17	#include <linux/platform_device.h>
fced80c7	18	#include <linux/io.h>
c7921bb3	19	#include <linux/mtd/platnand.h>
7aef828d	20	#include <linux/spi/spi.h>
c8cee359 LM	21	#include <linux/spi/flash.h>
	22	#include <linux/spi/mmc_spi.h>
	23	#include <linux/mmc/host.h>
7aef828d	24	#include <linux/platform_data/spi-ep93xx.h>
1dfbf334	25	#include <linux/gpio/machine.h>
583ddafe	26
5b7cc904 AB	27	#include "gpio-ep93xx.h"
5b7cc904 AB	28	#include "hardware.h"
c8cee359	29	#include <mach/irqs.h>
583ddafe	30
e7736d47	31	#include <asm/mach-types.h>
e7736d47	32	#include <asm/mach/map.h>
583ddafe HS	33	#include <asm/mach/arch.h>
583ddafe HS	34
258249ec	35	#include "soc.h"
e4d4a902	36	#include "ts72xx.h"
e7736d47	37
e41f1e85 LM	38	/*************************************************************************
	39	* IO map
	40	*************************************************************************/
e7736d47 LB	41	static struct map_desc ts72xx_io_desc[] __initdata = {
e7736d47 LB	42	{
29fe651f	43	.virtual = (unsigned long)TS72XX_MODEL_VIRT_BASE,
e7736d47 LB	44	.pfn = __phys_to_pfn(TS72XX_MODEL_PHYS_BASE),
	45	.length = TS72XX_MODEL_SIZE,
	46	.type = MT_DEVICE,
	47	}, {
29fe651f	48	.virtual = (unsigned long)TS72XX_OPTIONS_VIRT_BASE,
e7736d47 LB	49	.pfn = __phys_to_pfn(TS72XX_OPTIONS_PHYS_BASE),
	50	.length = TS72XX_OPTIONS_SIZE,
	51	.type = MT_DEVICE,
	52	}, {
29fe651f	53	.virtual = (unsigned long)TS72XX_OPTIONS2_VIRT_BASE,
e7736d47 LB	54	.pfn = __phys_to_pfn(TS72XX_OPTIONS2_PHYS_BASE),
	55	.length = TS72XX_OPTIONS2_SIZE,
	56	.type = MT_DEVICE,
c8cee359 LM	57	}, {
	58	.virtual = (unsigned long)TS72XX_CPLDVER_VIRT_BASE,
	59	.pfn = __phys_to_pfn(TS72XX_CPLDVER_PHYS_BASE),
	60	.length = TS72XX_CPLDVER_SIZE,
	61	.type = MT_DEVICE,
e7736d47 LB	62	}
	63	};
	64
030d2dd4 HS	65	static void __init ts72xx_map_io(void)
	66	{
	67	ep93xx_map_io();
	68	iotable_init(ts72xx_io_desc, ARRAY_SIZE(ts72xx_io_desc));
	69	}
	70
	71
	72	/*************************************************************************
	73	* NAND flash
	74	*************************************************************************/
	75	#define TS72XX_NAND_CONTROL_ADDR_LINE 22 /* 0xN0400000 */
	76	#define TS72XX_NAND_BUSY_ADDR_LINE 23 /* 0xN0800000 */
	77
47bd59e5	78	static void ts72xx_nand_hwcontrol(struct nand_chip *chip,
030d2dd4 HS	79	int cmd, unsigned int ctrl)
030d2dd4 HS	80	{
030d2dd4	81	if (ctrl & NAND_CTRL_CHANGE) {
82fc5099	82	void __iomem *addr = chip->legacy.IO_ADDR_R;
030d2dd4 HS	83	unsigned char bits;
	84
	85	addr += (1 << TS72XX_NAND_CONTROL_ADDR_LINE);
	86
	87	bits = __raw_readb(addr) & ~0x07;
	88	bits \|= (ctrl & NAND_NCE) << 2; /* bit 0 -> bit 2 */
	89	bits \|= (ctrl & NAND_CLE); /* bit 1 -> bit 1 */
	90	bits \|= (ctrl & NAND_ALE) >> 2; /* bit 2 -> bit 0 */
	91
	92	__raw_writeb(bits, addr);
e7736d47	93	}
e7736d47	94
030d2dd4	95	if (cmd != NAND_CMD_NONE)
82fc5099	96	__raw_writeb(cmd, chip->legacy.IO_ADDR_W);
030d2dd4 HS	97	}
030d2dd4 HS	98
47bd59e5	99	static int ts72xx_nand_device_ready(struct nand_chip *chip)
030d2dd4	100	{
82fc5099	101	void __iomem *addr = chip->legacy.IO_ADDR_R;
030d2dd4 HS	102
	103	addr += (1 << TS72XX_NAND_BUSY_ADDR_LINE);
	104
	105	return !!(__raw_readb(addr) & 0x20);
	106	}
	107
030d2dd4 HS	108	#define TS72XX_BOOTROM_PART_SIZE (SZ_16K)
	109	#define TS72XX_REDBOOT_PART_SIZE (SZ_2M + SZ_1M)
	110
	111	static struct mtd_partition ts72xx_nand_parts[] = {
e7736d47	112	{
030d2dd4 HS	113	.name = "TS-BOOTROM",
	114	.offset = 0,
	115	.size = TS72XX_BOOTROM_PART_SIZE,
	116	.mask_flags = MTD_WRITEABLE, /* force read-only */
e7736d47	117	}, {
030d2dd4	118	.name = "Linux",
78dd9e35 DB	119	.offset = MTDPART_OFS_RETAIN,
	120	.size = TS72XX_REDBOOT_PART_SIZE,
	121	/* leave so much for last partition */
e7736d47	122	}, {
030d2dd4 HS	123	.name = "RedBoot",
	124	.offset = MTDPART_OFS_APPEND,
	125	.size = MTDPART_SIZ_FULL,
	126	.mask_flags = MTD_WRITEABLE, /* force read-only */
	127	},
e7736d47 LB	128	};
e7736d47 LB	129
030d2dd4 HS	130	static struct platform_nand_data ts72xx_nand_data = {
	131	.chip = {
	132	.nr_chips = 1,
	133	.chip_offset = 0,
	134	.chip_delay = 15,
030d2dd4 HS	135	},
	136	.ctrl = {
	137	.cmd_ctrl = ts72xx_nand_hwcontrol,
	138	.dev_ready = ts72xx_nand_device_ready,
	139	},
	140	};
	141
	142	static struct resource ts72xx_nand_resource[] = {
	143	{
	144	.start = 0, /* filled in later */
	145	.end = 0, /* filled in later */
	146	.flags = IORESOURCE_MEM,
	147	},
	148	};
	149
	150	static struct platform_device ts72xx_nand_flash = {
	151	.name = "gen_nand",
	152	.id = -1,
	153	.dev.platform_data = &ts72xx_nand_data,
	154	.resource = ts72xx_nand_resource,
	155	.num_resources = ARRAY_SIZE(ts72xx_nand_resource),
	156	};
	157
d6d76745 LM	158	void __init ts72xx_register_flash(struct mtd_partition *parts, int n,
d6d76745 LM	159	resource_size_t start)
3174c88a	160	{
16bcf78f HS	161	/*
	162	* TS7200 has NOR flash all other TS72xx board have NAND flash.
	163	*/
030d2dd4	164	if (board_is_ts7200()) {
16bcf78f	165	ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_16M);
030d2dd4	166	} else {
030d2dd4 HS	167	ts72xx_nand_resource[0].start = start;
	168	ts72xx_nand_resource[0].end = start + SZ_16M - 1;
	169
d6d76745 LM	170	ts72xx_nand_data.chip.partitions = parts;
	171	ts72xx_nand_data.chip.nr_partitions = n;
	172
030d2dd4 HS	173	platform_device_register(&ts72xx_nand_flash);
030d2dd4 HS	174	}
3174c88a HS	175	}
3174c88a HS	176
5594e88a HS	177	/*************************************************************************
	178	* RTC M48T86
	179	*************************************************************************/
	180	#define TS72XX_RTC_INDEX_PHYS_BASE (EP93XX_CS1_PHYS_BASE + 0x00800000)
	181	#define TS72XX_RTC_DATA_PHYS_BASE (EP93XX_CS1_PHYS_BASE + 0x01700000)
030d2dd4	182
5594e88a HS	183	static struct resource ts72xx_rtc_resources[] = {
	184	DEFINE_RES_MEM(TS72XX_RTC_INDEX_PHYS_BASE, 0x01),
	185	DEFINE_RES_MEM(TS72XX_RTC_DATA_PHYS_BASE, 0x01),
7ba01f97 LB	186	};
	187
	188	static struct platform_device ts72xx_rtc_device = {
e48f3fa3 HS	189	.name = "rtc-m48t86",
e48f3fa3 HS	190	.id = -1,
5594e88a HS	191	.resource = ts72xx_rtc_resources,
5594e88a HS	192	.num_resources = ARRAY_SIZE(ts72xx_rtc_resources),
7ba01f97 LB	193	};
7ba01f97 LB	194
97c3bca9 HS	195	/*************************************************************************
	196	* Watchdog (in CPLD)
	197	*************************************************************************/
	198	#define TS72XX_WDT_CONTROL_PHYS_BASE (EP93XX_CS2_PHYS_BASE + 0x03800000)
	199	#define TS72XX_WDT_FEED_PHYS_BASE (EP93XX_CS2_PHYS_BASE + 0x03c00000)
	200
12926dc4	201	static struct resource ts72xx_wdt_resources[] = {
97c3bca9 HS	202	DEFINE_RES_MEM(TS72XX_WDT_CONTROL_PHYS_BASE, 0x01),
97c3bca9 HS	203	DEFINE_RES_MEM(TS72XX_WDT_FEED_PHYS_BASE, 0x01),
12926dc4 MW	204	};
	205
	206	static struct platform_device ts72xx_wdt_device = {
	207	.name = "ts72xx-wdt",
	208	.id = -1,
12926dc4	209	.resource = ts72xx_wdt_resources,
97c3bca9	210	.num_resources = ARRAY_SIZE(ts72xx_wdt_resources),
12926dc4 MW	211	};
12926dc4 MW	212
e41f1e85 LM	213	/*************************************************************************
	214	* ETH
	215	*************************************************************************/
b370e082	216	static struct ep93xx_eth_data __initdata ts72xx_eth_data = {
e48f3fa3	217	.phy_id = 1,
730ee9f3 LB	218	};
730ee9f3 LB	219
c8cee359 LM	220	/*************************************************************************
	221	* SPI SD/MMC host
	222	*************************************************************************/
	223	#define BK3_EN_SDCARD_PHYS_BASE 0x12400000
	224	#define BK3_EN_SDCARD_PWR 0x0
	225	#define BK3_DIS_SDCARD_PWR 0x0C
	226	static void bk3_mmc_spi_setpower(struct device *dev, unsigned int vdd)
	227	{
	228	void __iomem *pwr_sd = ioremap(BK3_EN_SDCARD_PHYS_BASE, SZ_4K);
	229
	230	if (!pwr_sd) {
	231	pr_err("Failed to enable SD card power!");
	232	return;
	233	}
	234
	235	pr_debug("%s: SD card pwr %s VDD:0x%x\n", __func__,
	236	!!vdd ? "ON" : "OFF", vdd);
	237
	238	if (!!vdd)
	239	__raw_writeb(BK3_EN_SDCARD_PWR, pwr_sd);
	240	else
	241	__raw_writeb(BK3_DIS_SDCARD_PWR, pwr_sd);
	242
	243	iounmap(pwr_sd);
	244	}
	245
	246	static struct mmc_spi_platform_data bk3_spi_mmc_data = {
	247	.detect_delay = 500,
	248	.powerup_msecs = 100,
	249	.ocr_mask = MMC_VDD_32_33 \| MMC_VDD_33_34,
	250	.caps = MMC_CAP_NONREMOVABLE,
	251	.setpower = bk3_mmc_spi_setpower,
	252	};
	253
	254	/*************************************************************************
	255	* SPI Bus - SD card access
	256	*************************************************************************/
	257	static struct spi_board_info bk3_spi_board_info[] __initdata = {
	258	{
	259	.modalias = "mmc_spi",
	260	.platform_data = &bk3_spi_mmc_data,
	261	.max_speed_hz = 7.4E6,
	262	.bus_num = 0,
	263	.chip_select = 0,
	264	.mode = SPI_MODE_0,
	265	},
	266	};
	267
	268	/*
	269	* This is a stub -> the FGPIO[3] pin is not connected on the schematic
	270	* The all work is performed automatically by !SPI_FRAME (SFRM1) and
	271	* goes through CPLD
	272	*/
1dfbf334 LW	273	static struct gpiod_lookup_table bk3_spi_cs_gpio_table = {
	274	.dev_id = "ep93xx-spi.0",
	275	.table = {
	276	GPIO_LOOKUP("F", 3, "cs", GPIO_ACTIVE_LOW),
	277	{ },
	278	},
c8cee359 LM	279	};
	280
	281	static struct ep93xx_spi_info bk3_spi_master __initdata = {
c8cee359 LM	282	.use_dma = 1,
	283	};
	284
e41f1e85 LM	285	/*************************************************************************
	286	* TS72XX support code
	287	*************************************************************************/
f677e0f3 FF	288	#if IS_ENABLED(CONFIG_FPGA_MGR_TS73XX)
	289
	290	/* Relative to EP93XX_CS1_PHYS_BASE */
	291	#define TS73XX_FPGA_LOADER_BASE 0x03c00000
	292
	293	static struct resource ts73xx_fpga_resources[] = {
	294	{
	295	.start = EP93XX_CS1_PHYS_BASE + TS73XX_FPGA_LOADER_BASE,
	296	.end = EP93XX_CS1_PHYS_BASE + TS73XX_FPGA_LOADER_BASE + 1,
	297	.flags = IORESOURCE_MEM,
	298	},
	299	};
	300
	301	static struct platform_device ts73xx_fpga_device = {
	302	.name = "ts73xx-fpga-mgr",
	303	.id = -1,
	304	.resource = ts73xx_fpga_resources,
	305	.num_resources = ARRAY_SIZE(ts73xx_fpga_resources),
	306	};
	307
	308	#endif
	309
7aef828d HS	310	/*************************************************************************
	311	* SPI Bus
	312	*************************************************************************/
	313	static struct spi_board_info ts72xx_spi_devices[] __initdata = {
	314	{
	315	.modalias = "tmp122",
	316	.max_speed_hz = 2 * 1000 * 1000,
	317	.bus_num = 0,
	318	.chip_select = 0,
	319	},
	320	};
	321
1dfbf334 LW	322	static struct gpiod_lookup_table ts72xx_spi_cs_gpio_table = {
	323	.dev_id = "ep93xx-spi.0",
	324	.table = {
	325	/* DIO_17 */
	326	GPIO_LOOKUP("F", 2, "cs", GPIO_ACTIVE_LOW),
	327	{ },
	328	},
7aef828d HS	329	};
	330
	331	static struct ep93xx_spi_info ts72xx_spi_info __initdata = {
1dfbf334	332	/* Intentionally left blank */
7aef828d HS	333	};
7aef828d HS	334
e7736d47 LB	335	static void __init ts72xx_init_machine(void)
	336	{
	337	ep93xx_init_devices();
d6d76745 LM	338	ts72xx_register_flash(ts72xx_nand_parts, ARRAY_SIZE(ts72xx_nand_parts),
	339	is_ts9420_installed() ?
	340	EP93XX_CS7_PHYS_BASE : EP93XX_CS6_PHYS_BASE);
7ba01f97	341	platform_device_register(&ts72xx_rtc_device);
12926dc4	342	platform_device_register(&ts72xx_wdt_device);
730ee9f3	343
a0a08fdc	344	ep93xx_register_eth(&ts72xx_eth_data, 1);
f677e0f3 FF	345	#if IS_ENABLED(CONFIG_FPGA_MGR_TS73XX)
	346	if (board_is_ts7300())
	347	platform_device_register(&ts73xx_fpga_device);
	348	#endif
1dfbf334	349	gpiod_add_lookup_table(&ts72xx_spi_cs_gpio_table);
7aef828d HS	350	ep93xx_register_spi(&ts72xx_spi_info, ts72xx_spi_devices,
7aef828d HS	351	ARRAY_SIZE(ts72xx_spi_devices));
e7736d47 LB	352	}
	353
	354	MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
	355	/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
e562cf17	356	.atag_offset = 0x100,
e7736d47 LB	357	.map_io = ts72xx_map_io,
e7736d47 LB	358	.init_irq = ep93xx_init_irq,
6bb27d73	359	.init_time = ep93xx_timer_init,
e7736d47	360	.init_machine = ts72xx_init_machine,
c914283f	361	.init_late = ep93xx_init_late,
3275166e	362	.restart = ep93xx_restart,
e7736d47	363	MACHINE_END
c8cee359 LM	364
	365	/*************************************************************************
	366	* EP93xx I2S audio peripheral handling
	367	*************************************************************************/
	368	static struct resource ep93xx_i2s_resource[] = {
	369	DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),
	370	DEFINE_RES_IRQ_NAMED(IRQ_EP93XX_SAI, "spilink i2s slave"),
	371	};
	372
	373	static struct platform_device ep93xx_i2s_device = {
	374	.name = "ep93xx-spilink-i2s",
	375	.id = -1,
	376	.num_resources = ARRAY_SIZE(ep93xx_i2s_resource),
	377	.resource = ep93xx_i2s_resource,
	378	};
	379
	380	/*************************************************************************
	381	* BK3 support code
	382	*************************************************************************/
	383	static struct mtd_partition bk3_nand_parts[] = {
	384	{
	385	.name = "System",
	386	.offset = 0x00000000,
	387	.size = 0x01e00000,
	388	}, {
	389	.name = "Data",
	390	.offset = 0x01e00000,
	391	.size = 0x05f20000
	392	}, {
	393	.name = "RedBoot",
	394	.offset = 0x07d20000,
	395	.size = 0x002e0000,
	396	.mask_flags = MTD_WRITEABLE, /* force RO */
	397	},
	398	};
	399
	400	static void __init bk3_init_machine(void)
	401	{
	402	ep93xx_init_devices();
	403
	404	ts72xx_register_flash(bk3_nand_parts, ARRAY_SIZE(bk3_nand_parts),
	405	EP93XX_CS6_PHYS_BASE);
	406
	407	ep93xx_register_eth(&ts72xx_eth_data, 1);
	408
1dfbf334	409	gpiod_add_lookup_table(&bk3_spi_cs_gpio_table);
c8cee359 LM	410	ep93xx_register_spi(&bk3_spi_master, bk3_spi_board_info,
	411	ARRAY_SIZE(bk3_spi_board_info));
	412
	413	/* Configure ep93xx's I2S to use AC97 pins */
	414	ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
	415	platform_device_register(&ep93xx_i2s_device);
	416	}
	417
	418	MACHINE_START(BK3, "Liebherr controller BK3.1")
	419	/* Maintainer: Lukasz Majewski <lukma@denx.de> */
	420	.atag_offset = 0x100,
	421	.map_io = ts72xx_map_io,
	422	.init_irq = ep93xx_init_irq,
	423	.init_time = ep93xx_timer_init,
	424	.init_machine = bk3_init_machine,
	425	.init_late = ep93xx_init_late,
	426	.restart = ep93xx_restart,
	427	MACHINE_END