]>
Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
dbdf9ced | 2 | * linux/arch/arm/mach-omap1/board-h3.c |
1da177e4 LT |
3 | * |
4 | * This file contains OMAP1710 H3 specific code. | |
5 | * | |
6 | * Copyright (C) 2004 Texas Instruments, Inc. | |
7 | * Copyright (C) 2002 MontaVista Software, Inc. | |
8 | * Copyright (C) 2001 RidgeRun, Inc. | |
9 | * Author: RidgeRun, Inc. | |
10 | * Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License version 2 as | |
14 | * published by the Free Software Foundation. | |
15 | */ | |
2f8163ba | 16 | #include <linux/gpio.h> |
1da177e4 LT |
17 | #include <linux/types.h> |
18 | #include <linux/init.h> | |
19 | #include <linux/major.h> | |
20 | #include <linux/kernel.h> | |
d052d1be | 21 | #include <linux/platform_device.h> |
1da177e4 | 22 | #include <linux/errno.h> |
9b6553cd | 23 | #include <linux/workqueue.h> |
8056c6cb | 24 | #include <linux/i2c.h> |
1da177e4 | 25 | #include <linux/mtd/mtd.h> |
9b6553cd | 26 | #include <linux/mtd/nand.h> |
1da177e4 | 27 | #include <linux/mtd/partitions.h> |
561b036a | 28 | #include <linux/mtd/physmap.h> |
9b6553cd | 29 | #include <linux/input.h> |
0cc0a441 | 30 | #include <linux/spi/spi.h> |
6d16bfb5 | 31 | #include <linux/i2c/tps65010.h> |
3bc48014 | 32 | #include <linux/smc91x.h> |
ddba6c7f | 33 | #include <linux/omapfb.h> |
1da177e4 LT |
34 | |
35 | #include <asm/setup.h> | |
36 | #include <asm/page.h> | |
1da177e4 LT |
37 | #include <asm/mach-types.h> |
38 | #include <asm/mach/arch.h> | |
1da177e4 LT |
39 | #include <asm/mach/map.h> |
40 | ||
ce491cf8 TL |
41 | #include <plat/mux.h> |
42 | #include <plat/tc.h> | |
ce491cf8 TL |
43 | #include <plat/keypad.h> |
44 | #include <plat/dma.h> | |
561b036a | 45 | #include <plat/flash.h> |
1da177e4 | 46 | |
2e3ee9f4 TL |
47 | #include <mach/hardware.h> |
48 | #include <mach/irqs.h> | |
b924b204 | 49 | #include <mach/usb.h> |
2e3ee9f4 TL |
50 | |
51 | #include "common.h" | |
228fe42e TL |
52 | #include "board-h3.h" |
53 | ||
54 | /* In OMAP1710 H3 the Ethernet is directly connected to CS1 */ | |
55 | #define OMAP1710_ETHR_START 0x04000300 | |
56 | ||
0cc0a441 DB |
57 | #define H3_TS_GPIO 48 |
58 | ||
da1f026b | 59 | static const unsigned int h3_keymap[] = { |
9b6553cd | 60 | KEY(0, 0, KEY_LEFT), |
da1f026b JK |
61 | KEY(1, 0, KEY_RIGHT), |
62 | KEY(2, 0, KEY_3), | |
63 | KEY(3, 0, KEY_F10), | |
64 | KEY(4, 0, KEY_F5), | |
65 | KEY(5, 0, KEY_9), | |
66 | KEY(0, 1, KEY_DOWN), | |
9b6553cd | 67 | KEY(1, 1, KEY_UP), |
da1f026b JK |
68 | KEY(2, 1, KEY_2), |
69 | KEY(3, 1, KEY_F9), | |
70 | KEY(4, 1, KEY_F7), | |
71 | KEY(5, 1, KEY_0), | |
72 | KEY(0, 2, KEY_ENTER), | |
73 | KEY(1, 2, KEY_6), | |
9b6553cd | 74 | KEY(2, 2, KEY_1), |
da1f026b JK |
75 | KEY(3, 2, KEY_F2), |
76 | KEY(4, 2, KEY_F6), | |
77 | KEY(5, 2, KEY_HOME), | |
78 | KEY(0, 3, KEY_8), | |
79 | KEY(1, 3, KEY_5), | |
80 | KEY(2, 3, KEY_F12), | |
9b6553cd | 81 | KEY(3, 3, KEY_F3), |
da1f026b JK |
82 | KEY(4, 3, KEY_F8), |
83 | KEY(5, 3, KEY_END), | |
84 | KEY(0, 4, KEY_7), | |
85 | KEY(1, 4, KEY_4), | |
86 | KEY(2, 4, KEY_F11), | |
87 | KEY(3, 4, KEY_F1), | |
9b6553cd | 88 | KEY(4, 4, KEY_F4), |
da1f026b JK |
89 | KEY(5, 4, KEY_ESC), |
90 | KEY(0, 5, KEY_F13), | |
91 | KEY(1, 5, KEY_F14), | |
92 | KEY(2, 5, KEY_F15), | |
93 | KEY(3, 5, KEY_F16), | |
94 | KEY(4, 5, KEY_SLEEP), | |
9b6553cd TL |
95 | }; |
96 | ||
97 | ||
98 | static struct mtd_partition nor_partitions[] = { | |
1da177e4 LT |
99 | /* bootloader (U-Boot, etc) in first sector */ |
100 | { | |
101 | .name = "bootloader", | |
102 | .offset = 0, | |
103 | .size = SZ_128K, | |
104 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
105 | }, | |
106 | /* bootloader params in the next sector */ | |
107 | { | |
108 | .name = "params", | |
109 | .offset = MTDPART_OFS_APPEND, | |
110 | .size = SZ_128K, | |
111 | .mask_flags = 0, | |
112 | }, | |
113 | /* kernel */ | |
114 | { | |
115 | .name = "kernel", | |
116 | .offset = MTDPART_OFS_APPEND, | |
117 | .size = SZ_2M, | |
118 | .mask_flags = 0 | |
119 | }, | |
120 | /* file system */ | |
121 | { | |
122 | .name = "filesystem", | |
123 | .offset = MTDPART_OFS_APPEND, | |
124 | .size = MTDPART_SIZ_FULL, | |
125 | .mask_flags = 0 | |
126 | } | |
127 | }; | |
128 | ||
561b036a | 129 | static struct physmap_flash_data nor_data = { |
1da177e4 | 130 | .width = 2, |
561b036a | 131 | .set_vpp = omap1_set_vpp, |
9b6553cd TL |
132 | .parts = nor_partitions, |
133 | .nr_parts = ARRAY_SIZE(nor_partitions), | |
1da177e4 LT |
134 | }; |
135 | ||
9b6553cd | 136 | static struct resource nor_resource = { |
7c38cf02 | 137 | /* This is on CS3, wherever it's mapped */ |
1da177e4 LT |
138 | .flags = IORESOURCE_MEM, |
139 | }; | |
140 | ||
9b6553cd | 141 | static struct platform_device nor_device = { |
561b036a | 142 | .name = "physmap-flash", |
1da177e4 LT |
143 | .id = 0, |
144 | .dev = { | |
9b6553cd TL |
145 | .platform_data = &nor_data, |
146 | }, | |
147 | .num_resources = 1, | |
148 | .resource = &nor_resource, | |
149 | }; | |
150 | ||
151 | static struct mtd_partition nand_partitions[] = { | |
152 | #if 0 | |
153 | /* REVISIT: enable these partitions if you make NAND BOOT work */ | |
154 | { | |
155 | .name = "xloader", | |
156 | .offset = 0, | |
157 | .size = 64 * 1024, | |
158 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
159 | }, | |
160 | { | |
161 | .name = "bootloader", | |
162 | .offset = MTDPART_OFS_APPEND, | |
163 | .size = 256 * 1024, | |
164 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
165 | }, | |
166 | { | |
167 | .name = "params", | |
168 | .offset = MTDPART_OFS_APPEND, | |
169 | .size = 192 * 1024, | |
170 | }, | |
171 | { | |
172 | .name = "kernel", | |
173 | .offset = MTDPART_OFS_APPEND, | |
174 | .size = 2 * SZ_1M, | |
175 | }, | |
176 | #endif | |
177 | { | |
178 | .name = "filesystem", | |
179 | .size = MTDPART_SIZ_FULL, | |
180 | .offset = MTDPART_OFS_APPEND, | |
181 | }, | |
182 | }; | |
183 | ||
414f552a LM |
184 | #define H3_NAND_RB_GPIO_PIN 10 |
185 | ||
186 | static int nand_dev_ready(struct mtd_info *mtd) | |
187 | { | |
188 | return gpio_get_value(H3_NAND_RB_GPIO_PIN); | |
189 | } | |
190 | ||
277a2856 | 191 | static struct platform_nand_data nand_platdata = { |
414f552a LM |
192 | .chip = { |
193 | .nr_chips = 1, | |
194 | .chip_offset = 0, | |
195 | .nr_partitions = ARRAY_SIZE(nand_partitions), | |
196 | .partitions = nand_partitions, | |
197 | .options = NAND_SAMSUNG_LP_OPTIONS, | |
414f552a LM |
198 | }, |
199 | .ctrl = { | |
31cde044 | 200 | .cmd_ctrl = omap1_nand_cmd_ctl, |
414f552a LM |
201 | .dev_ready = nand_dev_ready, |
202 | ||
203 | }, | |
9b6553cd TL |
204 | }; |
205 | ||
206 | static struct resource nand_resource = { | |
207 | .flags = IORESOURCE_MEM, | |
208 | }; | |
209 | ||
210 | static struct platform_device nand_device = { | |
414f552a | 211 | .name = "gen_nand", |
9b6553cd TL |
212 | .id = 0, |
213 | .dev = { | |
414f552a | 214 | .platform_data = &nand_platdata, |
1da177e4 LT |
215 | }, |
216 | .num_resources = 1, | |
9b6553cd | 217 | .resource = &nand_resource, |
1da177e4 LT |
218 | }; |
219 | ||
3bc48014 LM |
220 | static struct smc91x_platdata smc91x_info = { |
221 | .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, | |
222 | .leda = RPC_LED_100_10, | |
223 | .ledb = RPC_LED_TX_RX, | |
224 | }; | |
225 | ||
1da177e4 LT |
226 | static struct resource smc91x_resources[] = { |
227 | [0] = { | |
228 | .start = OMAP1710_ETHR_START, /* Physical */ | |
229 | .end = OMAP1710_ETHR_START + 0xf, | |
230 | .flags = IORESOURCE_MEM, | |
231 | }, | |
232 | [1] = { | |
e7b3dc7e | 233 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, |
1da177e4 LT |
234 | }, |
235 | }; | |
236 | ||
237 | static struct platform_device smc91x_device = { | |
238 | .name = "smc91x", | |
239 | .id = 0, | |
3bc48014 LM |
240 | .dev = { |
241 | .platform_data = &smc91x_info, | |
242 | }, | |
1da177e4 LT |
243 | .num_resources = ARRAY_SIZE(smc91x_resources), |
244 | .resource = smc91x_resources, | |
245 | }; | |
246 | ||
c2cdaffe TL |
247 | static void __init h3_init_smc91x(void) |
248 | { | |
249 | omap_cfg_reg(W15_1710_GPIO40); | |
250 | if (gpio_request(40, "SMC91x irq") < 0) { | |
251 | printk("Error requesting gpio 40 for smc91x irq\n"); | |
252 | return; | |
253 | } | |
254 | } | |
255 | ||
1da177e4 LT |
256 | #define GPTIMER_BASE 0xFFFB1400 |
257 | #define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800)) | |
258 | #define GPTIMER_REGS_SIZE 0x46 | |
259 | ||
260 | static struct resource intlat_resources[] = { | |
261 | [0] = { | |
262 | .start = GPTIMER_REGS(0), /* Physical */ | |
263 | .end = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE, | |
264 | .flags = IORESOURCE_MEM, | |
265 | }, | |
266 | [1] = { | |
267 | .start = INT_1610_GPTIMER1, | |
268 | .end = INT_1610_GPTIMER1, | |
269 | .flags = IORESOURCE_IRQ, | |
270 | }, | |
271 | }; | |
272 | ||
273 | static struct platform_device intlat_device = { | |
274 | .name = "omap_intlat", | |
275 | .id = 0, | |
276 | .num_resources = ARRAY_SIZE(intlat_resources), | |
277 | .resource = intlat_resources, | |
278 | }; | |
279 | ||
9b6553cd TL |
280 | static struct resource h3_kp_resources[] = { |
281 | [0] = { | |
282 | .start = INT_KEYBOARD, | |
283 | .end = INT_KEYBOARD, | |
284 | .flags = IORESOURCE_IRQ, | |
285 | }, | |
286 | }; | |
287 | ||
da1f026b JK |
288 | static const struct matrix_keymap_data h3_keymap_data = { |
289 | .keymap = h3_keymap, | |
290 | .keymap_size = ARRAY_SIZE(h3_keymap), | |
291 | }; | |
292 | ||
9b6553cd | 293 | static struct omap_kp_platform_data h3_kp_data = { |
4d24607b KS |
294 | .rows = 8, |
295 | .cols = 8, | |
da1f026b JK |
296 | .keymap_data = &h3_keymap_data, |
297 | .rep = true, | |
4d24607b | 298 | .delay = 9, |
da1f026b | 299 | .dbounce = true, |
9b6553cd TL |
300 | }; |
301 | ||
302 | static struct platform_device h3_kp_device = { | |
303 | .name = "omap-keypad", | |
304 | .id = -1, | |
305 | .dev = { | |
306 | .platform_data = &h3_kp_data, | |
307 | }, | |
308 | .num_resources = ARRAY_SIZE(h3_kp_resources), | |
309 | .resource = h3_kp_resources, | |
310 | }; | |
311 | ||
9b6553cd TL |
312 | static struct platform_device h3_lcd_device = { |
313 | .name = "lcd_h3", | |
314 | .id = -1, | |
315 | }; | |
316 | ||
0cc0a441 DB |
317 | static struct spi_board_info h3_spi_board_info[] __initdata = { |
318 | [0] = { | |
319 | .modalias = "tsc2101", | |
320 | .bus_num = 2, | |
321 | .chip_select = 0, | |
0cc0a441 DB |
322 | .max_speed_hz = 16000000, |
323 | /* .platform_data = &tsc_platform_data, */ | |
324 | }, | |
325 | }; | |
326 | ||
1da177e4 | 327 | static struct platform_device *devices[] __initdata = { |
9b6553cd TL |
328 | &nor_device, |
329 | &nand_device, | |
1da177e4 LT |
330 | &smc91x_device, |
331 | &intlat_device, | |
9b6553cd TL |
332 | &h3_kp_device, |
333 | &h3_lcd_device, | |
1da177e4 LT |
334 | }; |
335 | ||
336 | static struct omap_usb_config h3_usb_config __initdata = { | |
337 | /* usb1 has a Mini-AB port and external isp1301 transceiver */ | |
338 | .otg = 2, | |
339 | ||
340 | #ifdef CONFIG_USB_GADGET_OMAP | |
341 | .hmc_mode = 19, /* 0:host(off) 1:dev|otg 2:disabled */ | |
342 | #elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | |
343 | /* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */ | |
344 | .hmc_mode = 20, /* 1:dev|otg(off) 1:host 2:disabled */ | |
345 | #endif | |
346 | ||
347 | .pins[1] = 3, | |
348 | }; | |
349 | ||
3179a019 | 350 | static struct omap_lcd_config h3_lcd_config __initdata = { |
3179a019 TL |
351 | .ctrl_name = "internal", |
352 | }; | |
353 | ||
0cc0a441 DB |
354 | static struct i2c_board_info __initdata h3_i2c_board_info[] = { |
355 | { | |
3760f736 | 356 | I2C_BOARD_INFO("tps65013", 0x48), |
0cc0a441 | 357 | }, |
9df013b3 JD |
358 | { |
359 | I2C_BOARD_INFO("isp1301_omap", 0x2d), | |
9df013b3 | 360 | }, |
0cc0a441 DB |
361 | }; |
362 | ||
1da177e4 LT |
363 | static void __init h3_init(void) |
364 | { | |
c2cdaffe TL |
365 | h3_init_smc91x(); |
366 | ||
9b6553cd TL |
367 | /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped |
368 | * to address 0 by a dip switch), NAND on CS2B. The NAND driver will | |
369 | * notice whether a NAND chip is enabled at probe time. | |
370 | * | |
371 | * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND | |
372 | * (which on H2 may be 16bit) on CS3. Try detecting that in code here, | |
373 | * to avoid probing every possible flash configuration... | |
374 | */ | |
375 | nor_resource.end = nor_resource.start = omap_cs3_phys(); | |
376 | nor_resource.end += SZ_32M - 1; | |
377 | ||
378 | nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS; | |
379 | nand_resource.end += SZ_4K - 1; | |
f2d18fea JN |
380 | if (gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0) |
381 | BUG(); | |
414f552a | 382 | gpio_direction_input(H3_NAND_RB_GPIO_PIN); |
9b6553cd TL |
383 | |
384 | /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */ | |
385 | /* GPIO10 pullup/down register, Enable pullup on GPIO10 */ | |
386 | omap_cfg_reg(V2_1710_GPIO10); | |
387 | ||
93c43f25 TL |
388 | /* Mux pins for keypad */ |
389 | omap_cfg_reg(F18_1610_KBC0); | |
390 | omap_cfg_reg(D20_1610_KBC1); | |
391 | omap_cfg_reg(D19_1610_KBC2); | |
392 | omap_cfg_reg(E18_1610_KBC3); | |
393 | omap_cfg_reg(C21_1610_KBC4); | |
394 | omap_cfg_reg(G18_1610_KBR0); | |
395 | omap_cfg_reg(F19_1610_KBR1); | |
396 | omap_cfg_reg(H14_1610_KBR2); | |
397 | omap_cfg_reg(E20_1610_KBR3); | |
398 | omap_cfg_reg(E19_1610_KBR4); | |
399 | omap_cfg_reg(N19_1610_KBR5); | |
400 | ||
46a0a540 TKD |
401 | smc91x_resources[1].start = gpio_to_irq(40); |
402 | smc91x_resources[1].end = gpio_to_irq(40); | |
9b6553cd | 403 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
46a0a540 | 404 | h3_spi_board_info[0].irq = gpio_to_irq(H3_TS_GPIO); |
e27a93a9 TL |
405 | spi_register_board_info(h3_spi_board_info, |
406 | ARRAY_SIZE(h3_spi_board_info)); | |
3179a019 | 407 | omap_serial_init(); |
46a0a540 | 408 | h3_i2c_board_info[1].irq = gpio_to_irq(14); |
1ed16a86 JN |
409 | omap_register_i2c_bus(1, 100, h3_i2c_board_info, |
410 | ARRAY_SIZE(h3_i2c_board_info)); | |
dd0cdd88 | 411 | omap1_usb_init(&h3_usb_config); |
138ab9f8 | 412 | h3_mmc_init(); |
ddba6c7f TV |
413 | |
414 | omapfb_set_lcd_config(&h3_lcd_config); | |
1da177e4 LT |
415 | } |
416 | ||
1da177e4 | 417 | MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board") |
e9dea0c6 | 418 | /* Maintainer: Texas Instruments, Inc. */ |
246e389d | 419 | .atag_offset = 0x100, |
7b88e62f TL |
420 | .map_io = omap16xx_map_io, |
421 | .init_early = omap1_init_early, | |
71ee7dad | 422 | .reserve = omap_reserve, |
7b88e62f | 423 | .init_irq = omap1_init_irq, |
e9dea0c6 | 424 | .init_machine = h3_init, |
82c3bd03 | 425 | .init_late = omap1_init_late, |
e74984e4 | 426 | .timer = &omap1_timer, |
baa95883 | 427 | .restart = omap1_restart, |
1da177e4 | 428 | MACHINE_END |