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ARM: omap: Remove stray ARCH_HAS_OPP references
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21278aea
RH
1menu "TI OMAP/AM/DM/DRA Family"
2 depends on ARCH_MULTI_V6 || ARCH_MULTI_V7
3
a0694861
TL
4config ARCH_OMAP
5 bool
6
68ac8f7d 7config ARCH_OMAP2
f558b275 8 bool "TI OMAP2"
4b0ed696 9 depends on ARCH_MULTI_V6
59d92875 10 select ARCH_OMAP2PLUS
68ac8f7d 11 select CPU_V6
ecc46cfd 12 select SOC_HAS_OMAP2_SDRC
68ac8f7d
TL
13
14config ARCH_OMAP3
f558b275 15 bool "TI OMAP3"
4b0ed696 16 depends on ARCH_MULTI_V7
59d92875 17 select ARCH_OMAP2PLUS
15e0d9e3 18 select ARM_CPU_SUSPEND if PM
0ee7261c 19 select OMAP_INTERCONNECT
b1b3f49c
RK
20 select PM_OPP if PM
21 select PM_RUNTIME if CPU_IDLE
22 select SOC_HAS_OMAP2_SDRC
68ac8f7d
TL
23
24config ARCH_OMAP4
f558b275 25 bool "TI OMAP4"
4b0ed696 26 depends on ARCH_MULTI_V7
59d92875 27 select ARCH_OMAP2PLUS
b1b3f49c
RK
28 select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
29 select ARM_CPU_SUSPEND if PM
30 select ARM_ERRATA_720789
31 select ARM_GIC
4c3ffffd 32 select HAVE_ARM_SCU if SMP
a894fcc2 33 select HAVE_ARM_TWD if SMP
b1b3f49c 34 select OMAP_INTERCONNECT
a641f3a6
RK
35 select PL310_ERRATA_588369 if CACHE_L2X0
36 select PL310_ERRATA_727915 if CACHE_L2X0
f5a6422d 37 select PM_OPP if PM
b1b3f49c 38 select PM_RUNTIME if CPU_IDLE
7a981995
S
39 select ARM_ERRATA_754322
40 select ARM_ERRATA_775420
68ac8f7d 41
35eb4298
S
42config SOC_OMAP5
43 bool "TI OMAP5"
4b0ed696 44 depends on ARCH_MULTI_V7
59d92875 45 select ARCH_OMAP2PLUS
b1b3f49c 46 select ARM_CPU_SUSPEND if PM
35eb4298 47 select ARM_GIC
896eba3b 48 select HAVE_ARM_SCU if SMP
8b7dfa7d 49 select HAVE_ARM_TWD if SMP
8a4da6e3 50 select HAVE_ARM_ARCH_TIMER
f82a3133 51 select ARM_ERRATA_798181 if SMP
35eb4298 52
59d92875 53config SOC_AM33XX
1085189f 54 bool "TI AM33XX"
59d92875
AB
55 depends on ARCH_MULTI_V7
56 select ARCH_OMAP2PLUS
57 select ARM_CPU_SUSPEND if PM
59d92875
AB
58
59config SOC_AM43XX
60 bool "TI AM43x"
61 depends on ARCH_MULTI_V7
59d92875 62 select ARCH_OMAP2PLUS
59d92875 63 select ARM_GIC
59d92875 64 select MACH_OMAP_GENERIC
d941f86f 65 select MIGHT_HAVE_CACHE_L2X0
59d92875 66
68b9f608
TK
67config SOC_DRA7XX
68 bool "TI DRA7XX"
69 depends on ARCH_MULTI_V7
70 select ARCH_OMAP2PLUS
71 select ARM_CPU_SUSPEND if PM
72 select ARM_GIC
68b9f608 73 select HAVE_ARM_ARCH_TIMER
5c61e619 74 select IRQ_CROSSBAR
68b9f608 75
59d92875
AB
76config ARCH_OMAP2PLUS
77 bool
78 select ARCH_HAS_BANDGAP
59d92875
AB
79 select ARCH_HAS_HOLES_MEMORYMODEL
80 select ARCH_OMAP
81 select ARCH_REQUIRE_GPIOLIB
59d92875 82 select CLKSRC_MMIO
59d92875 83 select GENERIC_IRQ_CHIP
f2acae69 84 select MACH_OMAP_GENERIC
59d92875
AB
85 select OMAP_DM_TIMER
86 select PINCTRL
59d92875 87 select SOC_BUS
9d8812df 88 select TI_PRIV_EDMA
59d92875
AB
89 help
90 Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
91
92
93if ARCH_OMAP2PLUS
94
95menu "TI OMAP2/3/4 Specific Features"
96
97config ARCH_OMAP2PLUS_TYPICAL
98 bool "Typical OMAP configuration"
99 default y
100 select AEABI
101 select HIGHMEM
102 select I2C
103 select I2C_OMAP
104 select MENELAUS if ARCH_OMAP2
8dd21c93 105 select NEON if CPU_V7
59d92875
AB
106 select PM_RUNTIME
107 select REGULATOR
108 select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4
109 select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4
110 select VFP
111 help
112 Compile a kernel suitable for booting most boards
113
114config SOC_HAS_OMAP2_SDRC
115 bool "OMAP2 SDRAM Controller support"
116
117config SOC_HAS_REALTIME_COUNTER
118 bool "Real time free running counter"
f18153f9 119 depends on SOC_OMAP5 || SOC_DRA7XX
59d92875
AB
120 default y
121
1dbae815 122comment "OMAP Core Type"
f558b275 123 depends on ARCH_OMAP2
1dbae815 124
59b479e0 125config SOC_OMAP2420
1dbae815 126 bool "OMAP2420 support"
f558b275 127 depends on ARCH_OMAP2
ffb63e34 128 default y
77900a2f 129 select OMAP_DM_TIMER
ecc46cfd 130 select SOC_HAS_OMAP2_SDRC
1dbae815 131
59b479e0 132config SOC_OMAP2430
72d0f1c3 133 bool "OMAP2430 support"
f558b275 134 depends on ARCH_OMAP2
ffb63e34 135 default y
ecc46cfd 136 select SOC_HAS_OMAP2_SDRC
72d0f1c3 137
59b479e0 138config SOC_OMAP3430
cc26b3b0 139 bool "OMAP3430 support"
f558b275 140 depends on ARCH_OMAP3
ffb63e34 141 default y
ecc46cfd 142 select SOC_HAS_OMAP2_SDRC
cc26b3b0 143
33959553 144config SOC_TI81XX
a920360f 145 bool "TI81XX support"
f558b275 146 depends on ARCH_OMAP3
4bd7be22
HP
147 default y
148
ddaa912a
TL
149config OMAP_PACKAGE_CBC
150 bool
151
152config OMAP_PACKAGE_CBB
153 bool
154
155config OMAP_PACKAGE_CUS
156 bool
157
662c8b55
TL
158config OMAP_PACKAGE_CBP
159 bool
160
f2acae69 161comment "OMAP Legacy Platform Data Board Type"
f558b275 162 depends on ARCH_OMAP2PLUS
1dbae815
TL
163
164config MACH_OMAP_GENERIC
f2acae69 165 bool
1dbae815 166
1b52d5df
KV
167config MACH_OMAP2_TUSB6010
168 bool
59b479e0 169 depends on ARCH_OMAP2 && SOC_OMAP2420
1b52d5df
KV
170 default y if MACH_NOKIA_N8X0
171
2885f000
SMK
172config MACH_OMAP3_BEAGLE
173 bool "OMAP3 BEAGLE board"
a8eb7ca0 174 depends on ARCH_OMAP3
ffb63e34 175 default y
ca5742bd 176 select OMAP_PACKAGE_CBB
2885f000 177
476544ca 178config MACH_DEVKIT8000
51824c5f
TW
179 bool "DEVKIT8000 board"
180 depends on ARCH_OMAP3
ffb63e34 181 default y
51824c5f 182 select OMAP_PACKAGE_CUS
476544ca 183
49265651
NK
184config MACH_OMAP_LDP
185 bool "OMAP3 LDP board"
a8eb7ca0 186 depends on ARCH_OMAP3
ffb63e34 187 default y
ca5742bd 188 select OMAP_PACKAGE_CBB
49265651 189
d40f3f15
TN
190config MACH_OMAP3530_LV_SOM
191 bool "OMAP3 Logic 3530 LV SOM board"
192 depends on ARCH_OMAP3
d40f3f15 193 default y
b1b3f49c 194 select OMAP_PACKAGE_CBB
d40f3f15
TN
195 help
196 Support for the LogicPD OMAP3530 SOM Development kit
197 for full description please see the products webpage at
198 http://www.logicpd.com/products/development-kits/texas-instruments-zoom%E2%84%A2-omap35x-development-kit
199
200config MACH_OMAP3_TORPEDO
201 bool "OMAP3 Logic 35x Torpedo board"
202 depends on ARCH_OMAP3
d40f3f15 203 default y
b1b3f49c 204 select OMAP_PACKAGE_CBB
d40f3f15
TN
205 help
206 Support for the LogicPD OMAP35x Torpedo Development kit
207 for full description please see the products webpage at
208 http://www.logicpd.com/products/development-kits/zoom-omap35x-torpedo-development-kit
209
eba2645a
SS
210config MACH_OVERO
211 bool "Gumstix Overo board"
a8eb7ca0 212 depends on ARCH_OMAP3
ffb63e34 213 default y
ca5742bd 214 select OMAP_PACKAGE_CBB
da177247 215
c625327e
RL
216config MACH_OMAP3517EVM
217 bool "OMAP3517/ AM3517 EVM board"
a8eb7ca0 218 depends on ARCH_OMAP3
ffb63e34 219 default y
ca5742bd 220 select OMAP_PACKAGE_CBB
c625327e 221
1cb125ca
S
222config MACH_CRANEBOARD
223 bool "AM3517/05 CRANE board"
224 depends on ARCH_OMAP3
225 select OMAP_PACKAGE_CBB
226
da177247
GI
227config MACH_OMAP3_PANDORA
228 bool "OMAP3 Pandora"
a8eb7ca0 229 depends on ARCH_OMAP3
ffb63e34 230 default y
ca5742bd 231 select OMAP_PACKAGE_CBB
a075ccc6 232 select REGULATOR_FIXED_VOLTAGE if REGULATOR
6fdc29e2 233
a17fb8f5 234config MACH_TOUCHBOOK
7a079cab 235 bool "OMAP3 Touch Book"
a8eb7ca0 236 depends on ARCH_OMAP3
ffb63e34 237 default y
a17fb8f5 238 select OMAP_PACKAGE_CBB
7a079cab 239
6fdc29e2
SMK
240config MACH_OMAP_3430SDP
241 bool "OMAP 3430 SDP board"
a8eb7ca0 242 depends on ARCH_OMAP3
ffb63e34 243 default y
ca5742bd 244 select OMAP_PACKAGE_CBB
ffe7f95b 245
d2fbf345
TL
246config MACH_NOKIA_N810
247 bool
248
249config MACH_NOKIA_N810_WIMAX
250 bool
251
63138812
KV
252config MACH_NOKIA_N8X0
253 bool "Nokia N800/N810"
59b479e0 254 depends on SOC_OMAP2420
ffb63e34 255 default y
d2fbf345
TL
256 select MACH_NOKIA_N810
257 select MACH_NOKIA_N810_WIMAX
63138812 258
ffe7f95b 259config MACH_NOKIA_RX51
cc067797 260 bool "Nokia N900 (RX-51) phone"
a8eb7ca0 261 depends on ARCH_OMAP3
ffb63e34 262 default y
ca5742bd 263 select OMAP_PACKAGE_CBB
577145f4 264
2886d128 265config MACH_CM_T35
c3146974 266 bool "CompuLab CM-T35/CM-T3730 modules"
a8eb7ca0 267 depends on ARCH_OMAP3
ffb63e34 268 default y
c3146974 269 select MACH_CM_T3730
ca5742bd 270 select OMAP_PACKAGE_CUS
2886d128 271
d04b620e
IG
272config MACH_CM_T3517
273 bool "CompuLab CM-T3517 module"
274 depends on ARCH_OMAP3
275 default y
276 select OMAP_PACKAGE_CBB
d04b620e 277
c3146974
IG
278config MACH_CM_T3730
279 bool
280
9cbc3493
J
281config MACH_SBC3530
282 bool "OMAP3 SBC STALKER board"
283 depends on ARCH_OMAP3
ffb63e34 284 default y
9cbc3493 285 select OMAP_PACKAGE_CUS
9cbc3493 286
2c87fb2e
HP
287config MACH_TI8168EVM
288 bool "TI8168 Evaluation Module"
33959553 289 depends on SOC_TI81XX
2c87fb2e 290 default y
a890b676
HP
291
292config MACH_TI8148EVM
293 bool "TI8148 Evaluation Module"
33959553 294 depends on SOC_TI81XX
a890b676 295 default y
2c87fb2e 296
183bd50f
AS
297config OMAP3_EMU
298 bool "OMAP3 debugging peripherals"
299 depends on ARCH_OMAP3
a8a6565c 300 select ARM_AMBA
183bd50f
AS
301 select OC_ETM
302 help
303 Say Y here to enable debugging hardware of omap3
304
18862cbe
PW
305config OMAP3_SDRC_AC_TIMING
306 bool "Enable SDRC AC timing register changes"
a8eb7ca0 307 depends on ARCH_OMAP3
18862cbe
PW
308 default n
309 help
310 If you know that none of your system initiators will attempt to
311 access SDRAM during CORE DVFS, select Y here. This should boost
312 SDRAM performance at lower CORE OPPs. There are relatively few
313 users who will wish to say yes at this point - almost everyone will
314 wish to say no. Selecting yes without understanding what is
315 going on could result in system crashes;
316
137d105d 317config OMAP4_ERRATA_I688
2ec1fc4e 318 bool "OMAP4 errata: Async Bridge Corruption"
1348bbf9 319 depends on (ARCH_OMAP4 || SOC_OMAP5) && !ARCH_MULTIPLATFORM
137d105d
SS
320 select ARCH_HAS_BARRIERS
321 help
322 If a data is stalled inside asynchronous bridge because of back
323 pressure, it may be accepted multiple times, creating pointer
324 misalignment that will corrupt next transfers on that data path
325 until next reset of the system (No recovery procedure once the
326 issue is hit, the path remains consistently broken). Async bridge
327 can be found on path between MPU to EMIF and MPU to L3 interconnect.
328 This situation can happen only when the idle is initiated by a
329 Master Request Disconnection (which is trigged by software when
330 executing WFI on CPU).
331 The work-around for this errata needs all the initiators connected
332 through async bridge must ensure that data path is properly drained
333 before issuing WFI. This condition will be met if one Strongly ordered
334 access is performed to the target right before executing the WFI.
335 In MPU case, L3 T2ASYNC FIFO and DDR T2ASYNC FIFO needs to be drained.
336 IO barrier ensure that there is no synchronisation loss on initiators
337 operating on both interconnect port simultaneously.
4a54db61
TL
338endmenu
339
340endif
21278aea
RH
341
342endmenu