[mirror_ubuntu-artful-kernel.git] / arch / arm / mach-omap2 / board-generic.c

/*
 * Copyright (C) 2005 Nokia Corporation
 * Author: Paul Mundt <paul.mundt@nokia.com>
 *
 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
 *
 * Modified from the original mach-omap/omap2/board-generic.c did by Paul
 * to support the OMAP2+ device tree boards with an unique board file.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/io.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/irqdomain.h>

#include <asm/mach/arch.h>

#include "common.h"

#if !(defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3))
#define intc_of_init	NULL
#endif
#ifndef CONFIG_ARCH_OMAP4
#define gic_of_init		NULL
#endif

static const struct of_device_id omap_dt_match_table[] __initconst = {
	{ .compatible = "simple-bus", },
	{ .compatible = "ti,omap-infra", },
	{ }
};

static void __init omap_generic_init(void)
{
	omapdss_early_init_of();

	pdata_quirks_init(omap_dt_match_table);

	omapdss_init_of();
}

#ifdef CONFIG_SOC_OMAP2420
static const char *const omap242x_boards_compat[] __initconst = {
	"ti,omap2420",
	NULL,
};

DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
	.reserve	= omap_reserve,
	.map_io		= omap242x_map_io,
	.init_early	= omap2420_init_early,
	.init_machine	= omap_generic_init,
	.init_time	= omap2_sync32k_timer_init,
	.dt_compat	= omap242x_boards_compat,
	.restart	= omap2xxx_restart,
MACHINE_END
#endif

#ifdef CONFIG_SOC_OMAP2430
static const char *const omap243x_boards_compat[] __initconst = {
	"ti,omap2430",
	NULL,
};

DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
	.reserve	= omap_reserve,
	.map_io		= omap243x_map_io,
	.init_early	= omap2430_init_early,
	.init_machine	= omap_generic_init,
	.init_time	= omap2_sync32k_timer_init,
	.dt_compat	= omap243x_boards_compat,
	.restart	= omap2xxx_restart,
MACHINE_END
#endif

#ifdef CONFIG_ARCH_OMAP3
static const char *const omap3_boards_compat[] __initconst = {
	"ti,omap3430",
	"ti,omap3",
	NULL,
};

DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
	.reserve	= omap_reserve,
	.map_io		= omap3_map_io,
	.init_early	= omap3430_init_early,
	.init_machine	= omap_generic_init,
	.init_late	= omap3_init_late,
	.init_time	= omap3_sync32k_timer_init,
	.dt_compat	= omap3_boards_compat,
	.restart	= omap3xxx_restart,
MACHINE_END

static const char *const omap36xx_boards_compat[] __initconst = {
	"ti,omap36xx",
	NULL,
};

DT_MACHINE_START(OMAP36XX_DT, "Generic OMAP36xx (Flattened Device Tree)")
	.reserve	= omap_reserve,
	.map_io		= omap3_map_io,
	.init_early	= omap3630_init_early,
	.init_machine	= omap_generic_init,
	.init_late	= omap3_init_late,
	.init_time	= omap3_sync32k_timer_init,
	.dt_compat	= omap36xx_boards_compat,
	.restart	= omap3xxx_restart,
MACHINE_END

static const char *const omap3_gp_boards_compat[] __initconst = {
	"ti,omap3-beagle",
	"timll,omap3-devkit8000",
	NULL,
};

DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)")
	.reserve	= omap_reserve,
	.map_io		= omap3_map_io,
	.init_early	= omap3430_init_early,
	.init_machine	= omap_generic_init,
	.init_late	= omap3_init_late,
	.init_time	= omap3_secure_sync32k_timer_init,
	.dt_compat	= omap3_gp_boards_compat,
	.restart	= omap3xxx_restart,
MACHINE_END

static const char *const am3517_boards_compat[] __initconst = {
	"ti,am3517",
	NULL,
};

DT_MACHINE_START(AM3517_DT, "Generic AM3517 (Flattened Device Tree)")
	.reserve	= omap_reserve,
	.map_io		= omap3_map_io,
	.init_early	= am35xx_init_early,
	.init_machine	= omap_generic_init,
	.init_late	= omap3_init_late,
	.init_time	= omap3_gptimer_timer_init,
	.dt_compat	= am3517_boards_compat,
	.restart	= omap3xxx_restart,
MACHINE_END
#endif

#ifdef CONFIG_SOC_AM33XX
static const char *const am33xx_boards_compat[] __initconst = {
	"ti,am33xx",
	NULL,
};

DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)")
	.reserve	= omap_reserve,
	.map_io		= am33xx_map_io,
	.init_early	= am33xx_init_early,
	.init_machine	= omap_generic_init,
	.init_late	= am33xx_init_late,
	.init_time	= omap3_gptimer_timer_init,
	.dt_compat	= am33xx_boards_compat,
	.restart	= am33xx_restart,
MACHINE_END
#endif

#ifdef CONFIG_ARCH_OMAP4
static const char *const omap4_boards_compat[] __initconst = {
	"ti,omap4460",
	"ti,omap4430",
	"ti,omap4",
	NULL,
};

DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
	.reserve	= omap_reserve,
	.smp		= smp_ops(omap4_smp_ops),
	.map_io		= omap4_map_io,
	.init_early	= omap4430_init_early,
	.init_irq	= omap_gic_of_init,
	.init_machine	= omap_generic_init,
	.init_late	= omap4430_init_late,
	.init_time	= omap4_local_timer_init,
	.dt_compat	= omap4_boards_compat,
	.restart	= omap44xx_restart,
MACHINE_END
#endif

#ifdef CONFIG_SOC_OMAP5
static const char *const omap5_boards_compat[] __initconst = {
	"ti,omap5432",
	"ti,omap5430",
	"ti,omap5",
	NULL,
};

DT_MACHINE_START(OMAP5_DT, "Generic OMAP5 (Flattened Device Tree)")
	.reserve	= omap_reserve,
	.smp		= smp_ops(omap4_smp_ops),
	.map_io		= omap5_map_io,
	.init_early	= omap5_init_early,
	.init_irq	= omap_gic_of_init,
	.init_machine	= omap_generic_init,
	.init_late	= omap5_init_late,
	.init_time	= omap5_realtime_timer_init,
	.dt_compat	= omap5_boards_compat,
	.restart	= omap44xx_restart,
MACHINE_END
#endif

#ifdef CONFIG_SOC_AM43XX
static const char *const am43_boards_compat[] __initconst = {
	"ti,am4372",
	"ti,am43",
	NULL,
};

DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)")
	.map_io		= am33xx_map_io,
	.init_early	= am43xx_init_early,
	.init_late	= am43xx_init_late,
	.init_irq	= omap_gic_of_init,
	.init_machine	= omap_generic_init,
	.init_time	= omap3_gptimer_timer_init,
	.dt_compat	= am43_boards_compat,
	.restart	= omap44xx_restart,
MACHINE_END
#endif

#ifdef CONFIG_SOC_DRA7XX
static const char *const dra74x_boards_compat[] __initconst = {
	"ti,am5728",
	"ti,am5726",
	"ti,dra742",
	"ti,dra7",
	NULL,
};

DT_MACHINE_START(DRA74X_DT, "Generic DRA74X (Flattened Device Tree)")
	.reserve	= omap_reserve,
	.smp		= smp_ops(omap4_smp_ops),
	.map_io		= omap5_map_io,
	.init_early	= dra7xx_init_early,
	.init_late	= dra7xx_init_late,
	.init_irq	= omap_gic_of_init,
	.init_machine	= omap_generic_init,
	.init_time	= omap5_realtime_timer_init,
	.dt_compat	= dra74x_boards_compat,
	.restart	= omap44xx_restart,
MACHINE_END

static const char *const dra72x_boards_compat[] __initconst = {
	"ti,am5718",
	"ti,am5716",
	"ti,dra722",
	NULL,
};

DT_MACHINE_START(DRA72X_DT, "Generic DRA72X (Flattened Device Tree)")
	.reserve	= omap_reserve,
	.map_io		= omap5_map_io,
	.init_early	= dra7xx_init_early,
	.init_late	= dra7xx_init_late,
	.init_irq	= omap_gic_of_init,
	.init_machine	= omap_generic_init,
	.init_time	= omap5_realtime_timer_init,
	.dt_compat	= dra72x_boards_compat,
	.restart	= omap44xx_restart,
MACHINE_END
#endif
Commit	Line	Data
1dbae815	1	/*
1dbae815 TL	2	* Copyright (C) 2005 Nokia Corporation
	3	* Author: Paul Mundt <paul.mundt@nokia.com>
	4	*
8d61649d	5	* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
1dbae815	6	*
8d61649d BC	7	* Modified from the original mach-omap/omap2/board-generic.c did by Paul
8d61649d BC	8	* to support the OMAP2+ device tree boards with an unique board file.
1dbae815 TL	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*/
8d61649d	14	#include <linux/io.h>
fbf75da7	15	#include <linux/of_irq.h>
8d61649d BC	16	#include <linux/of_platform.h>
8d61649d BC	17	#include <linux/irqdomain.h>
1dbae815	18
1dbae815	19	#include <asm/mach/arch.h>
1dbae815	20
4e65331c	21	#include "common.h"
8d61649d	22
75a57fe9	23	#if !(defined(CONFIG_ARCH_OMAP2) \|\| defined(CONFIG_ARCH_OMAP3))
c4082d49	24	#define intc_of_init NULL
75a57fe9 TL	25	#endif
	26	#ifndef CONFIG_ARCH_OMAP4
	27	#define gic_of_init NULL
	28	#endif
	29
31957609	30	static const struct of_device_id omap_dt_match_table[] __initconst = {
8d61649d BC	31	{ .compatible = "simple-bus", },
	32	{ .compatible = "ti,omap-infra", },
	33	{ }
b3c6df3a PW	34	};
b3c6df3a PW	35
1dbae815 TL	36	static void __init omap_generic_init(void)
1dbae815 TL	37	{
6a0e6b38 TV	38	omapdss_early_init_of();
6a0e6b38 TV	39
8651bd8c	40	pdata_quirks_init(omap_dt_match_table);
dcdf407b TV	41
dcdf407b TV	42	omapdss_init_of();
1dbae815 TL	43	}
1dbae815 TL	44
0e02a8c1	45	#ifdef CONFIG_SOC_OMAP2420
58cda01e	46	static const char *const omap242x_boards_compat[] __initconst = {
8d61649d BC	47	"ti,omap2420",
	48	NULL,
	49	};
	50
	51	DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
	52	.reserve = omap_reserve,
	53	.map_io = omap242x_map_io,
	54	.init_early = omap2420_init_early,
8d61649d	55	.init_machine = omap_generic_init,
6bb27d73	56	.init_time = omap2_sync32k_timer_init,
8d61649d	57	.dt_compat = omap242x_boards_compat,
187e3e06	58	.restart = omap2xxx_restart,
8d61649d BC	59	MACHINE_END
	60	#endif
	61
0e02a8c1	62	#ifdef CONFIG_SOC_OMAP2430
58cda01e	63	static const char *const omap243x_boards_compat[] __initconst = {
8d61649d BC	64	"ti,omap2430",
	65	NULL,
	66	};
	67
	68	DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
71ee7dad	69	.reserve = omap_reserve,
8d61649d BC	70	.map_io = omap243x_map_io,
8d61649d BC	71	.init_early = omap2430_init_early,
1dbae815	72	.init_machine = omap_generic_init,
6bb27d73	73	.init_time = omap2_sync32k_timer_init,
8d61649d	74	.dt_compat = omap243x_boards_compat,
187e3e06	75	.restart = omap2xxx_restart,
8d61649d BC	76	MACHINE_END
	77	#endif
	78
0e02a8c1	79	#ifdef CONFIG_ARCH_OMAP3
58cda01e	80	static const char *const omap3_boards_compat[] __initconst = {
b83a08fe	81	"ti,omap3430",
8d61649d BC	82	"ti,omap3",
	83	NULL,
	84	};
	85
	86	DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
	87	.reserve = omap_reserve,
	88	.map_io = omap3_map_io,
	89	.init_early = omap3430_init_early,
93651b85	90	.init_machine = omap_generic_init,
990fa4f5	91	.init_late = omap3_init_late,
6bb27d73	92	.init_time = omap3_sync32k_timer_init,
8d61649d	93	.dt_compat = omap3_boards_compat,
187e3e06	94	.restart = omap3xxx_restart,
8d61649d	95	MACHINE_END
7dd9d502	96
58cda01e	97	static const char *const omap36xx_boards_compat[] __initconst = {
016c12d2 NM	98	"ti,omap36xx",
	99	NULL,
	100	};
	101
	102	DT_MACHINE_START(OMAP36XX_DT, "Generic OMAP36xx (Flattened Device Tree)")
	103	.reserve = omap_reserve,
	104	.map_io = omap3_map_io,
	105	.init_early = omap3630_init_early,
016c12d2 NM	106	.init_machine = omap_generic_init,
	107	.init_late = omap3_init_late,
	108	.init_time = omap3_sync32k_timer_init,
	109	.dt_compat = omap36xx_boards_compat,
	110	.restart = omap3xxx_restart,
	111	MACHINE_END
	112
58cda01e	113	static const char *const omap3_gp_boards_compat[] __initconst = {
7dd9d502	114	"ti,omap3-beagle",
4bfe6341	115	"timll,omap3-devkit8000",
7dd9d502 JH	116	NULL,
	117	};
	118
	119	DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)")
	120	.reserve = omap_reserve,
	121	.map_io = omap3_map_io,
	122	.init_early = omap3430_init_early,
7dd9d502	123	.init_machine = omap_generic_init,
990fa4f5	124	.init_late = omap3_init_late,
6bb27d73	125	.init_time = omap3_secure_sync32k_timer_init,
7dd9d502	126	.dt_compat = omap3_gp_boards_compat,
d01e4afd	127	.restart = omap3xxx_restart,
8d61649d	128	MACHINE_END
caef4ee8	129
58cda01e	130	static const char *const am3517_boards_compat[] __initconst = {
caef4ee8 NM	131	"ti,am3517",
	132	NULL,
	133	};
	134
	135	DT_MACHINE_START(AM3517_DT, "Generic AM3517 (Flattened Device Tree)")
	136	.reserve = omap_reserve,
	137	.map_io = omap3_map_io,
	138	.init_early = am35xx_init_early,
caef4ee8 NM	139	.init_machine = omap_generic_init,
	140	.init_late = omap3_init_late,
	141	.init_time = omap3_gptimer_timer_init,
	142	.dt_compat = am3517_boards_compat,
	143	.restart = omap3xxx_restart,
	144	MACHINE_END
8d61649d BC	145	#endif
8d61649d BC	146
08f30989	147	#ifdef CONFIG_SOC_AM33XX
58cda01e	148	static const char *const am33xx_boards_compat[] __initconst = {
08f30989 AM	149	"ti,am33xx",
	150	NULL,
	151	};
	152
	153	DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)")
	154	.reserve = omap_reserve,
	155	.map_io = am33xx_map_io,
	156	.init_early = am33xx_init_early,
08f30989	157	.init_machine = omap_generic_init,
765e7a06	158	.init_late = am33xx_init_late,
00ea4d56	159	.init_time = omap3_gptimer_timer_init,
08f30989	160	.dt_compat = am33xx_boards_compat,
14e067c1	161	.restart = am33xx_restart,
08f30989 AM	162	MACHINE_END
	163	#endif
	164
0e02a8c1	165	#ifdef CONFIG_ARCH_OMAP4
58cda01e	166	static const char *const omap4_boards_compat[] __initconst = {
b83a08fe NM	167	"ti,omap4460",
b83a08fe NM	168	"ti,omap4430",
8d61649d BC	169	"ti,omap4",
	170	NULL,
	171	};
	172
	173	DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
	174	.reserve = omap_reserve,
06915321	175	.smp = smp_ops(omap4_smp_ops),
8d61649d BC	176	.map_io = omap4_map_io,
8d61649d BC	177	.init_early = omap4430_init_early,
c4082d49	178	.init_irq = omap_gic_of_init,
93651b85	179	.init_machine = omap_generic_init,
bbd707ac	180	.init_late = omap4430_init_late,
6bb27d73	181	.init_time = omap4_local_timer_init,
8d61649d	182	.dt_compat = omap4_boards_compat,
187e3e06	183	.restart = omap44xx_restart,
1dbae815	184	MACHINE_END
8d61649d	185	#endif
0c1b6fac S	186
0c1b6fac S	187	#ifdef CONFIG_SOC_OMAP5
58cda01e	188	static const char *const omap5_boards_compat[] __initconst = {
b83a08fe NM	189	"ti,omap5432",
b83a08fe NM	190	"ti,omap5430",
0c1b6fac S	191	"ti,omap5",
	192	NULL,
	193	};
	194
	195	DT_MACHINE_START(OMAP5_DT, "Generic OMAP5 (Flattened Device Tree)")
	196	.reserve = omap_reserve,
06915321	197	.smp = smp_ops(omap4_smp_ops),
0c1b6fac S	198	.map_io = omap5_map_io,
	199	.init_early = omap5_init_early,
	200	.init_irq = omap_gic_of_init,
0c1b6fac	201	.init_machine = omap_generic_init,
765e7a06	202	.init_late = omap5_init_late,
6bb27d73	203	.init_time = omap5_realtime_timer_init,
0c1b6fac	204	.dt_compat = omap5_boards_compat,
187e3e06	205	.restart = omap44xx_restart,
0c1b6fac S	206	MACHINE_END
0c1b6fac S	207	#endif
bb256f80 AM	208
bb256f80 AM	209	#ifdef CONFIG_SOC_AM43XX
58cda01e	210	static const char *const am43_boards_compat[] __initconst = {
b83a08fe	211	"ti,am4372",
bb256f80 AM	212	"ti,am43",
	213	NULL,
	214	};
	215
	216	DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)")
	217	.map_io = am33xx_map_io,
	218	.init_early = am43xx_init_early,
765e7a06	219	.init_late = am43xx_init_late,
bb256f80 AM	220	.init_irq = omap_gic_of_init,
bb256f80 AM	221	.init_machine = omap_generic_init,
5b5c0135	222	.init_time = omap3_gptimer_timer_init,
bb256f80	223	.dt_compat = am43_boards_compat,
a7daf64a	224	.restart = omap44xx_restart,
bb256f80 AM	225	MACHINE_END
bb256f80 AM	226	#endif
439bf39e S	227
439bf39e S	228	#ifdef CONFIG_SOC_DRA7XX
58cda01e	229	static const char *const dra74x_boards_compat[] __initconst = {
0e0cb99d NM	230	"ti,am5728",
0e0cb99d NM	231	"ti,am5726",
44e97ff6	232	"ti,dra742",
439bf39e S	233	"ti,dra7",
	234	NULL,
	235	};
	236
44e97ff6	237	DT_MACHINE_START(DRA74X_DT, "Generic DRA74X (Flattened Device Tree)")
439bf39e S	238	.reserve = omap_reserve,
	239	.smp = smp_ops(omap4_smp_ops),
	240	.map_io = omap5_map_io,
	241	.init_early = dra7xx_init_early,
765e7a06	242	.init_late = dra7xx_init_late,
439bf39e S	243	.init_irq = omap_gic_of_init,
	244	.init_machine = omap_generic_init,
	245	.init_time = omap5_realtime_timer_init,
44e97ff6 RN	246	.dt_compat = dra74x_boards_compat,
	247	.restart = omap44xx_restart,
	248	MACHINE_END
	249
58cda01e	250	static const char *const dra72x_boards_compat[] __initconst = {
0e0cb99d NM	251	"ti,am5718",
0e0cb99d NM	252	"ti,am5716",
44e97ff6 RN	253	"ti,dra722",
	254	NULL,
	255	};
	256
	257	DT_MACHINE_START(DRA72X_DT, "Generic DRA72X (Flattened Device Tree)")
	258	.reserve = omap_reserve,
	259	.map_io = omap5_map_io,
	260	.init_early = dra7xx_init_early,
	261	.init_late = dra7xx_init_late,
	262	.init_irq = omap_gic_of_init,
	263	.init_machine = omap_generic_init,
	264	.init_time = omap5_realtime_timer_init,
	265	.dt_compat = dra72x_boards_compat,
1d597b07	266	.restart = omap44xx_restart,
439bf39e S	267	MACHINE_END
439bf39e S	268	#endif