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1dbae815 | 1 | /* |
1dbae815 TL |
2 | * Copyright (C) 2005 Nokia Corporation |
3 | * Author: Paul Mundt <paul.mundt@nokia.com> | |
4 | * | |
8d61649d | 5 | * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ |
1dbae815 | 6 | * |
8d61649d BC |
7 | * Modified from the original mach-omap/omap2/board-generic.c did by Paul |
8 | * to support the OMAP2+ device tree boards with an unique board file. | |
1dbae815 TL |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
8d61649d | 14 | #include <linux/io.h> |
fbf75da7 | 15 | #include <linux/of_irq.h> |
8d61649d BC |
16 | #include <linux/of_platform.h> |
17 | #include <linux/irqdomain.h> | |
1dbae815 | 18 | |
1dbae815 | 19 | #include <asm/mach/arch.h> |
1dbae815 | 20 | |
4e65331c | 21 | #include "common.h" |
8d61649d | 22 | |
75a57fe9 | 23 | #if !(defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)) |
c4082d49 | 24 | #define intc_of_init NULL |
75a57fe9 TL |
25 | #endif |
26 | #ifndef CONFIG_ARCH_OMAP4 | |
27 | #define gic_of_init NULL | |
28 | #endif | |
29 | ||
8d61649d BC |
30 | static struct of_device_id omap_dt_match_table[] __initdata = { |
31 | { .compatible = "simple-bus", }, | |
32 | { .compatible = "ti,omap-infra", }, | |
33 | { } | |
b3c6df3a PW |
34 | }; |
35 | ||
1dbae815 TL |
36 | static void __init omap_generic_init(void) |
37 | { | |
a4ca9dbe | 38 | omap_sdrc_init(NULL, NULL); |
1dbae815 | 39 | |
8d61649d | 40 | of_platform_populate(NULL, omap_dt_match_table, NULL, NULL); |
6a08e1e6 | 41 | pdata_quirks_init(); |
1dbae815 TL |
42 | } |
43 | ||
0e02a8c1 | 44 | #ifdef CONFIG_SOC_OMAP2420 |
8d61649d BC |
45 | static const char *omap242x_boards_compat[] __initdata = { |
46 | "ti,omap2420", | |
47 | NULL, | |
48 | }; | |
49 | ||
50 | DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)") | |
51 | .reserve = omap_reserve, | |
52 | .map_io = omap242x_map_io, | |
53 | .init_early = omap2420_init_early, | |
c4082d49 | 54 | .init_irq = omap_intc_of_init, |
b755706c | 55 | .handle_irq = omap2_intc_handle_irq, |
8d61649d | 56 | .init_machine = omap_generic_init, |
6bb27d73 | 57 | .init_time = omap2_sync32k_timer_init, |
8d61649d | 58 | .dt_compat = omap242x_boards_compat, |
187e3e06 | 59 | .restart = omap2xxx_restart, |
8d61649d BC |
60 | MACHINE_END |
61 | #endif | |
62 | ||
0e02a8c1 | 63 | #ifdef CONFIG_SOC_OMAP2430 |
8d61649d BC |
64 | static const char *omap243x_boards_compat[] __initdata = { |
65 | "ti,omap2430", | |
66 | NULL, | |
67 | }; | |
68 | ||
69 | DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)") | |
71ee7dad | 70 | .reserve = omap_reserve, |
8d61649d BC |
71 | .map_io = omap243x_map_io, |
72 | .init_early = omap2430_init_early, | |
c4082d49 | 73 | .init_irq = omap_intc_of_init, |
6b2f55d7 | 74 | .handle_irq = omap2_intc_handle_irq, |
1dbae815 | 75 | .init_machine = omap_generic_init, |
6bb27d73 | 76 | .init_time = omap2_sync32k_timer_init, |
8d61649d | 77 | .dt_compat = omap243x_boards_compat, |
187e3e06 | 78 | .restart = omap2xxx_restart, |
8d61649d BC |
79 | MACHINE_END |
80 | #endif | |
81 | ||
0e02a8c1 | 82 | #ifdef CONFIG_ARCH_OMAP3 |
8d61649d BC |
83 | static const char *omap3_boards_compat[] __initdata = { |
84 | "ti,omap3", | |
85 | NULL, | |
86 | }; | |
87 | ||
88 | DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)") | |
89 | .reserve = omap_reserve, | |
90 | .map_io = omap3_map_io, | |
91 | .init_early = omap3430_init_early, | |
c4082d49 | 92 | .init_irq = omap_intc_of_init, |
b755706c | 93 | .handle_irq = omap3_intc_handle_irq, |
93651b85 | 94 | .init_machine = omap_generic_init, |
990fa4f5 | 95 | .init_late = omap3_init_late, |
6bb27d73 | 96 | .init_time = omap3_sync32k_timer_init, |
8d61649d | 97 | .dt_compat = omap3_boards_compat, |
187e3e06 | 98 | .restart = omap3xxx_restart, |
8d61649d | 99 | MACHINE_END |
7dd9d502 JH |
100 | |
101 | static const char *omap3_gp_boards_compat[] __initdata = { | |
102 | "ti,omap3-beagle", | |
4bfe6341 | 103 | "timll,omap3-devkit8000", |
7dd9d502 JH |
104 | NULL, |
105 | }; | |
106 | ||
107 | DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)") | |
108 | .reserve = omap_reserve, | |
109 | .map_io = omap3_map_io, | |
110 | .init_early = omap3430_init_early, | |
111 | .init_irq = omap_intc_of_init, | |
112 | .handle_irq = omap3_intc_handle_irq, | |
113 | .init_machine = omap_generic_init, | |
990fa4f5 | 114 | .init_late = omap3_init_late, |
6bb27d73 | 115 | .init_time = omap3_secure_sync32k_timer_init, |
7dd9d502 | 116 | .dt_compat = omap3_gp_boards_compat, |
d01e4afd | 117 | .restart = omap3xxx_restart, |
8d61649d BC |
118 | MACHINE_END |
119 | #endif | |
120 | ||
08f30989 AM |
121 | #ifdef CONFIG_SOC_AM33XX |
122 | static const char *am33xx_boards_compat[] __initdata = { | |
123 | "ti,am33xx", | |
124 | NULL, | |
125 | }; | |
126 | ||
127 | DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)") | |
128 | .reserve = omap_reserve, | |
129 | .map_io = am33xx_map_io, | |
130 | .init_early = am33xx_init_early, | |
c4082d49 | 131 | .init_irq = omap_intc_of_init, |
08f30989 AM |
132 | .handle_irq = omap3_intc_handle_irq, |
133 | .init_machine = omap_generic_init, | |
00ea4d56 | 134 | .init_time = omap3_gptimer_timer_init, |
08f30989 | 135 | .dt_compat = am33xx_boards_compat, |
14e067c1 | 136 | .restart = am33xx_restart, |
08f30989 AM |
137 | MACHINE_END |
138 | #endif | |
139 | ||
0e02a8c1 | 140 | #ifdef CONFIG_ARCH_OMAP4 |
8d61649d BC |
141 | static const char *omap4_boards_compat[] __initdata = { |
142 | "ti,omap4", | |
143 | NULL, | |
144 | }; | |
145 | ||
146 | DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)") | |
147 | .reserve = omap_reserve, | |
06915321 | 148 | .smp = smp_ops(omap4_smp_ops), |
8d61649d BC |
149 | .map_io = omap4_map_io, |
150 | .init_early = omap4430_init_early, | |
c4082d49 | 151 | .init_irq = omap_gic_of_init, |
93651b85 | 152 | .init_machine = omap_generic_init, |
bbd707ac | 153 | .init_late = omap4430_init_late, |
6bb27d73 | 154 | .init_time = omap4_local_timer_init, |
8d61649d | 155 | .dt_compat = omap4_boards_compat, |
187e3e06 | 156 | .restart = omap44xx_restart, |
1dbae815 | 157 | MACHINE_END |
8d61649d | 158 | #endif |
0c1b6fac S |
159 | |
160 | #ifdef CONFIG_SOC_OMAP5 | |
161 | static const char *omap5_boards_compat[] __initdata = { | |
162 | "ti,omap5", | |
163 | NULL, | |
164 | }; | |
165 | ||
166 | DT_MACHINE_START(OMAP5_DT, "Generic OMAP5 (Flattened Device Tree)") | |
167 | .reserve = omap_reserve, | |
06915321 | 168 | .smp = smp_ops(omap4_smp_ops), |
0c1b6fac S |
169 | .map_io = omap5_map_io, |
170 | .init_early = omap5_init_early, | |
171 | .init_irq = omap_gic_of_init, | |
0c1b6fac | 172 | .init_machine = omap_generic_init, |
6bb27d73 | 173 | .init_time = omap5_realtime_timer_init, |
0c1b6fac | 174 | .dt_compat = omap5_boards_compat, |
187e3e06 | 175 | .restart = omap44xx_restart, |
0c1b6fac S |
176 | MACHINE_END |
177 | #endif | |
bb256f80 AM |
178 | |
179 | #ifdef CONFIG_SOC_AM43XX | |
180 | static const char *am43_boards_compat[] __initdata = { | |
181 | "ti,am43", | |
182 | NULL, | |
183 | }; | |
184 | ||
185 | DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)") | |
186 | .map_io = am33xx_map_io, | |
187 | .init_early = am43xx_init_early, | |
188 | .init_irq = omap_gic_of_init, | |
189 | .init_machine = omap_generic_init, | |
190 | .init_time = omap3_sync32k_timer_init, | |
191 | .dt_compat = am43_boards_compat, | |
192 | MACHINE_END | |
193 | #endif | |
439bf39e S |
194 | |
195 | #ifdef CONFIG_SOC_DRA7XX | |
196 | static const char *dra7xx_boards_compat[] __initdata = { | |
197 | "ti,dra7", | |
198 | NULL, | |
199 | }; | |
200 | ||
201 | DT_MACHINE_START(DRA7XX_DT, "Generic DRA7XX (Flattened Device Tree)") | |
202 | .reserve = omap_reserve, | |
203 | .smp = smp_ops(omap4_smp_ops), | |
204 | .map_io = omap5_map_io, | |
205 | .init_early = dra7xx_init_early, | |
206 | .init_irq = omap_gic_of_init, | |
207 | .init_machine = omap_generic_init, | |
208 | .init_time = omap5_realtime_timer_init, | |
209 | .dt_compat = dra7xx_boards_compat, | |
1d597b07 | 210 | .restart = omap44xx_restart, |
439bf39e S |
211 | MACHINE_END |
212 | #endif |