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s3c2410fb: multi-display support
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a21765a7 1/* linux/arch/arm/mach-s3c2440/mach-smdk2440.c
1da177e4
LT
2 *
3 * Copyright (c) 2004,2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * http://www.fluff.org/ben/smdk2440/
7 *
8 * Thanks to Dimity Andric and TomTom for the loan of an SMDK2440.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
1da177e4
LT
14*/
15
16#include <linux/kernel.h>
17#include <linux/types.h>
18#include <linux/interrupt.h>
19#include <linux/list.h>
20#include <linux/timer.h>
21#include <linux/init.h>
b6d1f542 22#include <linux/serial_core.h>
d052d1be 23#include <linux/platform_device.h>
1da177e4
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24
25#include <asm/mach/arch.h>
26#include <asm/mach/map.h>
27#include <asm/mach/irq.h>
28
29#include <asm/hardware.h>
1da177e4
LT
30#include <asm/io.h>
31#include <asm/irq.h>
32#include <asm/mach-types.h>
33
531b617c 34#include <asm/plat-s3c/regs-serial.h>
1da177e4 35#include <asm/arch/regs-gpio.h>
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BD
36#include <asm/arch/regs-lcd.h>
37
1da177e4 38#include <asm/arch/idle.h>
57718976 39#include <asm/arch/fb.h>
1da177e4 40
a21765a7
BD
41#include <asm/plat-s3c24xx/s3c2410.h>
42#include <asm/plat-s3c24xx/s3c2440.h>
43#include <asm/plat-s3c24xx/clock.h>
44#include <asm/plat-s3c24xx/devs.h>
45#include <asm/plat-s3c24xx/cpu.h>
d3f4c571 46
a21765a7 47#include <asm/plat-s3c24xx/common-smdk.h>
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48
49static struct map_desc smdk2440_iodesc[] __initdata = {
50 /* ISA IO Space map (memory space selected by A24) */
51
cbe69f95
BD
52 {
53 .virtual = (u32)S3C24XX_VA_ISA_WORD,
54 .pfn = __phys_to_pfn(S3C2410_CS2),
55 .length = 0x10000,
56 .type = MT_DEVICE,
57 }, {
58 .virtual = (u32)S3C24XX_VA_ISA_WORD + 0x10000,
59 .pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
60 .length = SZ_4M,
61 .type = MT_DEVICE,
62 }, {
63 .virtual = (u32)S3C24XX_VA_ISA_BYTE,
64 .pfn = __phys_to_pfn(S3C2410_CS2),
65 .length = 0x10000,
66 .type = MT_DEVICE,
67 }, {
68 .virtual = (u32)S3C24XX_VA_ISA_BYTE + 0x10000,
69 .pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
70 .length = SZ_4M,
71 .type = MT_DEVICE,
72 }
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73};
74
75#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
76#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
77#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
78
66a9b49a 79static struct s3c2410_uartcfg smdk2440_uartcfgs[] __initdata = {
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LT
80 [0] = {
81 .hwport = 0,
82 .flags = 0,
83 .ucon = 0x3c5,
84 .ulcon = 0x03,
85 .ufcon = 0x51,
86 },
87 [1] = {
88 .hwport = 1,
89 .flags = 0,
90 .ucon = 0x3c5,
91 .ulcon = 0x03,
92 .ufcon = 0x51,
93 },
94 /* IR port */
95 [2] = {
96 .hwport = 2,
97 .flags = 0,
98 .ucon = 0x3c5,
99 .ulcon = 0x43,
100 .ufcon = 0x51,
101 }
102};
103
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BD
104/* LCD driver info */
105
09fe75f6 106static struct s3c2410fb_display smdk2440_lcd_cfg __initdata = {
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BD
107 .regs = {
108
109 .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
110 S3C2410_LCDCON1_TFT |
111 S3C2410_LCDCON1_CLKVAL(0x04),
112
113 .lcdcon2 = S3C2410_LCDCON2_VBPD(7) |
114 S3C2410_LCDCON2_LINEVAL(319) |
115 S3C2410_LCDCON2_VFPD(6) |
116 S3C2410_LCDCON2_VSPW(3),
117
118 .lcdcon3 = S3C2410_LCDCON3_HBPD(19) |
119 S3C2410_LCDCON3_HOZVAL(239) |
120 S3C2410_LCDCON3_HFPD(7),
121
122 .lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
123 S3C2410_LCDCON4_HSPW(3),
124
125 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
126 S3C2410_LCDCON5_INVVLINE |
127 S3C2410_LCDCON5_INVVFRAME |
128 S3C2410_LCDCON5_PWREN |
129 S3C2410_LCDCON5_HWSWP,
130 },
131
09fe75f6
KH
132 .type = S3C2410_LCDCON1_TFT16BPP,
133
134 .width = 240,
135 .height = 320,
136
137 .xres = 240,
138 .yres = 320,
139 .bpp = 16,
140};
141
142static struct s3c2410fb_mach_info smdk2440_fb_info __initdata = {
143 .displays = &smdk2440_lcd_cfg,
144 .num_displays = 1,
145 .default_display = 0,
146
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BD
147#if 0
148 /* currently setup by downloader */
149 .gpccon = 0xaa940659,
150 .gpccon_mask = 0xffffffff,
151 .gpcup = 0x0000ffff,
152 .gpcup_mask = 0xffffffff,
153 .gpdcon = 0xaa84aaa0,
154 .gpdcon_mask = 0xffffffff,
155 .gpdup = 0x0000faff,
156 .gpdup_mask = 0xffffffff,
157#endif
158
159 .lpcsel = ((0xCE6) & ~7) | 1<<4,
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BD
160};
161
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162static struct platform_device *smdk2440_devices[] __initdata = {
163 &s3c_device_usb,
164 &s3c_device_lcd,
165 &s3c_device_wdt,
166 &s3c_device_i2c,
167 &s3c_device_iis,
168};
169
5fe10ab1 170static void __init smdk2440_map_io(void)
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LT
171{
172 s3c24xx_init_io(smdk2440_iodesc, ARRAY_SIZE(smdk2440_iodesc));
173 s3c24xx_init_clocks(16934400);
174 s3c24xx_init_uarts(smdk2440_uartcfgs, ARRAY_SIZE(smdk2440_uartcfgs));
1da177e4
LT
175}
176
5fe10ab1 177static void __init smdk2440_machine_init(void)
1da177e4 178{
09fe75f6 179 s3c24xx_fb_set_platdata(&smdk2440_fb_info);
57718976 180
57e5171c 181 platform_add_devices(smdk2440_devices, ARRAY_SIZE(smdk2440_devices));
d3f4c571 182 smdk_machine_init();
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LT
183}
184
185MACHINE_START(S3C2440, "SMDK2440")
e9dea0c6 186 /* Maintainer: Ben Dooks <ben@fluff.org> */
e9dea0c6
RK
187 .phys_io = S3C2410_PA_UART,
188 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
189 .boot_params = S3C2410_SDRAM_PA + 0x100,
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LT
190
191 .init_irq = s3c24xx_init_irq,
192 .map_io = smdk2440_map_io,
193 .init_machine = smdk2440_machine_init,
194 .timer = &s3c24xx_timer,
195MACHINE_END