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b1d69cc6 CY |
1 | /* linux/arch/arm/mach-s5pv310/mach-smdkv310.c |
2 | * | |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | |
4 | * http://www.samsung.com/ | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/serial_core.h> | |
2b11148a HL |
12 | #include <linux/gpio.h> |
13 | #include <linux/mmc/host.h> | |
14 | #include <linux/platform_device.h> | |
cbff3eb3 DM |
15 | #include <linux/smsc911x.h> |
16 | #include <linux/io.h> | |
6f5c11c5 | 17 | #include <linux/i2c.h> |
b1d69cc6 CY |
18 | |
19 | #include <asm/mach/arch.h> | |
20 | #include <asm/mach-types.h> | |
b1d69cc6 CY |
21 | |
22 | #include <plat/regs-serial.h> | |
8cf460a5 | 23 | #include <plat/regs-srom.h> |
b1d69cc6 CY |
24 | #include <plat/s5pv310.h> |
25 | #include <plat/cpu.h> | |
cdff6e6f | 26 | #include <plat/devs.h> |
2b11148a | 27 | #include <plat/sdhci.h> |
6f5c11c5 | 28 | #include <plat/iic.h> |
d6d8b481 | 29 | #include <plat/pd.h> |
b1d69cc6 CY |
30 | |
31 | #include <mach/map.h> | |
32 | ||
33 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | |
34 | #define SMDKV310_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | |
35 | S3C2410_UCON_RXILEVEL | \ | |
36 | S3C2410_UCON_TXIRQMODE | \ | |
37 | S3C2410_UCON_RXIRQMODE | \ | |
38 | S3C2410_UCON_RXFIFO_TOI | \ | |
39 | S3C2443_UCON_RXERR_IRQEN) | |
40 | ||
41 | #define SMDKV310_ULCON_DEFAULT S3C2410_LCON_CS8 | |
42 | ||
43 | #define SMDKV310_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | |
44 | S5PV210_UFCON_TXTRIG4 | \ | |
45 | S5PV210_UFCON_RXTRIG4) | |
46 | ||
47 | static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = { | |
48 | [0] = { | |
49 | .hwport = 0, | |
50 | .flags = 0, | |
51 | .ucon = SMDKV310_UCON_DEFAULT, | |
52 | .ulcon = SMDKV310_ULCON_DEFAULT, | |
53 | .ufcon = SMDKV310_UFCON_DEFAULT, | |
54 | }, | |
55 | [1] = { | |
56 | .hwport = 1, | |
57 | .flags = 0, | |
58 | .ucon = SMDKV310_UCON_DEFAULT, | |
59 | .ulcon = SMDKV310_ULCON_DEFAULT, | |
60 | .ufcon = SMDKV310_UFCON_DEFAULT, | |
61 | }, | |
62 | [2] = { | |
63 | .hwport = 2, | |
64 | .flags = 0, | |
65 | .ucon = SMDKV310_UCON_DEFAULT, | |
66 | .ulcon = SMDKV310_ULCON_DEFAULT, | |
67 | .ufcon = SMDKV310_UFCON_DEFAULT, | |
68 | }, | |
69 | [3] = { | |
70 | .hwport = 3, | |
71 | .flags = 0, | |
72 | .ucon = SMDKV310_UCON_DEFAULT, | |
73 | .ulcon = SMDKV310_ULCON_DEFAULT, | |
74 | .ufcon = SMDKV310_UFCON_DEFAULT, | |
75 | }, | |
76 | }; | |
77 | ||
2b11148a HL |
78 | static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = { |
79 | .cd_type = S3C_SDHCI_CD_GPIO, | |
80 | .ext_cd_gpio = S5PV310_GPK0(2), | |
81 | .ext_cd_gpio_invert = 1, | |
28c80aa7 | 82 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, |
2b11148a HL |
83 | #ifdef CONFIG_S5PV310_SDHCI_CH0_8BIT |
84 | .max_width = 8, | |
85 | .host_caps = MMC_CAP_8_BIT_DATA, | |
86 | #endif | |
87 | }; | |
88 | ||
89 | static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = { | |
90 | .cd_type = S3C_SDHCI_CD_GPIO, | |
91 | .ext_cd_gpio = S5PV310_GPK0(2), | |
92 | .ext_cd_gpio_invert = 1, | |
28c80aa7 | 93 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, |
2b11148a HL |
94 | }; |
95 | ||
96 | static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = { | |
97 | .cd_type = S3C_SDHCI_CD_GPIO, | |
98 | .ext_cd_gpio = S5PV310_GPK2(2), | |
99 | .ext_cd_gpio_invert = 1, | |
28c80aa7 | 100 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, |
2b11148a HL |
101 | #ifdef CONFIG_S5PV310_SDHCI_CH2_8BIT |
102 | .max_width = 8, | |
103 | .host_caps = MMC_CAP_8_BIT_DATA, | |
104 | #endif | |
105 | }; | |
106 | ||
107 | static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = { | |
108 | .cd_type = S3C_SDHCI_CD_GPIO, | |
109 | .ext_cd_gpio = S5PV310_GPK2(2), | |
110 | .ext_cd_gpio_invert = 1, | |
28c80aa7 | 111 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, |
2b11148a HL |
112 | }; |
113 | ||
cbff3eb3 DM |
114 | static struct resource smdkv310_smsc911x_resources[] = { |
115 | [0] = { | |
116 | .start = S5PV310_PA_SROM_BANK(1), | |
117 | .end = S5PV310_PA_SROM_BANK(1) + SZ_64K - 1, | |
118 | .flags = IORESOURCE_MEM, | |
119 | }, | |
120 | [1] = { | |
121 | .start = IRQ_EINT(5), | |
122 | .end = IRQ_EINT(5), | |
123 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, | |
124 | }, | |
125 | }; | |
126 | ||
127 | static struct smsc911x_platform_config smsc9215_config = { | |
128 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH, | |
129 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, | |
130 | .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY, | |
131 | .phy_interface = PHY_INTERFACE_MODE_MII, | |
132 | .mac = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67}, | |
133 | }; | |
134 | ||
135 | static struct platform_device smdkv310_smsc911x = { | |
136 | .name = "smsc911x", | |
137 | .id = -1, | |
138 | .num_resources = ARRAY_SIZE(smdkv310_smsc911x_resources), | |
139 | .resource = smdkv310_smsc911x_resources, | |
140 | .dev = { | |
141 | .platform_data = &smsc9215_config, | |
142 | }, | |
143 | }; | |
144 | ||
6f5c11c5 JB |
145 | static struct i2c_board_info i2c_devs1[] __initdata = { |
146 | {I2C_BOARD_INFO("wm8994", 0x1a),}, | |
147 | }; | |
148 | ||
cdff6e6f | 149 | static struct platform_device *smdkv310_devices[] __initdata = { |
2b11148a HL |
150 | &s3c_device_hsmmc0, |
151 | &s3c_device_hsmmc1, | |
152 | &s3c_device_hsmmc2, | |
153 | &s3c_device_hsmmc3, | |
285dee7f | 154 | &s3c_device_i2c1, |
cdff6e6f | 155 | &s3c_device_rtc, |
8d75c912 | 156 | &s3c_device_wdt, |
906b9826 | 157 | &s5pv310_device_ac97, |
6f5c11c5 | 158 | &s5pv310_device_i2s0, |
d6d8b481 CY |
159 | &s5pv310_device_pd[PD_MFC], |
160 | &s5pv310_device_pd[PD_G3D], | |
161 | &s5pv310_device_pd[PD_LCD0], | |
162 | &s5pv310_device_pd[PD_LCD1], | |
163 | &s5pv310_device_pd[PD_CAM], | |
164 | &s5pv310_device_pd[PD_TV], | |
165 | &s5pv310_device_pd[PD_GPS], | |
ccbc8769 | 166 | &s5pv310_device_sysmmu, |
fbcb44de JB |
167 | &samsung_asoc_dma, |
168 | &smdkv310_smsc911x, | |
cdff6e6f CY |
169 | }; |
170 | ||
cbff3eb3 DM |
171 | static void __init smdkv310_smsc911x_init(void) |
172 | { | |
173 | u32 cs1; | |
174 | ||
175 | /* configure nCS1 width to 16 bits */ | |
8cf460a5 KK |
176 | cs1 = __raw_readl(S5P_SROM_BW) & |
177 | ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT); | |
178 | cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) | | |
179 | (1 << S5P_SROM_BW__WAITENABLE__SHIFT) | | |
180 | (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) << | |
181 | S5P_SROM_BW__NCS1__SHIFT; | |
182 | __raw_writel(cs1, S5P_SROM_BW); | |
cbff3eb3 DM |
183 | |
184 | /* set timing for nCS1 suitable for ethernet chip */ | |
8cf460a5 KK |
185 | __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) | |
186 | (0x9 << S5P_SROM_BCX__TACP__SHIFT) | | |
187 | (0xc << S5P_SROM_BCX__TCAH__SHIFT) | | |
188 | (0x1 << S5P_SROM_BCX__TCOH__SHIFT) | | |
189 | (0x6 << S5P_SROM_BCX__TACC__SHIFT) | | |
190 | (0x1 << S5P_SROM_BCX__TCOS__SHIFT) | | |
191 | (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1); | |
cbff3eb3 DM |
192 | } |
193 | ||
b1d69cc6 CY |
194 | static void __init smdkv310_map_io(void) |
195 | { | |
196 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | |
197 | s3c24xx_init_clocks(24000000); | |
198 | s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs)); | |
199 | } | |
200 | ||
201 | static void __init smdkv310_machine_init(void) | |
202 | { | |
6f5c11c5 JB |
203 | s3c_i2c1_set_platdata(NULL); |
204 | i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); | |
205 | ||
cbff3eb3 DM |
206 | smdkv310_smsc911x_init(); |
207 | ||
2b11148a HL |
208 | s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata); |
209 | s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata); | |
210 | s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata); | |
211 | s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata); | |
212 | ||
cdff6e6f | 213 | platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices)); |
b1d69cc6 CY |
214 | } |
215 | ||
216 | MACHINE_START(SMDKV310, "SMDKV310") | |
217 | /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ | |
218 | /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */ | |
b1d69cc6 CY |
219 | .boot_params = S5P_PA_SDRAM + 0x100, |
220 | .init_irq = s5pv310_init_irq, | |
221 | .map_io = smdkv310_map_io, | |
222 | .init_machine = smdkv310_machine_init, | |
223 | .timer = &s5pv310_timer, | |
224 | MACHINE_END |