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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/mach-sa1100/neponset.c | |
3 | * | |
4 | */ | |
5 | #include <linux/kernel.h> | |
6 | #include <linux/init.h> | |
1da177e4 LT |
7 | #include <linux/tty.h> |
8 | #include <linux/ioport.h> | |
9 | #include <linux/serial_core.h> | |
d052d1be | 10 | #include <linux/platform_device.h> |
1da177e4 | 11 | |
a09e64fb | 12 | #include <mach/hardware.h> |
1da177e4 LT |
13 | #include <asm/mach-types.h> |
14 | #include <asm/irq.h> | |
15 | #include <asm/mach/map.h> | |
16 | #include <asm/mach/irq.h> | |
17 | #include <asm/mach/serial_sa1100.h> | |
a09e64fb RK |
18 | #include <mach/assabet.h> |
19 | #include <mach/neponset.h> | |
1da177e4 LT |
20 | #include <asm/hardware/sa1111.h> |
21 | #include <asm/sizes.h> | |
22 | ||
23 | /* | |
24 | * Install handler for Neponset IRQ. Note that we have to loop here | |
25 | * since the ETHERNET and USAR IRQs are level based, and we need to | |
26 | * ensure that the IRQ signal is deasserted before returning. This | |
27 | * is rather unfortunate. | |
28 | */ | |
29 | static void | |
10dd5ce2 | 30 | neponset_irq_handler(unsigned int irq, struct irq_desc *desc) |
1da177e4 LT |
31 | { |
32 | unsigned int irr; | |
33 | ||
34 | while (1) { | |
1da177e4 LT |
35 | /* |
36 | * Acknowledge the parent IRQ. | |
37 | */ | |
c4e8964e | 38 | desc->irq_data.chip->irq_ack(&desc->irq_data); |
1da177e4 LT |
39 | |
40 | /* | |
41 | * Read the interrupt reason register. Let's have all | |
42 | * active IRQ bits high. Note: there is a typo in the | |
43 | * Neponset user's guide for the SA1111 IRR level. | |
44 | */ | |
45 | irr = IRR ^ (IRR_ETHERNET | IRR_USAR); | |
46 | ||
47 | if ((irr & (IRR_ETHERNET | IRR_USAR | IRR_SA1111)) == 0) | |
48 | break; | |
49 | ||
50 | /* | |
51 | * Since there is no individual mask, we have to | |
52 | * mask the parent IRQ. This is safe, since we'll | |
53 | * recheck the register for any pending IRQs. | |
54 | */ | |
55 | if (irr & (IRR_ETHERNET | IRR_USAR)) { | |
c4e8964e | 56 | desc->irq_data.chip->irq_mask(&desc->irq_data); |
1da177e4 | 57 | |
d782f33d RK |
58 | /* |
59 | * Ack the interrupt now to prevent re-entering | |
60 | * this neponset handler. Again, this is safe | |
61 | * since we'll check the IRR register prior to | |
62 | * leaving. | |
63 | */ | |
c4e8964e | 64 | desc->irq_data.chip->irq_ack(&desc->irq_data); |
d782f33d | 65 | |
1da177e4 | 66 | if (irr & IRR_ETHERNET) { |
d8aa0251 | 67 | generic_handle_irq(IRQ_NEPONSET_SMC9196); |
1da177e4 LT |
68 | } |
69 | ||
70 | if (irr & IRR_USAR) { | |
d8aa0251 | 71 | generic_handle_irq(IRQ_NEPONSET_USAR); |
1da177e4 LT |
72 | } |
73 | ||
c4e8964e | 74 | desc->irq_data.chip->irq_unmask(&desc->irq_data); |
1da177e4 LT |
75 | } |
76 | ||
77 | if (irr & IRR_SA1111) { | |
d8aa0251 | 78 | generic_handle_irq(IRQ_NEPONSET_SA1111); |
1da177e4 LT |
79 | } |
80 | } | |
81 | } | |
82 | ||
83 | static void neponset_set_mctrl(struct uart_port *port, u_int mctrl) | |
84 | { | |
85 | u_int mdm_ctl0 = MDM_CTL_0; | |
86 | ||
87 | if (port->mapbase == _Ser1UTCR0) { | |
88 | if (mctrl & TIOCM_RTS) | |
89 | mdm_ctl0 &= ~MDM_CTL0_RTS2; | |
90 | else | |
91 | mdm_ctl0 |= MDM_CTL0_RTS2; | |
92 | ||
93 | if (mctrl & TIOCM_DTR) | |
94 | mdm_ctl0 &= ~MDM_CTL0_DTR2; | |
95 | else | |
96 | mdm_ctl0 |= MDM_CTL0_DTR2; | |
97 | } else if (port->mapbase == _Ser3UTCR0) { | |
98 | if (mctrl & TIOCM_RTS) | |
99 | mdm_ctl0 &= ~MDM_CTL0_RTS1; | |
100 | else | |
101 | mdm_ctl0 |= MDM_CTL0_RTS1; | |
102 | ||
103 | if (mctrl & TIOCM_DTR) | |
104 | mdm_ctl0 &= ~MDM_CTL0_DTR1; | |
105 | else | |
106 | mdm_ctl0 |= MDM_CTL0_DTR1; | |
107 | } | |
108 | ||
109 | MDM_CTL_0 = mdm_ctl0; | |
110 | } | |
111 | ||
112 | static u_int neponset_get_mctrl(struct uart_port *port) | |
113 | { | |
114 | u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR; | |
115 | u_int mdm_ctl1 = MDM_CTL_1; | |
116 | ||
117 | if (port->mapbase == _Ser1UTCR0) { | |
118 | if (mdm_ctl1 & MDM_CTL1_DCD2) | |
119 | ret &= ~TIOCM_CD; | |
120 | if (mdm_ctl1 & MDM_CTL1_CTS2) | |
121 | ret &= ~TIOCM_CTS; | |
122 | if (mdm_ctl1 & MDM_CTL1_DSR2) | |
123 | ret &= ~TIOCM_DSR; | |
124 | } else if (port->mapbase == _Ser3UTCR0) { | |
125 | if (mdm_ctl1 & MDM_CTL1_DCD1) | |
126 | ret &= ~TIOCM_CD; | |
127 | if (mdm_ctl1 & MDM_CTL1_CTS1) | |
128 | ret &= ~TIOCM_CTS; | |
129 | if (mdm_ctl1 & MDM_CTL1_DSR1) | |
130 | ret &= ~TIOCM_DSR; | |
131 | } | |
132 | ||
133 | return ret; | |
134 | } | |
135 | ||
cdea4606 | 136 | static struct sa1100_port_fns neponset_port_fns __devinitdata = { |
1da177e4 LT |
137 | .set_mctrl = neponset_set_mctrl, |
138 | .get_mctrl = neponset_get_mctrl, | |
139 | }; | |
140 | ||
cdea4606 | 141 | static int __devinit neponset_probe(struct platform_device *dev) |
1da177e4 LT |
142 | { |
143 | sa1100_register_uart_fns(&neponset_port_fns); | |
144 | ||
145 | /* | |
146 | * Install handler for GPIO25. | |
147 | */ | |
6845664a TG |
148 | irq_set_irq_type(IRQ_GPIO25, IRQ_TYPE_EDGE_RISING); |
149 | irq_set_chained_handler(IRQ_GPIO25, neponset_irq_handler); | |
1da177e4 LT |
150 | |
151 | /* | |
152 | * We would set IRQ_GPIO25 to be a wake-up IRQ, but | |
153 | * unfortunately something on the Neponset activates | |
154 | * this IRQ on sleep (ethernet?) | |
155 | */ | |
156 | #if 0 | |
157 | enable_irq_wake(IRQ_GPIO25); | |
158 | #endif | |
159 | ||
160 | /* | |
161 | * Setup other Neponset IRQs. SA1111 will be done by the | |
162 | * generic SA1111 code. | |
163 | */ | |
6845664a | 164 | irq_set_handler(IRQ_NEPONSET_SMC9196, handle_simple_irq); |
1da177e4 | 165 | set_irq_flags(IRQ_NEPONSET_SMC9196, IRQF_VALID | IRQF_PROBE); |
6845664a | 166 | irq_set_handler(IRQ_NEPONSET_USAR, handle_simple_irq); |
1da177e4 LT |
167 | set_irq_flags(IRQ_NEPONSET_USAR, IRQF_VALID | IRQF_PROBE); |
168 | ||
169 | /* | |
170 | * Disable GPIO 0/1 drivers so the buttons work on the module. | |
171 | */ | |
172 | NCR_0 = NCR_GP01_OFF; | |
173 | ||
174 | return 0; | |
175 | } | |
176 | ||
177 | #ifdef CONFIG_PM | |
178 | ||
179 | /* | |
180 | * LDM power management. | |
181 | */ | |
93160c63 RW |
182 | static unsigned int neponset_saved_state; |
183 | ||
3ae5eaec | 184 | static int neponset_suspend(struct platform_device *dev, pm_message_t state) |
1da177e4 LT |
185 | { |
186 | /* | |
187 | * Save state. | |
188 | */ | |
93160c63 | 189 | neponset_saved_state = NCR_0; |
1da177e4 LT |
190 | |
191 | return 0; | |
192 | } | |
193 | ||
3ae5eaec | 194 | static int neponset_resume(struct platform_device *dev) |
1da177e4 | 195 | { |
93160c63 | 196 | NCR_0 = neponset_saved_state; |
1da177e4 LT |
197 | |
198 | return 0; | |
199 | } | |
200 | ||
201 | #else | |
202 | #define neponset_suspend NULL | |
203 | #define neponset_resume NULL | |
204 | #endif | |
205 | ||
3ae5eaec | 206 | static struct platform_driver neponset_device_driver = { |
1da177e4 LT |
207 | .probe = neponset_probe, |
208 | .suspend = neponset_suspend, | |
209 | .resume = neponset_resume, | |
3ae5eaec RK |
210 | .driver = { |
211 | .name = "neponset", | |
212 | }, | |
1da177e4 LT |
213 | }; |
214 | ||
215 | static struct resource neponset_resources[] = { | |
216 | [0] = { | |
217 | .start = 0x10000000, | |
218 | .end = 0x17ffffff, | |
219 | .flags = IORESOURCE_MEM, | |
220 | }, | |
221 | }; | |
222 | ||
223 | static struct platform_device neponset_device = { | |
224 | .name = "neponset", | |
225 | .id = 0, | |
226 | .num_resources = ARRAY_SIZE(neponset_resources), | |
227 | .resource = neponset_resources, | |
228 | }; | |
229 | ||
230 | static struct resource sa1111_resources[] = { | |
231 | [0] = { | |
232 | .start = 0x40000000, | |
233 | .end = 0x40001fff, | |
234 | .flags = IORESOURCE_MEM, | |
235 | }, | |
236 | [1] = { | |
237 | .start = IRQ_NEPONSET_SA1111, | |
238 | .end = IRQ_NEPONSET_SA1111, | |
239 | .flags = IORESOURCE_IRQ, | |
240 | }, | |
241 | }; | |
242 | ||
19851c58 EM |
243 | static struct sa1111_platform_data sa1111_info = { |
244 | .irq_base = IRQ_BOARD_END, | |
245 | }; | |
246 | ||
1da177e4 LT |
247 | static u64 sa1111_dmamask = 0xffffffffUL; |
248 | ||
249 | static struct platform_device sa1111_device = { | |
250 | .name = "sa1111", | |
251 | .id = 0, | |
252 | .dev = { | |
253 | .dma_mask = &sa1111_dmamask, | |
254 | .coherent_dma_mask = 0xffffffff, | |
19851c58 | 255 | .platform_data = &sa1111_info, |
1da177e4 LT |
256 | }, |
257 | .num_resources = ARRAY_SIZE(sa1111_resources), | |
258 | .resource = sa1111_resources, | |
259 | }; | |
260 | ||
261 | static struct resource smc91x_resources[] = { | |
262 | [0] = { | |
263 | .name = "smc91x-regs", | |
264 | .start = SA1100_CS3_PHYS, | |
265 | .end = SA1100_CS3_PHYS + 0x01ffffff, | |
266 | .flags = IORESOURCE_MEM, | |
267 | }, | |
268 | [1] = { | |
269 | .start = IRQ_NEPONSET_SMC9196, | |
270 | .end = IRQ_NEPONSET_SMC9196, | |
271 | .flags = IORESOURCE_IRQ, | |
272 | }, | |
273 | [2] = { | |
274 | .name = "smc91x-attrib", | |
275 | .start = SA1100_CS3_PHYS + 0x02000000, | |
276 | .end = SA1100_CS3_PHYS + 0x03ffffff, | |
277 | .flags = IORESOURCE_MEM, | |
278 | }, | |
279 | }; | |
280 | ||
281 | static struct platform_device smc91x_device = { | |
282 | .name = "smc91x", | |
283 | .id = 0, | |
284 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
285 | .resource = smc91x_resources, | |
286 | }; | |
287 | ||
288 | static struct platform_device *devices[] __initdata = { | |
289 | &neponset_device, | |
290 | &sa1111_device, | |
291 | &smc91x_device, | |
292 | }; | |
293 | ||
cdcb81f7 RK |
294 | extern void sa1110_mb_disable(void); |
295 | ||
1da177e4 LT |
296 | static int __init neponset_init(void) |
297 | { | |
3ae5eaec | 298 | platform_driver_register(&neponset_device_driver); |
1da177e4 LT |
299 | |
300 | /* | |
301 | * The Neponset is only present on the Assabet machine type. | |
302 | */ | |
303 | if (!machine_is_assabet()) | |
304 | return -ENODEV; | |
305 | ||
306 | /* | |
307 | * Ensure that the memory bus request/grant signals are setup, | |
308 | * and the grant is held in its inactive state, whether or not | |
309 | * we actually have a Neponset attached. | |
310 | */ | |
311 | sa1110_mb_disable(); | |
312 | ||
313 | if (!machine_has_neponset()) { | |
314 | printk(KERN_DEBUG "Neponset expansion board not present\n"); | |
315 | return -ENODEV; | |
316 | } | |
317 | ||
318 | if (WHOAMI != 0x11) { | |
319 | printk(KERN_WARNING "Neponset board detected, but " | |
320 | "wrong ID: %02x\n", WHOAMI); | |
321 | return -ENODEV; | |
322 | } | |
323 | ||
324 | return platform_add_devices(devices, ARRAY_SIZE(devices)); | |
325 | } | |
326 | ||
327 | subsys_initcall(neponset_init); | |
328 | ||
329 | static struct map_desc neponset_io_desc[] __initdata = { | |
92519d82 DS |
330 | { /* System Registers */ |
331 | .virtual = 0xf3000000, | |
332 | .pfn = __phys_to_pfn(0x10000000), | |
333 | .length = SZ_1M, | |
334 | .type = MT_DEVICE | |
335 | }, { /* SA-1111 */ | |
336 | .virtual = 0xf4000000, | |
337 | .pfn = __phys_to_pfn(0x40000000), | |
338 | .length = SZ_1M, | |
339 | .type = MT_DEVICE | |
340 | } | |
1da177e4 LT |
341 | }; |
342 | ||
343 | void __init neponset_map_io(void) | |
344 | { | |
345 | iotable_init(neponset_io_desc, ARRAY_SIZE(neponset_io_desc)); | |
346 | } |