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7db6c82a BD |
1 | /* linux/arch/arm/plat-s3c/include/plat/gpio-core.h |
2 | * | |
3 | * Copyright 2008 Simtec Electronics | |
4 | * http://armlinux.simtec.co.uk/ | |
5 | * Ben Dooks <ben@simtec.co.uk> | |
6 | * | |
7 | * S3C Platform - GPIO core | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
d5c1b541 MS |
14 | #ifndef __PLAT_SAMSUNG_GPIO_CORE_H |
15 | #define __PLAT_SAMSUNG_GPIO_CORE_H | |
16 | ||
2fd48f94 LW |
17 | /* Bring in machine-local definitions, especially S3C_GPIO_END */ |
18 | #include <mach/gpio-samsung.h> | |
19 | ||
1f323cfd KK |
20 | #define GPIOCON_OFF (0x00) |
21 | #define GPIODAT_OFF (0x04) | |
22 | ||
23 | #define con_4bit_shift(__off) ((__off) * 4) | |
24 | ||
7db6c82a BD |
25 | /* Define the core gpiolib support functions that the s3c platforms may |
26 | * need to extend or change depending on the hardware and the s3c chip | |
27 | * selected at build or found at run time. | |
28 | * | |
29 | * These definitions are not intended for driver inclusion, there is | |
30 | * nothing here that should not live outside the platform and core | |
31 | * specific code. | |
32 | */ | |
33 | ||
782d8a3c | 34 | struct samsung_gpio_chip; |
d87964c4 BD |
35 | |
36 | /** | |
782d8a3c | 37 | * struct samsung_gpio_pm - power management (suspend/resume) information |
d87964c4 BD |
38 | * @save: Routine to save the state of the GPIO block |
39 | * @resume: Routine to resume the GPIO block. | |
40 | */ | |
782d8a3c KK |
41 | struct samsung_gpio_pm { |
42 | void (*save)(struct samsung_gpio_chip *chip); | |
43 | void (*resume)(struct samsung_gpio_chip *chip); | |
d87964c4 BD |
44 | }; |
45 | ||
782d8a3c | 46 | struct samsung_gpio_cfg; |
21b23664 | 47 | |
7db6c82a | 48 | /** |
782d8a3c | 49 | * struct samsung_gpio_chip - wrapper for specific implementation of gpio |
7db6c82a BD |
50 | * @chip: The chip structure to be exported via gpiolib. |
51 | * @base: The base pointer to the gpio configuration registers. | |
170a4617 MS |
52 | * @group: The group register number for gpio interrupt support. |
53 | * @irq_base: The base irq number. | |
21b23664 | 54 | * @config: special function and pull-resistor control information. |
fcef85c0 | 55 | * @lock: Lock for exclusive access to this gpio bank. |
d87964c4 | 56 | * @pm_save: Save information for suspend/resume support. |
453e2dd7 | 57 | * @bitmap_gpio_int: Bitmap for representing GPIO interrupt or not. |
7db6c82a BD |
58 | * |
59 | * This wrapper provides the necessary information for the Samsung | |
60 | * specific gpios being registered with gpiolib. | |
fcef85c0 BD |
61 | * |
62 | * The lock protects each gpio bank from multiple access of the shared | |
63 | * configuration registers, or from reading of data whilst another thread | |
64 | * is writing to the register set. | |
65 | * | |
66 | * Each chip has its own lock to avoid any contention between different | |
67 | * CPU cores trying to get one lock for different GPIO banks, where each | |
68 | * bank of GPIO has its own register space and configuration registers. | |
7db6c82a | 69 | */ |
782d8a3c | 70 | struct samsung_gpio_chip { |
7db6c82a | 71 | struct gpio_chip chip; |
782d8a3c KK |
72 | struct samsung_gpio_cfg *config; |
73 | struct samsung_gpio_pm *pm; | |
7db6c82a | 74 | void __iomem *base; |
170a4617 MS |
75 | int irq_base; |
76 | int group; | |
fcef85c0 | 77 | spinlock_t lock; |
d87964c4 BD |
78 | #ifdef CONFIG_PM |
79 | u32 pm_save[4]; | |
80 | #endif | |
453e2dd7 | 81 | u32 bitmap_gpio_int; |
7db6c82a BD |
82 | }; |
83 | ||
782d8a3c | 84 | static inline struct samsung_gpio_chip *to_samsung_gpio(struct gpio_chip *gpc) |
7db6c82a | 85 | { |
782d8a3c | 86 | return container_of(gpc, struct samsung_gpio_chip, chip); |
7db6c82a BD |
87 | } |
88 | ||
8ce14a22 JS |
89 | /** |
90 | * samsung_gpiolib_to_irq - convert gpio pin to irq number | |
91 | * @chip: The gpio chip that the pin belongs to. | |
92 | * @offset: The offset of the pin in the chip. | |
93 | * | |
94 | * This helper returns the irq number calculated from the chip->irq_base and | |
95 | * the provided offset. | |
96 | */ | |
97 | extern int samsung_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset); | |
98 | ||
9bbb851c | 99 | /* exported for core SoC support to change */ |
782d8a3c | 100 | extern struct samsung_gpio_cfg s3c24xx_gpiocfg_default; |
9bbb851c | 101 | |
8a53bdb9 | 102 | #ifdef CONFIG_S3C_GPIO_TRACK |
782d8a3c | 103 | extern struct samsung_gpio_chip *s3c_gpios[S3C_GPIO_END]; |
8a53bdb9 | 104 | |
782d8a3c | 105 | static inline struct samsung_gpio_chip *samsung_gpiolib_getchip(unsigned int chip) |
8a53bdb9 | 106 | { |
21b23664 | 107 | return (chip < S3C_GPIO_END) ? s3c_gpios[chip] : NULL; |
8a53bdb9 BD |
108 | } |
109 | #else | |
782d8a3c | 110 | /* machine specific code should provide samsung_gpiolib_getchip */ |
21b23664 | 111 | |
0a2691da KK |
112 | extern struct samsung_gpio_chip s3c24xx_gpios[]; |
113 | ||
114 | static inline struct samsung_gpio_chip *samsung_gpiolib_getchip(unsigned int pin) | |
115 | { | |
116 | struct samsung_gpio_chip *chip; | |
117 | ||
118 | if (pin > S3C_GPIO_END) | |
119 | return NULL; | |
120 | ||
121 | chip = &s3c24xx_gpios[pin/32]; | |
122 | return ((pin - chip->chip.base) < chip->chip.ngpio) ? chip : NULL; | |
123 | } | |
e856bb1f | 124 | |
782d8a3c | 125 | static inline void s3c_gpiolib_track(struct samsung_gpio_chip *chip) { } |
8a53bdb9 | 126 | #endif |
d87964c4 BD |
127 | |
128 | #ifdef CONFIG_PM | |
782d8a3c KK |
129 | extern struct samsung_gpio_pm samsung_gpio_pm_1bit; |
130 | extern struct samsung_gpio_pm samsung_gpio_pm_2bit; | |
131 | extern struct samsung_gpio_pm samsung_gpio_pm_4bit; | |
d87964c4 BD |
132 | #define __gpio_pm(x) x |
133 | #else | |
782d8a3c KK |
134 | #define samsung_gpio_pm_1bit NULL |
135 | #define samsung_gpio_pm_2bit NULL | |
136 | #define samsung_gpio_pm_4bit NULL | |
d87964c4 BD |
137 | #define __gpio_pm(x) NULL |
138 | ||
139 | #endif /* CONFIG_PM */ | |
fcef85c0 BD |
140 | |
141 | /* locking wrappers to deal with multiple access to the same gpio bank */ | |
782d8a3c KK |
142 | #define samsung_gpio_lock(_oc, _fl) spin_lock_irqsave(&(_oc)->lock, _fl) |
143 | #define samsung_gpio_unlock(_oc, _fl) spin_unlock_irqrestore(&(_oc)->lock, _fl) | |
d5c1b541 MS |
144 | |
145 | #endif /* __PLAT_SAMSUNG_GPIO_CORE_H */ |