[mirror_ubuntu-artful-kernel.git] / arch / arm64 / boot / dts / amlogic / meson-gxl.dtsi

/*
 * Copyright (c) 2016 Endless Computers, Inc.
 * Author: Carlo Caione <carlo@endlessm.com>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This library is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of the
 *     License, or (at your option) any later version.
 *
 *     This library is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

#include "meson-gx.dtsi"
#include <dt-bindings/clock/gxbb-clkc.h>
#include <dt-bindings/gpio/meson-gxl-gpio.h>

/ {
	compatible = "amlogic,meson-gxl";
};

&ethmac {
	reg = <0x0 0xc9410000 0x0 0x10000
	       0x0 0xc8834540 0x0 0x4>;

	clocks = <&clkc CLKID_ETH>,
		 <&clkc CLKID_FCLK_DIV2>,
		 <&clkc CLKID_MPLL2>;
	clock-names = "stmmaceth", "clkin0", "clkin1";

	mdio0: mdio {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "snps,dwmac-mdio";
	};
};

&aobus {
	pinctrl_aobus: pinctrl@14 {
		compatible = "amlogic,meson-gxl-aobus-pinctrl";
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		gpio_ao: bank@14 {
			reg = <0x0 0x00014 0x0 0x8>,
			      <0x0 0x0002c 0x0 0x4>,
			      <0x0 0x00024 0x0 0x8>;
			reg-names = "mux", "pull", "gpio";
			gpio-controller;
			#gpio-cells = <2>;
		};

		uart_ao_a_pins: uart_ao_a {
			mux {
				groups = "uart_tx_ao_a", "uart_rx_ao_a";
				function = "uart_ao";
			};
		};

		remote_input_ao_pins: remote_input_ao {
			mux {
				groups = "remote_input_ao";
				function = "remote_input_ao";
			};
		};
	};
};

&periphs {
	pinctrl_periphs: pinctrl@4b0 {
		compatible = "amlogic,meson-gxl-periphs-pinctrl";
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		gpio: bank@4b0 {
			reg = <0x0 0x004b0 0x0 0x28>,
			      <0x0 0x004e8 0x0 0x14>,
			      <0x0 0x00120 0x0 0x14>,
			      <0x0 0x00430 0x0 0x40>;
			reg-names = "mux", "pull", "pull-enable", "gpio";
			gpio-controller;
			#gpio-cells = <2>;
		};

		emmc_pins: emmc {
			mux {
				groups = "emmc_nand_d07",
				       "emmc_cmd",
				       "emmc_clk",
				       "emmc_ds";
				function = "emmc";
			};
		};

		sdcard_pins: sdcard {
			mux {
				groups = "sdcard_d0",
				       "sdcard_d1",
				       "sdcard_d2",
				       "sdcard_d3",
				       "sdcard_cmd",
				       "sdcard_clk";
				function = "sdcard";
			};
		};

		sdio_pins: sdio {
			mux {
				groups = "sdio_d0",
				       "sdio_d1",
				       "sdio_d2",
				       "sdio_d3",
				       "sdio_cmd",
				       "sdio_clk";
				function = "sdio";
			};
		};

		sdio_irq_pins: sdio_irq {
			mux {
				groups = "sdio_irq";
				function = "sdio";
			};
		};

		uart_a_pins: uart_a {
			mux {
				groups = "uart_tx_a",
				       "uart_rx_a";
				function = "uart_a";
			};
		};

		uart_b_pins: uart_b {
			mux {
				groups = "uart_tx_b",
				       "uart_rx_b";
				function = "uart_b";
			};
		};

		uart_c_pins: uart_c {
			mux {
				groups = "uart_tx_c",
				       "uart_rx_c";
				function = "uart_c";
			};
		};

		i2c_a_pins: i2c_a {
			mux {
				groups = "i2c_sck_a",
				     "i2c_sda_a";
				function = "i2c_a";
			};
		};

		i2c_b_pins: i2c_b {
			mux {
				groups = "i2c_sck_b",
				      "i2c_sda_b";
				function = "i2c_b";
			};
		};

		i2c_c_pins: i2c_c {
			mux {
				groups = "i2c_sck_c",
				      "i2c_sda_c";
				function = "i2c_c";
			};
		};

		eth_pins: eth_c {
			mux {
				groups = "eth_mdio",
				       "eth_mdc",
				       "eth_clk_rx_clk",
				       "eth_rx_dv",
				       "eth_rxd0",
				       "eth_rxd1",
				       "eth_rxd2",
				       "eth_rxd3",
				       "eth_rgmii_tx_clk",
				       "eth_tx_en",
				       "eth_txd0",
				       "eth_txd1",
				       "eth_txd2",
				       "eth_txd3";
				function = "eth";
			};
		};

		pwm_e_pins: pwm_e {
			mux {
				groups = "pwm_e";
				function = "pwm_e";
			};
		};
	};

	eth-phy-mux {
		compatible = "mdio-mux-mmioreg", "mdio-mux";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x0 0x55c 0x0 0x4>;
		mux-mask = <0xffffffff>;
		mdio-parent-bus = <&mdio0>;

		internal_mdio: mdio@e40908ff {
			reg = <0xe40908ff>;
			#address-cells = <1>;
			#size-cells = <0>;

			internal_phy: ethernet-phy@8 {
				compatible = "ethernet-phy-id0181.4400", "ethernet-phy-ieee802.3-c22";
				reg = <8>;
				max-speed = <100>;
			};
		};

		external_mdio: mdio@2009087f {
			reg = <0x2009087f>;
			#address-cells = <1>;
			#size-cells = <0>;
		};
	};
};

&hiubus {
	clkc: clock-controller@0 {
		compatible = "amlogic,gxl-clkc", "amlogic,gxbb-clkc";
		#clock-cells = <1>;
		reg = <0x0 0x0 0x0 0x3db>;
	};
};

&i2c_A {
	clocks = <&clkc CLKID_I2C>;
};

&i2c_B {
	clocks = <&clkc CLKID_I2C>;
};

&i2c_C {
	clocks = <&clkc CLKID_I2C>;
};

&sd_emmc_a {
	clocks = <&clkc CLKID_SD_EMMC_A>,
		 <&xtal>,
		 <&clkc CLKID_FCLK_DIV2>;
	clock-names = "core", "clkin0", "clkin1";
};

&sd_emmc_b {
	clocks = <&clkc CLKID_SD_EMMC_B>,
		 <&xtal>,
		 <&clkc CLKID_FCLK_DIV2>;
       clock-names = "core", "clkin0", "clkin1";
};

&sd_emmc_c {
	clocks = <&clkc CLKID_SD_EMMC_C>,
		 <&xtal>,
		 <&clkc CLKID_FCLK_DIV2>;
	clock-names = "core", "clkin0", "clkin1";
};

&vpu {
	compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu";
};
Commit	Line	Data
15abee8a CC	1	/*
	2	* Copyright (c) 2016 Endless Computers, Inc.
	3	* Author: Carlo Caione <carlo@endlessm.com>
	4	*
	5	* This file is dual-licensed: you can use it either under the terms
	6	* of the GPL or the X11 license, at your option. Note that this dual
	7	* licensing only applies to this file, and not this project as a
	8	* whole.
	9	*
	10	* a) This library is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License as
	12	* published by the Free Software Foundation; either version 2 of the
	13	* License, or (at your option) any later version.
	14	*
	15	* This library is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* Or, alternatively,
	21	*
	22	* b) Permission is hereby granted, free of charge, to any person
	23	* obtaining a copy of this software and associated documentation
	24	* files (the "Software"), to deal in the Software without
	25	* restriction, including without limitation the rights to use,
	26	* copy, modify, merge, publish, distribute, sublicense, and/or
	27	* sell copies of the Software, and to permit persons to whom the
	28	* Software is furnished to do so, subject to the following
	29	* conditions:
	30	*
	31	* The above copyright notice and this permission notice shall be
	32	* included in all copies or substantial portions of the Software.
	33	*
	34	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	35	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	36	* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	37	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	38	* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
	39	* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	40	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	41	* OTHER DEALINGS IN THE SOFTWARE.
	42	*/
	43
	44	#include "meson-gx.dtsi"
973fbd55	45	#include <dt-bindings/clock/gxbb-clkc.h>
1cf3df8a	46	#include <dt-bindings/gpio/meson-gxl-gpio.h>
15abee8a CC	47
	48	/ {
	49	compatible = "amlogic,meson-gxl";
	50	};
fb0fe922	51
e9e27c64 NA	52	&ethmac {
	53	reg = <0x0 0xc9410000 0x0 0x10000
	54	0x0 0xc8834540 0x0 0x4>;
	55
	56	clocks = <&clkc CLKID_ETH>,
	57	<&clkc CLKID_FCLK_DIV2>,
	58	<&clkc CLKID_MPLL2>;
	59	clock-names = "stmmaceth", "clkin0", "clkin1";
	60
	61	mdio0: mdio {
	62	#address-cells = <1>;
	63	#size-cells = <0>;
	64	compatible = "snps,dwmac-mdio";
	65	};
	66	};
	67
fb0fe922 NA	68	&aobus {
	69	pinctrl_aobus: pinctrl@14 {
	70	compatible = "amlogic,meson-gxl-aobus-pinctrl";
	71	#address-cells = <2>;
	72	#size-cells = <2>;
	73	ranges;
	74
	75	gpio_ao: bank@14 {
	76	reg = <0x0 0x00014 0x0 0x8>,
	77	<0x0 0x0002c 0x0 0x4>,
	78	<0x0 0x00024 0x0 0x8>;
	79	reg-names = "mux", "pull", "gpio";
	80	gpio-controller;
	81	#gpio-cells = <2>;
	82	};
	83
	84	uart_ao_a_pins: uart_ao_a {
	85	mux {
	86	groups = "uart_tx_ao_a", "uart_rx_ao_a";
	87	function = "uart_ao";
	88	};
	89	};
	90
	91	remote_input_ao_pins: remote_input_ao {
	92	mux {
	93	groups = "remote_input_ao";
	94	function = "remote_input_ao";
	95	};
	96	};
	97	};
	98	};
	99
	100	&periphs {
	101	pinctrl_periphs: pinctrl@4b0 {
	102	compatible = "amlogic,meson-gxl-periphs-pinctrl";
	103	#address-cells = <2>;
	104	#size-cells = <2>;
	105	ranges;
	106
	107	gpio: bank@4b0 {
	108	reg = <0x0 0x004b0 0x0 0x28>,
	109	<0x0 0x004e8 0x0 0x14>,
	110	<0x0 0x00120 0x0 0x14>,
	111	<0x0 0x00430 0x0 0x40>;
	112	reg-names = "mux", "pull", "pull-enable", "gpio";
	113	gpio-controller;
	114	#gpio-cells = <2>;
	115	};
	116
	117	emmc_pins: emmc {
	118	mux {
	119	groups = "emmc_nand_d07",
	120	"emmc_cmd",
	121	"emmc_clk",
	122	"emmc_ds";
	123	function = "emmc";
	124	};
	125	};
	126
	127	sdcard_pins: sdcard {
	128	mux {
	129	groups = "sdcard_d0",
	130	"sdcard_d1",
	131	"sdcard_d2",
132	"sdcard_d3",
133	"sdcard_cmd",
134	"sdcard_clk";
135	function = "sdcard";
136	};
137	};
138
139	sdio_pins: sdio {
140	mux {
141	groups = "sdio_d0",
142	"sdio_d1",
143	"sdio_d2",
144	"sdio_d3",
145	"sdio_cmd",
146	"sdio_clk";
147	function = "sdio";
148	};
149	};
150
151	sdio_irq_pins: sdio_irq {
152	mux {
153	groups = "sdio_irq";
154	function = "sdio";
155	};
156	};
157
158	uart_a_pins: uart_a {
159	mux {
160	groups = "uart_tx_a",
161	"uart_rx_a";
162	function = "uart_a";
163	};
164	};
165
166	uart_b_pins: uart_b {
167	mux {
168	groups = "uart_tx_b",
169	"uart_rx_b";
170	function = "uart_b";
171	};
172	};
173
174	uart_c_pins: uart_c {
175	mux {
176	groups = "uart_tx_c",
177	"uart_rx_c";
178	function = "uart_c";
179	};
180	};
181
182	i2c_a_pins: i2c_a {
183	mux {
184	groups = "i2c_sck_a",
185	"i2c_sda_a";
186	function = "i2c_a";
187	};
188	};
189
190	i2c_b_pins: i2c_b {
191	mux {
192	groups = "i2c_sck_b",
193	"i2c_sda_b";
194	function = "i2c_b";
195	};
196	};
197
198	i2c_c_pins: i2c_c {
199	mux {
200	groups = "i2c_sck_c",
201	"i2c_sda_c";
202	function = "i2c_c";
203	};
204	};
205
206	eth_pins: eth_c {
207	mux {
208	groups = "eth_mdio",
209	"eth_mdc",
210	"eth_clk_rx_clk",
211	"eth_rx_dv",
212	"eth_rxd0",
213	"eth_rxd1",
214	"eth_rxd2",
215	"eth_rxd3",
216	"eth_rgmii_tx_clk",
217	"eth_tx_en",
218	"eth_txd0",
219	"eth_txd1",
220	"eth_txd2",
221	"eth_txd3";
222	function = "eth";
223	};
224	};
225
226	pwm_e_pins: pwm_e {
227	mux {
228	groups = "pwm_e";
229	function = "pwm_e";
230	};
231	};
232	};
e9e27c64 NA	233
	234	eth-phy-mux {
	235	compatible = "mdio-mux-mmioreg", "mdio-mux";
	236	#address-cells = <1>;
	237	#size-cells = <0>;
	238	reg = <0x0 0x55c 0x0 0x4>;
	239	mux-mask = <0xffffffff>;
	240	mdio-parent-bus = <&mdio0>;
	241
	242	internal_mdio: mdio@e40908ff {
	243	reg = <0xe40908ff>;
	244	#address-cells = <1>;
	245	#size-cells = <0>;
	246
	247	internal_phy: ethernet-phy@8 {
	248	compatible = "ethernet-phy-id0181.4400", "ethernet-phy-ieee802.3-c22";
	249	reg = <8>;
	250	max-speed = <100>;
	251	};
	252	};
	253
	254	external_mdio: mdio@2009087f {
	255	reg = <0x2009087f>;
	256	#address-cells = <1>;
	257	#size-cells = <0>;
	258	};
	259	};
fb0fe922	260	};
973fbd55 NA	261
	262	&hiubus {
	263	clkc: clock-controller@0 {
	264	compatible = "amlogic,gxl-clkc", "amlogic,gxbb-clkc";
	265	#clock-cells = <1>;
	266	reg = <0x0 0x0 0x0 0x3db>;
	267	};
	268	};
5d28bb01 NA	269
	270	&i2c_A {
	271	clocks = <&clkc CLKID_I2C>;
	272	};
	273
	274	&i2c_B {
	275	clocks = <&clkc CLKID_I2C>;
	276	};
	277
	278	&i2c_C {
	279	clocks = <&clkc CLKID_I2C>;
	280	};
6d489dc8 NA	281
	282	&sd_emmc_a {
	283	clocks = <&clkc CLKID_SD_EMMC_A>,
	284	<&xtal>,
	285	<&clkc CLKID_FCLK_DIV2>;
	286	clock-names = "core", "clkin0", "clkin1";
	287	};
	288
	289	&sd_emmc_b {
	290	clocks = <&clkc CLKID_SD_EMMC_B>,
	291	<&xtal>,
	292	<&clkc CLKID_FCLK_DIV2>;
	293	clock-names = "core", "clkin0", "clkin1";
	294	};
	295
	296	&sd_emmc_c {
	297	clocks = <&clkc CLKID_SD_EMMC_C>,
	298	<&xtal>,
	299	<&clkc CLKID_FCLK_DIV2>;
	300	clock-names = "core", "clkin0", "clkin1";
	301	};
fafdbdf7 NA	302
	303	&vpu {
	304	compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu";
	305	};