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Commit | Line | Data |
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26a7e06d SH |
1 | /* |
2 | * Device Tree Source for the r8a7795 SoC | |
3 | * | |
4 | * Copyright (C) 2015 Renesas Electronics Corp. | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public License | |
7 | * version 2. This program is licensed "as is" without any warranty of any | |
8 | * kind, whether express or implied. | |
9 | */ | |
10 | ||
49af46b4 | 11 | #include <dt-bindings/clock/r8a7795-cpg-mssr.h> |
26a7e06d SH |
12 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
13 | ||
14 | / { | |
15 | compatible = "renesas,r8a7795"; | |
16 | #address-cells = <2>; | |
17 | #size-cells = <2>; | |
18 | ||
32bc0c51 KM |
19 | aliases { |
20 | i2c0 = &i2c0; | |
21 | i2c1 = &i2c1; | |
22 | i2c2 = &i2c2; | |
23 | i2c3 = &i2c3; | |
24 | i2c4 = &i2c4; | |
25 | i2c5 = &i2c5; | |
26 | i2c6 = &i2c6; | |
27 | }; | |
28 | ||
12e51557 GI |
29 | psci { |
30 | compatible = "arm,psci-0.2"; | |
31 | method = "smc"; | |
32 | }; | |
33 | ||
26a7e06d SH |
34 | cpus { |
35 | #address-cells = <1>; | |
36 | #size-cells = <0>; | |
37 | ||
26a7e06d SH |
38 | a57_0: cpu@0 { |
39 | compatible = "arm,cortex-a57", "arm,armv8"; | |
40 | reg = <0x0>; | |
41 | device_type = "cpu"; | |
7b337e61 | 42 | next-level-cache = <&L2_CA57>; |
12e51557 | 43 | enable-method = "psci"; |
26a7e06d | 44 | }; |
0ed1a79e GI |
45 | |
46 | a57_1: cpu@1 { | |
47 | compatible = "arm,cortex-a57","arm,armv8"; | |
48 | reg = <0x1>; | |
49 | device_type = "cpu"; | |
7b337e61 | 50 | next-level-cache = <&L2_CA57>; |
0ed1a79e GI |
51 | enable-method = "psci"; |
52 | }; | |
53 | a57_2: cpu@2 { | |
54 | compatible = "arm,cortex-a57","arm,armv8"; | |
55 | reg = <0x2>; | |
56 | device_type = "cpu"; | |
7b337e61 | 57 | next-level-cache = <&L2_CA57>; |
0ed1a79e GI |
58 | enable-method = "psci"; |
59 | }; | |
60 | a57_3: cpu@3 { | |
61 | compatible = "arm,cortex-a57","arm,armv8"; | |
62 | reg = <0x3>; | |
63 | device_type = "cpu"; | |
7b337e61 | 64 | next-level-cache = <&L2_CA57>; |
0ed1a79e GI |
65 | enable-method = "psci"; |
66 | }; | |
26a7e06d SH |
67 | }; |
68 | ||
7b337e61 GU |
69 | L2_CA57: cache-controller@0 { |
70 | compatible = "cache"; | |
a528b4bf GU |
71 | cache-unified; |
72 | cache-level = <2>; | |
7b337e61 GU |
73 | }; |
74 | ||
8e1c3aa3 GU |
75 | L2_CA53: cache-controller@1 { |
76 | compatible = "cache"; | |
77 | cache-unified; | |
78 | cache-level = <2>; | |
79 | }; | |
80 | ||
26a7e06d SH |
81 | extal_clk: extal { |
82 | compatible = "fixed-clock"; | |
83 | #clock-cells = <0>; | |
84 | /* This value must be overridden by the board */ | |
85 | clock-frequency = <0>; | |
86 | }; | |
87 | ||
88 | extalr_clk: extalr { | |
89 | compatible = "fixed-clock"; | |
90 | #clock-cells = <0>; | |
91 | /* This value must be overridden by the board */ | |
92 | clock-frequency = <0>; | |
93 | }; | |
94 | ||
623197b9 KM |
95 | /* |
96 | * The external audio clocks are configured as 0 Hz fixed frequency | |
97 | * clocks by default. | |
98 | * Boards that provide audio clocks should override them. | |
99 | */ | |
100 | audio_clk_a: audio_clk_a { | |
101 | compatible = "fixed-clock"; | |
102 | #clock-cells = <0>; | |
103 | clock-frequency = <0>; | |
104 | }; | |
105 | ||
106 | audio_clk_b: audio_clk_b { | |
107 | compatible = "fixed-clock"; | |
108 | #clock-cells = <0>; | |
109 | clock-frequency = <0>; | |
110 | }; | |
111 | ||
112 | audio_clk_c: audio_clk_c { | |
113 | compatible = "fixed-clock"; | |
114 | #clock-cells = <0>; | |
115 | clock-frequency = <0>; | |
116 | }; | |
117 | ||
3da41e4c GU |
118 | /* External SCIF clock - to be overridden by boards that provide it */ |
119 | scif_clk: scif { | |
120 | compatible = "fixed-clock"; | |
121 | #clock-cells = <0>; | |
122 | clock-frequency = <0>; | |
123 | status = "disabled"; | |
124 | }; | |
125 | ||
26a7e06d SH |
126 | soc { |
127 | compatible = "simple-bus"; | |
128 | interrupt-parent = <&gic>; | |
0ed1a79e | 129 | |
26a7e06d SH |
130 | #address-cells = <2>; |
131 | #size-cells = <2>; | |
132 | ranges; | |
133 | ||
134 | gic: interrupt-controller@0xf1010000 { | |
135 | compatible = "arm,gic-400"; | |
136 | #interrupt-cells = <3>; | |
137 | #address-cells = <0>; | |
138 | interrupt-controller; | |
139 | reg = <0x0 0xf1010000 0 0x1000>, | |
140 | <0x0 0xf1020000 0 0x2000>; | |
141 | interrupts = <GIC_PPI 9 | |
0ed1a79e | 142 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; |
26a7e06d SH |
143 | }; |
144 | ||
7b08623a TK |
145 | gpio0: gpio@e6050000 { |
146 | compatible = "renesas,gpio-r8a7795", | |
147 | "renesas,gpio-rcar"; | |
148 | reg = <0 0xe6050000 0 0x50>; | |
149 | interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; | |
150 | #gpio-cells = <2>; | |
151 | gpio-controller; | |
152 | gpio-ranges = <&pfc 0 0 16>; | |
153 | #interrupt-cells = <2>; | |
154 | interrupt-controller; | |
155 | clocks = <&cpg CPG_MOD 912>; | |
156 | power-domains = <&cpg>; | |
157 | }; | |
158 | ||
159 | gpio1: gpio@e6051000 { | |
160 | compatible = "renesas,gpio-r8a7795", | |
161 | "renesas,gpio-rcar"; | |
162 | reg = <0 0xe6051000 0 0x50>; | |
163 | interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; | |
164 | #gpio-cells = <2>; | |
165 | gpio-controller; | |
166 | gpio-ranges = <&pfc 0 32 28>; | |
167 | #interrupt-cells = <2>; | |
168 | interrupt-controller; | |
169 | clocks = <&cpg CPG_MOD 911>; | |
170 | power-domains = <&cpg>; | |
171 | }; | |
172 | ||
173 | gpio2: gpio@e6052000 { | |
174 | compatible = "renesas,gpio-r8a7795", | |
175 | "renesas,gpio-rcar"; | |
176 | reg = <0 0xe6052000 0 0x50>; | |
177 | interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; | |
178 | #gpio-cells = <2>; | |
179 | gpio-controller; | |
180 | gpio-ranges = <&pfc 0 64 15>; | |
181 | #interrupt-cells = <2>; | |
182 | interrupt-controller; | |
183 | clocks = <&cpg CPG_MOD 910>; | |
184 | power-domains = <&cpg>; | |
185 | }; | |
186 | ||
187 | gpio3: gpio@e6053000 { | |
188 | compatible = "renesas,gpio-r8a7795", | |
189 | "renesas,gpio-rcar"; | |
190 | reg = <0 0xe6053000 0 0x50>; | |
191 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; | |
192 | #gpio-cells = <2>; | |
193 | gpio-controller; | |
194 | gpio-ranges = <&pfc 0 96 16>; | |
195 | #interrupt-cells = <2>; | |
196 | interrupt-controller; | |
197 | clocks = <&cpg CPG_MOD 909>; | |
198 | power-domains = <&cpg>; | |
199 | }; | |
200 | ||
201 | gpio4: gpio@e6054000 { | |
202 | compatible = "renesas,gpio-r8a7795", | |
203 | "renesas,gpio-rcar"; | |
204 | reg = <0 0xe6054000 0 0x50>; | |
205 | interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; | |
206 | #gpio-cells = <2>; | |
207 | gpio-controller; | |
208 | gpio-ranges = <&pfc 0 128 18>; | |
209 | #interrupt-cells = <2>; | |
210 | interrupt-controller; | |
211 | clocks = <&cpg CPG_MOD 908>; | |
212 | power-domains = <&cpg>; | |
213 | }; | |
214 | ||
215 | gpio5: gpio@e6055000 { | |
216 | compatible = "renesas,gpio-r8a7795", | |
217 | "renesas,gpio-rcar"; | |
218 | reg = <0 0xe6055000 0 0x50>; | |
219 | interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; | |
220 | #gpio-cells = <2>; | |
221 | gpio-controller; | |
222 | gpio-ranges = <&pfc 0 160 26>; | |
223 | #interrupt-cells = <2>; | |
224 | interrupt-controller; | |
225 | clocks = <&cpg CPG_MOD 907>; | |
226 | power-domains = <&cpg>; | |
227 | }; | |
228 | ||
229 | gpio6: gpio@e6055400 { | |
230 | compatible = "renesas,gpio-r8a7795", | |
231 | "renesas,gpio-rcar"; | |
232 | reg = <0 0xe6055400 0 0x50>; | |
233 | interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; | |
234 | #gpio-cells = <2>; | |
235 | gpio-controller; | |
236 | gpio-ranges = <&pfc 0 192 32>; | |
237 | #interrupt-cells = <2>; | |
238 | interrupt-controller; | |
239 | clocks = <&cpg CPG_MOD 906>; | |
240 | power-domains = <&cpg>; | |
241 | }; | |
242 | ||
243 | gpio7: gpio@e6055800 { | |
244 | compatible = "renesas,gpio-r8a7795", | |
245 | "renesas,gpio-rcar"; | |
246 | reg = <0 0xe6055800 0 0x50>; | |
247 | interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; | |
248 | #gpio-cells = <2>; | |
249 | gpio-controller; | |
250 | gpio-ranges = <&pfc 0 224 4>; | |
251 | #interrupt-cells = <2>; | |
252 | interrupt-controller; | |
253 | clocks = <&cpg CPG_MOD 905>; | |
254 | power-domains = <&cpg>; | |
255 | }; | |
256 | ||
3d0cd468 DB |
257 | pmu_a57 { |
258 | compatible = "arm,cortex-a57-pmu"; | |
a6b6b478 YH |
259 | interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, |
260 | <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, | |
261 | <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, | |
262 | <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; | |
263 | interrupt-affinity = <&a57_0>, | |
264 | <&a57_1>, | |
265 | <&a57_2>, | |
266 | <&a57_3>; | |
267 | }; | |
268 | ||
26a7e06d SH |
269 | timer { |
270 | compatible = "arm,armv8-timer"; | |
271 | interrupts = <GIC_PPI 13 | |
0ed1a79e | 272 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
26a7e06d | 273 | <GIC_PPI 14 |
0ed1a79e | 274 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
26a7e06d | 275 | <GIC_PPI 11 |
0ed1a79e | 276 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
26a7e06d | 277 | <GIC_PPI 10 |
0ed1a79e | 278 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; |
26a7e06d SH |
279 | }; |
280 | ||
281 | cpg: clock-controller@e6150000 { | |
282 | compatible = "renesas,r8a7795-cpg-mssr"; | |
283 | reg = <0 0xe6150000 0 0x1000>; | |
284 | clocks = <&extal_clk>, <&extalr_clk>; | |
285 | clock-names = "extal", "extalr"; | |
286 | #clock-cells = <2>; | |
287 | #power-domain-cells = <0>; | |
288 | }; | |
d9202126 | 289 | |
b281f4c8 KM |
290 | audma0: dma-controller@ec700000 { |
291 | compatible = "renesas,rcar-dmac"; | |
292 | reg = <0 0xec700000 0 0x10000>; | |
52b541ab SH |
293 | interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH |
294 | GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH | |
295 | GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH | |
296 | GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH | |
297 | GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH | |
298 | GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH | |
299 | GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH | |
300 | GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH | |
301 | GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH | |
302 | GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH | |
303 | GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH | |
304 | GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH | |
305 | GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH | |
306 | GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH | |
307 | GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH | |
308 | GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH | |
309 | GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; | |
b281f4c8 KM |
310 | interrupt-names = "error", |
311 | "ch0", "ch1", "ch2", "ch3", | |
312 | "ch4", "ch5", "ch6", "ch7", | |
313 | "ch8", "ch9", "ch10", "ch11", | |
314 | "ch12", "ch13", "ch14", "ch15"; | |
315 | clocks = <&cpg CPG_MOD 502>; | |
316 | clock-names = "fck"; | |
317 | power-domains = <&cpg>; | |
318 | #dma-cells = <1>; | |
319 | dma-channels = <16>; | |
320 | }; | |
321 | ||
322 | audma1: dma-controller@ec720000 { | |
323 | compatible = "renesas,rcar-dmac"; | |
324 | reg = <0 0xec720000 0 0x10000>; | |
52b541ab SH |
325 | interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH |
326 | GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH | |
327 | GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH | |
328 | GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH | |
329 | GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH | |
330 | GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH | |
331 | GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH | |
332 | GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH | |
333 | GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH | |
334 | GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH | |
335 | GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH | |
336 | GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH | |
337 | GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH | |
338 | GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH | |
339 | GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH | |
340 | GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH | |
341 | GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; | |
b281f4c8 KM |
342 | interrupt-names = "error", |
343 | "ch0", "ch1", "ch2", "ch3", | |
344 | "ch4", "ch5", "ch6", "ch7", | |
345 | "ch8", "ch9", "ch10", "ch11", | |
346 | "ch12", "ch13", "ch14", "ch15"; | |
347 | clocks = <&cpg CPG_MOD 501>; | |
348 | clock-names = "fck"; | |
349 | power-domains = <&cpg>; | |
350 | #dma-cells = <1>; | |
351 | dma-channels = <16>; | |
352 | }; | |
353 | ||
9241844a KM |
354 | pfc: pfc@e6060000 { |
355 | compatible = "renesas,pfc-r8a7795"; | |
356 | reg = <0 0xe6060000 0 0x50c>; | |
357 | }; | |
358 | ||
d9202126 | 359 | dmac0: dma-controller@e6700000 { |
e2102cea GU |
360 | compatible = "renesas,dmac-r8a7795", |
361 | "renesas,rcar-dmac"; | |
362 | reg = <0 0xe6700000 0 0x10000>; | |
363 | interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH | |
364 | GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH | |
365 | GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH | |
366 | GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH | |
367 | GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH | |
368 | GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH | |
369 | GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH | |
370 | GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH | |
371 | GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH | |
372 | GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH | |
373 | GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH | |
374 | GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH | |
375 | GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH | |
376 | GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH | |
377 | GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH | |
378 | GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH | |
379 | GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; | |
380 | interrupt-names = "error", | |
381 | "ch0", "ch1", "ch2", "ch3", | |
382 | "ch4", "ch5", "ch6", "ch7", | |
383 | "ch8", "ch9", "ch10", "ch11", | |
384 | "ch12", "ch13", "ch14", "ch15"; | |
385 | clocks = <&cpg CPG_MOD 219>; | |
386 | clock-names = "fck"; | |
387 | power-domains = <&cpg>; | |
388 | #dma-cells = <1>; | |
389 | dma-channels = <16>; | |
d9202126 GU |
390 | }; |
391 | ||
392 | dmac1: dma-controller@e7300000 { | |
e2102cea GU |
393 | compatible = "renesas,dmac-r8a7795", |
394 | "renesas,rcar-dmac"; | |
395 | reg = <0 0xe7300000 0 0x10000>; | |
396 | interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH | |
397 | GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH | |
398 | GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH | |
399 | GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH | |
400 | GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH | |
401 | GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH | |
402 | GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH | |
403 | GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH | |
404 | GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH | |
405 | GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH | |
406 | GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH | |
407 | GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH | |
408 | GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH | |
409 | GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH | |
410 | GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH | |
411 | GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH | |
412 | GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; | |
413 | interrupt-names = "error", | |
414 | "ch0", "ch1", "ch2", "ch3", | |
415 | "ch4", "ch5", "ch6", "ch7", | |
416 | "ch8", "ch9", "ch10", "ch11", | |
417 | "ch12", "ch13", "ch14", "ch15"; | |
418 | clocks = <&cpg CPG_MOD 218>; | |
419 | clock-names = "fck"; | |
420 | power-domains = <&cpg>; | |
421 | #dma-cells = <1>; | |
422 | dma-channels = <16>; | |
d9202126 GU |
423 | }; |
424 | ||
425 | dmac2: dma-controller@e7310000 { | |
e2102cea GU |
426 | compatible = "renesas,dmac-r8a7795", |
427 | "renesas,rcar-dmac"; | |
428 | reg = <0 0xe7310000 0 0x10000>; | |
429 | interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH | |
430 | GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH | |
431 | GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH | |
432 | GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH | |
433 | GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH | |
434 | GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH | |
435 | GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH | |
436 | GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH | |
437 | GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH | |
438 | GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH | |
439 | GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH | |
440 | GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH | |
441 | GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH | |
442 | GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH | |
443 | GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH | |
444 | GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH | |
445 | GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; | |
446 | interrupt-names = "error", | |
447 | "ch0", "ch1", "ch2", "ch3", | |
448 | "ch4", "ch5", "ch6", "ch7", | |
449 | "ch8", "ch9", "ch10", "ch11", | |
450 | "ch12", "ch13", "ch14", "ch15"; | |
451 | clocks = <&cpg CPG_MOD 217>; | |
452 | clock-names = "fck"; | |
453 | power-domains = <&cpg>; | |
454 | #dma-cells = <1>; | |
455 | dma-channels = <16>; | |
d9202126 | 456 | }; |
49af46b4 | 457 | |
a92843c8 KM |
458 | avb: ethernet@e6800000 { |
459 | compatible = "renesas,etheravb-r8a7795"; | |
460 | reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; | |
461 | interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, | |
462 | <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, | |
463 | <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, | |
464 | <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, | |
465 | <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, | |
466 | <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, | |
467 | <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, | |
468 | <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, | |
469 | <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, | |
470 | <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, | |
471 | <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, | |
472 | <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, | |
473 | <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, | |
474 | <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, | |
475 | <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, | |
476 | <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, | |
477 | <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, | |
478 | <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, | |
479 | <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, | |
480 | <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, | |
481 | <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, | |
482 | <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, | |
483 | <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, | |
484 | <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, | |
485 | <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; | |
486 | interrupt-names = "ch0", "ch1", "ch2", "ch3", | |
487 | "ch4", "ch5", "ch6", "ch7", | |
488 | "ch8", "ch9", "ch10", "ch11", | |
489 | "ch12", "ch13", "ch14", "ch15", | |
490 | "ch16", "ch17", "ch18", "ch19", | |
491 | "ch20", "ch21", "ch22", "ch23", | |
492 | "ch24"; | |
493 | clocks = <&cpg CPG_MOD 812>; | |
494 | power-domains = <&cpg>; | |
495 | phy-mode = "rgmii-id"; | |
496 | #address-cells = <1>; | |
497 | #size-cells = <0>; | |
498 | }; | |
499 | ||
4fa04299 | 500 | hscif0: serial@e6540000 { |
653f502d GU |
501 | compatible = "renesas,hscif-r8a7795", |
502 | "renesas,rcar-gen3-hscif", | |
503 | "renesas,hscif"; | |
4fa04299 GU |
504 | reg = <0 0xe6540000 0 96>; |
505 | interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
506 | clocks = <&cpg CPG_MOD 520>, |
507 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
508 | <&scif_clk>; | |
509 | clock-names = "fck", "brg_int", "scif_clk"; | |
4fa04299 GU |
510 | dmas = <&dmac1 0x31>, <&dmac1 0x30>; |
511 | dma-names = "tx", "rx"; | |
512 | power-domains = <&cpg>; | |
513 | status = "disabled"; | |
514 | }; | |
515 | ||
516 | hscif1: serial@e6550000 { | |
653f502d GU |
517 | compatible = "renesas,hscif-r8a7795", |
518 | "renesas,rcar-gen3-hscif", | |
519 | "renesas,hscif"; | |
4fa04299 GU |
520 | reg = <0 0xe6550000 0 96>; |
521 | interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
522 | clocks = <&cpg CPG_MOD 519>, |
523 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
524 | <&scif_clk>; | |
525 | clock-names = "fck", "brg_int", "scif_clk"; | |
4fa04299 GU |
526 | dmas = <&dmac1 0x33>, <&dmac1 0x32>; |
527 | dma-names = "tx", "rx"; | |
528 | power-domains = <&cpg>; | |
529 | status = "disabled"; | |
530 | }; | |
531 | ||
532 | hscif2: serial@e6560000 { | |
653f502d GU |
533 | compatible = "renesas,hscif-r8a7795", |
534 | "renesas,rcar-gen3-hscif", | |
535 | "renesas,hscif"; | |
4fa04299 GU |
536 | reg = <0 0xe6560000 0 96>; |
537 | interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
538 | clocks = <&cpg CPG_MOD 518>, |
539 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
540 | <&scif_clk>; | |
541 | clock-names = "fck", "brg_int", "scif_clk"; | |
4fa04299 GU |
542 | dmas = <&dmac1 0x35>, <&dmac1 0x34>; |
543 | dma-names = "tx", "rx"; | |
544 | power-domains = <&cpg>; | |
545 | status = "disabled"; | |
546 | }; | |
547 | ||
548 | hscif3: serial@e66a0000 { | |
653f502d GU |
549 | compatible = "renesas,hscif-r8a7795", |
550 | "renesas,rcar-gen3-hscif", | |
551 | "renesas,hscif"; | |
4fa04299 GU |
552 | reg = <0 0xe66a0000 0 96>; |
553 | interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
554 | clocks = <&cpg CPG_MOD 517>, |
555 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
556 | <&scif_clk>; | |
557 | clock-names = "fck", "brg_int", "scif_clk"; | |
4fa04299 GU |
558 | dmas = <&dmac0 0x37>, <&dmac0 0x36>; |
559 | dma-names = "tx", "rx"; | |
560 | power-domains = <&cpg>; | |
561 | status = "disabled"; | |
562 | }; | |
563 | ||
564 | hscif4: serial@e66b0000 { | |
653f502d GU |
565 | compatible = "renesas,hscif-r8a7795", |
566 | "renesas,rcar-gen3-hscif", | |
567 | "renesas,hscif"; | |
4fa04299 GU |
568 | reg = <0 0xe66b0000 0 96>; |
569 | interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
570 | clocks = <&cpg CPG_MOD 516>, |
571 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
572 | <&scif_clk>; | |
573 | clock-names = "fck", "brg_int", "scif_clk"; | |
4fa04299 GU |
574 | dmas = <&dmac0 0x39>, <&dmac0 0x38>; |
575 | dma-names = "tx", "rx"; | |
576 | power-domains = <&cpg>; | |
577 | status = "disabled"; | |
578 | }; | |
579 | ||
49af46b4 | 580 | scif0: serial@e6e60000 { |
653f502d GU |
581 | compatible = "renesas,scif-r8a7795", |
582 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
49af46b4 GU |
583 | reg = <0 0xe6e60000 0 64>; |
584 | interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
585 | clocks = <&cpg CPG_MOD 207>, |
586 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
587 | <&scif_clk>; | |
588 | clock-names = "fck", "brg_int", "scif_clk"; | |
49af46b4 GU |
589 | dmas = <&dmac1 0x51>, <&dmac1 0x50>; |
590 | dma-names = "tx", "rx"; | |
591 | power-domains = <&cpg>; | |
592 | status = "disabled"; | |
593 | }; | |
594 | ||
595 | scif1: serial@e6e68000 { | |
653f502d GU |
596 | compatible = "renesas,scif-r8a7795", |
597 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
49af46b4 GU |
598 | reg = <0 0xe6e68000 0 64>; |
599 | interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
600 | clocks = <&cpg CPG_MOD 206>, |
601 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
602 | <&scif_clk>; | |
603 | clock-names = "fck", "brg_int", "scif_clk"; | |
49af46b4 GU |
604 | dmas = <&dmac1 0x53>, <&dmac1 0x52>; |
605 | dma-names = "tx", "rx"; | |
606 | power-domains = <&cpg>; | |
607 | status = "disabled"; | |
608 | }; | |
609 | ||
610 | scif2: serial@e6e88000 { | |
653f502d GU |
611 | compatible = "renesas,scif-r8a7795", |
612 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
49af46b4 GU |
613 | reg = <0 0xe6e88000 0 64>; |
614 | interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
615 | clocks = <&cpg CPG_MOD 310>, |
616 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
617 | <&scif_clk>; | |
618 | clock-names = "fck", "brg_int", "scif_clk"; | |
49af46b4 GU |
619 | dmas = <&dmac1 0x13>, <&dmac1 0x12>; |
620 | dma-names = "tx", "rx"; | |
621 | power-domains = <&cpg>; | |
622 | status = "disabled"; | |
623 | }; | |
624 | ||
625 | scif3: serial@e6c50000 { | |
653f502d GU |
626 | compatible = "renesas,scif-r8a7795", |
627 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
49af46b4 GU |
628 | reg = <0 0xe6c50000 0 64>; |
629 | interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
630 | clocks = <&cpg CPG_MOD 204>, |
631 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
632 | <&scif_clk>; | |
633 | clock-names = "fck", "brg_int", "scif_clk"; | |
49af46b4 GU |
634 | dmas = <&dmac0 0x57>, <&dmac0 0x56>; |
635 | dma-names = "tx", "rx"; | |
636 | power-domains = <&cpg>; | |
637 | status = "disabled"; | |
638 | }; | |
639 | ||
640 | scif4: serial@e6c40000 { | |
653f502d GU |
641 | compatible = "renesas,scif-r8a7795", |
642 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
49af46b4 GU |
643 | reg = <0 0xe6c40000 0 64>; |
644 | interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
645 | clocks = <&cpg CPG_MOD 203>, |
646 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
647 | <&scif_clk>; | |
648 | clock-names = "fck", "brg_int", "scif_clk"; | |
49af46b4 GU |
649 | dmas = <&dmac0 0x59>, <&dmac0 0x58>; |
650 | dma-names = "tx", "rx"; | |
651 | power-domains = <&cpg>; | |
652 | status = "disabled"; | |
653 | }; | |
654 | ||
655 | scif5: serial@e6f30000 { | |
653f502d GU |
656 | compatible = "renesas,scif-r8a7795", |
657 | "renesas,rcar-gen3-scif", "renesas,scif"; | |
49af46b4 GU |
658 | reg = <0 0xe6f30000 0 64>; |
659 | interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; | |
3da41e4c GU |
660 | clocks = <&cpg CPG_MOD 202>, |
661 | <&cpg CPG_CORE R8A7795_CLK_S3D1>, | |
662 | <&scif_clk>; | |
663 | clock-names = "fck", "brg_int", "scif_clk"; | |
49af46b4 GU |
664 | dmas = <&dmac1 0x5b>, <&dmac1 0x5a>; |
665 | dma-names = "tx", "rx"; | |
666 | power-domains = <&cpg>; | |
667 | status = "disabled"; | |
668 | }; | |
32bc0c51 KM |
669 | |
670 | i2c0: i2c@e6500000 { | |
671 | #address-cells = <1>; | |
672 | #size-cells = <0>; | |
673 | compatible = "renesas,i2c-r8a7795"; | |
674 | reg = <0 0xe6500000 0 0x40>; | |
675 | interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; | |
676 | clocks = <&cpg CPG_MOD 931>; | |
677 | power-domains = <&cpg>; | |
9036a730 | 678 | i2c-scl-internal-delay-ns = <110>; |
32bc0c51 KM |
679 | status = "disabled"; |
680 | }; | |
681 | ||
682 | i2c1: i2c@e6508000 { | |
683 | #address-cells = <1>; | |
684 | #size-cells = <0>; | |
685 | compatible = "renesas,i2c-r8a7795"; | |
686 | reg = <0 0xe6508000 0 0x40>; | |
687 | interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; | |
688 | clocks = <&cpg CPG_MOD 930>; | |
689 | power-domains = <&cpg>; | |
9036a730 | 690 | i2c-scl-internal-delay-ns = <6>; |
32bc0c51 KM |
691 | status = "disabled"; |
692 | }; | |
693 | ||
694 | i2c2: i2c@e6510000 { | |
695 | #address-cells = <1>; | |
696 | #size-cells = <0>; | |
697 | compatible = "renesas,i2c-r8a7795"; | |
698 | reg = <0 0xe6510000 0 0x40>; | |
699 | interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; | |
700 | clocks = <&cpg CPG_MOD 929>; | |
701 | power-domains = <&cpg>; | |
9036a730 | 702 | i2c-scl-internal-delay-ns = <6>; |
32bc0c51 KM |
703 | status = "disabled"; |
704 | }; | |
705 | ||
706 | i2c3: i2c@e66d0000 { | |
707 | #address-cells = <1>; | |
708 | #size-cells = <0>; | |
709 | compatible = "renesas,i2c-r8a7795"; | |
710 | reg = <0 0xe66d0000 0 0x40>; | |
711 | interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; | |
712 | clocks = <&cpg CPG_MOD 928>; | |
713 | power-domains = <&cpg>; | |
9036a730 | 714 | i2c-scl-internal-delay-ns = <110>; |
32bc0c51 KM |
715 | status = "disabled"; |
716 | }; | |
717 | ||
718 | i2c4: i2c@e66d8000 { | |
719 | #address-cells = <1>; | |
720 | #size-cells = <0>; | |
721 | compatible = "renesas,i2c-r8a7795"; | |
722 | reg = <0 0xe66d8000 0 0x40>; | |
723 | interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; | |
724 | clocks = <&cpg CPG_MOD 927>; | |
725 | power-domains = <&cpg>; | |
9036a730 | 726 | i2c-scl-internal-delay-ns = <110>; |
32bc0c51 KM |
727 | status = "disabled"; |
728 | }; | |
729 | ||
730 | i2c5: i2c@e66e0000 { | |
731 | #address-cells = <1>; | |
732 | #size-cells = <0>; | |
733 | compatible = "renesas,i2c-r8a7795"; | |
734 | reg = <0 0xe66e0000 0 0x40>; | |
735 | interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; | |
736 | clocks = <&cpg CPG_MOD 919>; | |
737 | power-domains = <&cpg>; | |
9036a730 | 738 | i2c-scl-internal-delay-ns = <110>; |
32bc0c51 KM |
739 | status = "disabled"; |
740 | }; | |
741 | ||
742 | i2c6: i2c@e66e8000 { | |
743 | #address-cells = <1>; | |
744 | #size-cells = <0>; | |
745 | compatible = "renesas,i2c-r8a7795"; | |
746 | reg = <0 0xe66e8000 0 0x40>; | |
747 | interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; | |
748 | clocks = <&cpg CPG_MOD 918>; | |
749 | power-domains = <&cpg>; | |
9036a730 | 750 | i2c-scl-internal-delay-ns = <6>; |
32bc0c51 KM |
751 | status = "disabled"; |
752 | }; | |
623197b9 KM |
753 | |
754 | rcar_sound: sound@ec500000 { | |
755 | /* | |
756 | * #sound-dai-cells is required | |
757 | * | |
758 | * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; | |
759 | * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; | |
760 | */ | |
761 | /* | |
762 | * #clock-cells is required for audio_clkout0/1/2/3 | |
763 | * | |
764 | * clkout : #clock-cells = <0>; <&rcar_sound>; | |
765 | * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; | |
766 | */ | |
767 | compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3"; | |
768 | reg = <0 0xec500000 0 0x1000>, /* SCU */ | |
769 | <0 0xec5a0000 0 0x100>, /* ADG */ | |
770 | <0 0xec540000 0 0x1000>, /* SSIU */ | |
771 | <0 0xec541000 0 0x280>, /* SSI */ | |
772 | <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ | |
773 | reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; | |
774 | ||
775 | clocks = <&cpg CPG_MOD 1005>, | |
776 | <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, | |
777 | <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, | |
778 | <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, | |
779 | <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, | |
780 | <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, | |
b868ff51 KM |
781 | <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, |
782 | <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, | |
783 | <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, | |
784 | <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, | |
785 | <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, | |
b9dd9450 | 786 | <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, |
623197b9 KM |
787 | <&audio_clk_a>, <&audio_clk_b>, |
788 | <&audio_clk_c>, | |
789 | <&cpg CPG_CORE R8A7795_CLK_S0D4>; | |
790 | clock-names = "ssi-all", | |
791 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", | |
792 | "ssi.5", "ssi.4", "ssi.3", "ssi.2", | |
793 | "ssi.1", "ssi.0", | |
b868ff51 KM |
794 | "src.9", "src.8", "src.7", "src.6", |
795 | "src.5", "src.4", "src.3", "src.2", | |
796 | "src.1", "src.0", | |
b9dd9450 | 797 | "dvc.0", "dvc.1", |
623197b9 KM |
798 | "clk_a", "clk_b", "clk_c", "clk_i"; |
799 | power-domains = <&cpg>; | |
800 | status = "disabled"; | |
801 | ||
b9dd9450 KM |
802 | rcar_sound,dvc { |
803 | dvc0: dvc@0 { | |
804 | dmas = <&audma0 0xbc>; | |
805 | dma-names = "tx"; | |
806 | }; | |
807 | dvc1: dvc@1 { | |
808 | dmas = <&audma0 0xbe>; | |
809 | dma-names = "tx"; | |
810 | }; | |
811 | }; | |
812 | ||
b868ff51 KM |
813 | rcar_sound,src { |
814 | src0: src@0 { | |
52b541ab | 815 | interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; |
b868ff51 KM |
816 | dmas = <&audma0 0x85>, <&audma1 0x9a>; |
817 | dma-names = "rx", "tx"; | |
818 | }; | |
819 | src1: src@1 { | |
52b541ab | 820 | interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; |
b868ff51 KM |
821 | dmas = <&audma0 0x87>, <&audma1 0x9c>; |
822 | dma-names = "rx", "tx"; | |
823 | }; | |
824 | src2: src@2 { | |
52b541ab | 825 | interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; |
b868ff51 KM |
826 | dmas = <&audma0 0x89>, <&audma1 0x9e>; |
827 | dma-names = "rx", "tx"; | |
828 | }; | |
829 | src3: src@3 { | |
52b541ab | 830 | interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; |
b868ff51 KM |
831 | dmas = <&audma0 0x8b>, <&audma1 0xa0>; |
832 | dma-names = "rx", "tx"; | |
833 | }; | |
834 | src4: src@4 { | |
52b541ab | 835 | interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; |
b868ff51 KM |
836 | dmas = <&audma0 0x8d>, <&audma1 0xb0>; |
837 | dma-names = "rx", "tx"; | |
838 | }; | |
839 | src5: src@5 { | |
52b541ab | 840 | interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; |
b868ff51 KM |
841 | dmas = <&audma0 0x8f>, <&audma1 0xb2>; |
842 | dma-names = "rx", "tx"; | |
843 | }; | |
844 | src6: src@6 { | |
52b541ab | 845 | interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; |
b868ff51 KM |
846 | dmas = <&audma0 0x91>, <&audma1 0xb4>; |
847 | dma-names = "rx", "tx"; | |
848 | }; | |
849 | src7: src@7 { | |
52b541ab | 850 | interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; |
b868ff51 KM |
851 | dmas = <&audma0 0x93>, <&audma1 0xb6>; |
852 | dma-names = "rx", "tx"; | |
853 | }; | |
854 | src8: src@8 { | |
52b541ab | 855 | interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; |
b868ff51 KM |
856 | dmas = <&audma0 0x95>, <&audma1 0xb8>; |
857 | dma-names = "rx", "tx"; | |
858 | }; | |
859 | src9: src@9 { | |
52b541ab | 860 | interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; |
b868ff51 KM |
861 | dmas = <&audma0 0x97>, <&audma1 0xba>; |
862 | dma-names = "rx", "tx"; | |
863 | }; | |
864 | }; | |
865 | ||
623197b9 KM |
866 | rcar_sound,ssi { |
867 | ssi0: ssi@0 { | |
52b541ab | 868 | interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; |
10d18ab8 KM |
869 | dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; |
870 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
871 | }; |
872 | ssi1: ssi@1 { | |
52b541ab | 873 | interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; |
10d18ab8 KM |
874 | dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; |
875 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
876 | }; |
877 | ssi2: ssi@2 { | |
52b541ab | 878 | interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; |
10d18ab8 KM |
879 | dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; |
880 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
881 | }; |
882 | ssi3: ssi@3 { | |
52b541ab | 883 | interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; |
10d18ab8 KM |
884 | dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; |
885 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
886 | }; |
887 | ssi4: ssi@4 { | |
52b541ab | 888 | interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; |
10d18ab8 KM |
889 | dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; |
890 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
891 | }; |
892 | ssi5: ssi@5 { | |
52b541ab | 893 | interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; |
10d18ab8 KM |
894 | dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; |
895 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
896 | }; |
897 | ssi6: ssi@6 { | |
52b541ab | 898 | interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; |
10d18ab8 KM |
899 | dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; |
900 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
901 | }; |
902 | ssi7: ssi@7 { | |
52b541ab | 903 | interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; |
10d18ab8 KM |
904 | dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; |
905 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
906 | }; |
907 | ssi8: ssi@8 { | |
52b541ab | 908 | interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; |
10d18ab8 KM |
909 | dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; |
910 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
911 | }; |
912 | ssi9: ssi@9 { | |
52b541ab | 913 | interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; |
10d18ab8 KM |
914 | dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; |
915 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
916 | }; |
917 | }; | |
918 | }; | |
4c13472b KA |
919 | |
920 | sata: sata@ee300000 { | |
921 | compatible = "renesas,sata-r8a7795"; | |
922 | reg = <0 0xee300000 0 0x1fff>; | |
923 | interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; | |
2eb2b506 | 924 | clocks = <&cpg CPG_MOD 815>; |
4c13472b KA |
925 | status = "disabled"; |
926 | }; | |
171f2ef8 YS |
927 | |
928 | xhci0: usb@ee000000 { | |
929 | compatible = "renesas,xhci-r8a7795"; | |
930 | reg = <0 0xee000000 0 0xc00>; | |
931 | interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; | |
932 | clocks = <&cpg CPG_MOD 328>; | |
933 | power-domains = <&cpg>; | |
934 | status = "disabled"; | |
935 | }; | |
936 | ||
937 | xhci1: usb@ee0400000 { | |
938 | compatible = "renesas,xhci-r8a7795"; | |
939 | reg = <0 0xee040000 0 0xc00>; | |
940 | interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; | |
941 | clocks = <&cpg CPG_MOD 327>; | |
942 | power-domains = <&cpg>; | |
943 | status = "disabled"; | |
944 | }; | |
652a4306 YS |
945 | |
946 | usb_dmac0: dma-controller@e65a0000 { | |
947 | compatible = "renesas,r8a7795-usb-dmac", | |
948 | "renesas,usb-dmac"; | |
949 | reg = <0 0xe65a0000 0 0x100>; | |
950 | interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH | |
951 | GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; | |
952 | interrupt-names = "ch0", "ch1"; | |
953 | clocks = <&cpg CPG_MOD 330>; | |
954 | power-domains = <&cpg>; | |
955 | #dma-cells = <1>; | |
956 | dma-channels = <2>; | |
957 | }; | |
958 | ||
959 | usb_dmac1: dma-controller@e65b0000 { | |
960 | compatible = "renesas,r8a7795-usb-dmac", | |
961 | "renesas,usb-dmac"; | |
962 | reg = <0 0xe65b0000 0 0x100>; | |
963 | interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH | |
964 | GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; | |
965 | interrupt-names = "ch0", "ch1"; | |
966 | clocks = <&cpg CPG_MOD 331>; | |
967 | power-domains = <&cpg>; | |
968 | #dma-cells = <1>; | |
969 | dma-channels = <2>; | |
970 | }; | |
26a7e06d SH |
971 | }; |
972 | }; |