[mirror_ubuntu-artful-kernel.git] / arch / cris / arch-v32 / boot / compressed / misc.c

/*
 * misc.c
 *
 * This is a collection of several routines from gzip-1.0.3
 * adapted for Linux.
 *
 * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
 * puts by Nick Holloway 1993, better puts by Martin Mares 1995
 * adaptation for Linux/CRIS Axis Communications AB, 1999
 *
 */

/* where the piggybacked kernel image expects itself to live.
 * it is the same address we use when we network load an uncompressed
 * image into DRAM, and it is the address the kernel is linked to live
 * at by vmlinux.lds.S
 */

#define KERNEL_LOAD_ADR 0x40004000


#include <linux/types.h>
#include <hwregs/reg_rdwr.h>
#include <hwregs/reg_map.h>
#include <hwregs/ser_defs.h>
#include <hwregs/pinmux_defs.h>
#ifdef CONFIG_CRIS_MACH_ARTPEC3
#include <hwregs/clkgen_defs.h>
#endif

/*
 * gzip declarations
 */

#define OF(args)  args
#define STATIC static

void* memset(void* s, int c, size_t n);
void* memcpy(void* __dest, __const void* __src,
	     size_t __n);

#define memzero(s, n)     memset ((s), 0, (n))


typedef unsigned char  uch;
typedef unsigned short ush;
typedef unsigned long  ulg;

#define WSIZE 0x8000		/* Window size must be at least 32k, */
				/* and a power of two */

static uch *inbuf;	     /* input buffer */
static uch window[WSIZE];    /* Sliding window buffer */

unsigned inptr = 0;	/* index of next byte to be processed in inbuf
			 * After decompression it will contain the
			 * compressed size, and head.S will read it.
			 */

static unsigned outcnt = 0;  /* bytes in output buffer */

/* gzip flag byte */
#define ASCII_FLAG   0x01 /* bit 0 set: file probably ascii text */
#define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gzip file */
#define EXTRA_FIELD  0x04 /* bit 2 set: extra field present */
#define ORIG_NAME    0x08 /* bit 3 set: original file name present */
#define COMMENT      0x10 /* bit 4 set: file comment present */
#define ENCRYPTED    0x20 /* bit 5 set: file is encrypted */
#define RESERVED     0xC0 /* bit 6,7:   reserved */

#define get_byte() inbuf[inptr++]

/* Diagnostic functions */
#ifdef DEBUG
#  define Assert(cond,msg) {if(!(cond)) error(msg);}
#  define Trace(x) fprintf x
#  define Tracev(x) {if (verbose) fprintf x ;}
#  define Tracevv(x) {if (verbose>1) fprintf x ;}
#  define Tracec(c,x) {if (verbose && (c)) fprintf x ;}
#  define Tracecv(c,x) {if (verbose>1 && (c)) fprintf x ;}
#else
#  define Assert(cond,msg)
#  define Trace(x)
#  define Tracev(x)
#  define Tracevv(x)
#  define Tracec(c,x)
#  define Tracecv(c,x)
#endif

static void flush_window(void);
static void error(char *m);

extern char *input_data;  /* lives in head.S */

static long bytes_out;
static uch *output_data;
static unsigned long output_ptr;

static void error(char *m);

static void puts(const char *);

/* the "heap" is put directly after the BSS ends, at end */

extern int _end;
static long free_mem_ptr = (long)&_end;
static long free_mem_end_ptr;

#include "../../../../../lib/inflate.c"

/* decompressor info and error messages to serial console */

static inline void
serout(const char *s, reg_scope_instances regi_ser)
{
	reg_ser_rs_stat_din rs;
	reg_ser_rw_dout dout = {.data = *s};

	do {
		rs = REG_RD(ser, regi_ser, rs_stat_din);
	}
	while (!rs.tr_rdy);/* Wait for transceiver. */

	REG_WR(ser, regi_ser, rw_dout, dout);
}

static void
puts(const char *s)
{
#ifndef CONFIG_ETRAX_DEBUG_PORT_NULL
	while (*s) {
#ifdef CONFIG_ETRAX_DEBUG_PORT0
		serout(s, regi_ser0);
#endif
#ifdef CONFIG_ETRAX_DEBUG_PORT1
		serout(s, regi_ser1);
#endif
#ifdef CONFIG_ETRAX_DEBUG_PORT2
		serout(s, regi_ser2);
#endif
#ifdef CONFIG_ETRAX_DEBUG_PORT3
		serout(s, regi_ser3);
#endif
		*s++;
	}
/* CONFIG_ETRAX_DEBUG_PORT_NULL */
#endif
}

void*
memset(void* s, int c, size_t n)
{
	int i;
	char *ss = (char*)s;

	for (i=0;i<n;i++) ss[i] = c;

	return s;
}

void*
memcpy(void* __dest, __const void* __src,
			    size_t __n)
{
	int i;
	char *d = (char *)__dest, *s = (char *)__src;

	for (i=0;i<__n;i++) d[i] = s[i];

	return __dest;
}

/* ===========================================================================
 * Write the output window window[0..outcnt-1] and update crc and bytes_out.
 * (Used for the decompressed data only.)
 */

static void
flush_window()
{
    ulg c = crc;         /* temporary variable */
    unsigned n;
    uch *in, *out, ch;

    in = window;
    out = &output_data[output_ptr];
    for (n = 0; n < outcnt; n++) {
	    ch = *out++ = *in++;
	    c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
    }
    crc = c;
    bytes_out += (ulg)outcnt;
    output_ptr += (ulg)outcnt;
    outcnt = 0;
}

static void
error(char *x)
{
	puts("\r\n\n");
	puts(x);
	puts("\r\n\n -- System halted\n");

	while(1);	/* Halt */
}

void
setup_normal_output_buffer(void)
{
	output_data = (char *)KERNEL_LOAD_ADR;
}

static inline void
serial_setup(reg_scope_instances regi_ser)
{
	reg_ser_rw_xoff xoff;
	reg_ser_rw_tr_ctrl tr_ctrl;
	reg_ser_rw_rec_ctrl rec_ctrl;
	reg_ser_rw_tr_baud_div tr_baud;
	reg_ser_rw_rec_baud_div rec_baud;

	/* Turn off XOFF. */
	xoff = REG_RD(ser, regi_ser, rw_xoff);

	xoff.chr = 0;
	xoff.automatic = regk_ser_no;

	REG_WR(ser, regi_ser, rw_xoff, xoff);

	/* Set baudrate and stopbits. */
	tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
	rec_ctrl = REG_RD(ser, regi_ser, rw_rec_ctrl);
	tr_baud = REG_RD(ser, regi_ser, rw_tr_baud_div);
	rec_baud = REG_RD(ser, regi_ser, rw_rec_baud_div);

	tr_ctrl.stop_bits = 1;	/* 2 stop bits. */
	tr_ctrl.en = 1; /* enable transmitter */
	rec_ctrl.en = 1; /* enabler receiver */

	/*
	 * The baudrate setup used to be a bit fishy, but now transmitter and
	 * receiver are both set to the intended baud rate, 115200.
	 * The magic value is 29.493 MHz.
	 */
	tr_ctrl.base_freq = regk_ser_f29_493;
	rec_ctrl.base_freq = regk_ser_f29_493;
	tr_baud.div = (29493000 / 8) / 115200;
	rec_baud.div = (29493000 / 8) / 115200;

	REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
	REG_WR(ser, regi_ser, rw_tr_baud_div, tr_baud);
	REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl);
	REG_WR(ser, regi_ser, rw_rec_baud_div, rec_baud);
}

void
decompress_kernel(void)
{
	char revision;

#if defined(CONFIG_ETRAX_DEBUG_PORT1) || \
    defined(CONFIG_ETRAX_DEBUG_PORT2) || \
    defined(CONFIG_ETRAX_DEBUG_PORT3)
	reg_pinmux_rw_hwprot hwprot;

#ifdef CONFIG_CRIS_MACH_ARTPEC3
	reg_clkgen_rw_clk_ctrl clk_ctrl;

	/* Enable corresponding clock region when serial 1..3 selected */

	clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl);
	clk_ctrl.sser_ser_dma6_7 = regk_clkgen_yes;
	REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, clk_ctrl);
#endif

	/* pinmux setup for ports 1..3 */
	hwprot = REG_RD(pinmux, regi_pinmux, rw_hwprot);
#endif

#ifdef CONFIG_ETRAX_DEBUG_PORT0
	serial_setup(regi_ser0);
#endif
#ifdef CONFIG_ETRAX_DEBUG_PORT1
	hwprot.ser1 = regk_pinmux_yes;
	serial_setup(regi_ser1);
#endif
#ifdef CONFIG_ETRAX_DEBUG_PORT2
	hwprot.ser2 = regk_pinmux_yes;
	serial_setup(regi_ser2);
#endif
#ifdef CONFIG_ETRAX_DEBUG_PORT3
	hwprot.ser3 = regk_pinmux_yes;
	serial_setup(regi_ser3);
#endif
#if defined(CONFIG_ETRAX_DEBUG_PORT1) || \
    defined(CONFIG_ETRAX_DEBUG_PORT2) || \
    defined(CONFIG_ETRAX_DEBUG_PORT3)
	REG_WR(pinmux, regi_pinmux, rw_hwprot, hwprot);
#endif

	/* input_data is set in head.S */
	inbuf = input_data;

	setup_normal_output_buffer();

	makecrc();

	__asm__ volatile ("move $vr,%0" : "=rm" (revision));
	if (revision < 32)
	{
		puts("You need an ETRAX FS to run Linux 2.6/crisv32.\r\n");
		while(1);
	}

	puts("Uncompressing Linux...\r\n");
	gunzip();
	puts("Done. Now booting the kernel.\r\n");
}
Commit	Line	Data
51533b61 MS	1	/*
	2	* misc.c
	3	*
51533b61 MS	4	* This is a collection of several routines from gzip-1.0.3
	5	* adapted for Linux.
	6	*
	7	* malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
	8	* puts by Nick Holloway 1993, better puts by Martin Mares 1995
49b4ff33	9	* adaptation for Linux/CRIS Axis Communications AB, 1999
51533b61 MS	10	*
	11	*/
	12
	13	/* where the piggybacked kernel image expects itself to live.
	14	* it is the same address we use when we network load an uncompressed
	15	* image into DRAM, and it is the address the kernel is linked to live
	16	* at by vmlinux.lds.S
	17	*/
	18
	19	#define KERNEL_LOAD_ADR 0x40004000
	20
51533b61 MS	21
51533b61 MS	22	#include <linux/types.h>
a5d204bf JN	23	#include <hwregs/reg_rdwr.h>
	24	#include <hwregs/reg_map.h>
	25	#include <hwregs/ser_defs.h>
	26	#include <hwregs/pinmux_defs.h>
	27	#ifdef CONFIG_CRIS_MACH_ARTPEC3
	28	#include <hwregs/clkgen_defs.h>
	29	#endif
51533b61 MS	30
	31	/*
	32	* gzip declarations
	33	*/
	34
	35	#define OF(args) args
	36	#define STATIC static
	37
	38	void* memset(void* s, int c, size_t n);
	39	void* memcpy(void* __dest, __const void* __src,
	40	size_t __n);
	41
	42	#define memzero(s, n) memset ((s), 0, (n))
	43
	44
	45	typedef unsigned char uch;
	46	typedef unsigned short ush;
	47	typedef unsigned long ulg;
	48
	49	#define WSIZE 0x8000 /* Window size must be at least 32k, */
	50	/* and a power of two */
	51
	52	static uch inbuf; / input buffer */
	53	static uch window[WSIZE]; /* Sliding window buffer */
	54
	55	unsigned inptr = 0; /* index of next byte to be processed in inbuf
	56	* After decompression it will contain the
	57	* compressed size, and head.S will read it.
	58	*/
	59
	60	static unsigned outcnt = 0; /* bytes in output buffer */
	61
	62	/* gzip flag byte */
	63	#define ASCII_FLAG 0x01 /* bit 0 set: file probably ascii text */
	64	#define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gzip file */
	65	#define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */
	66	#define ORIG_NAME 0x08 /* bit 3 set: original file name present */
	67	#define COMMENT 0x10 /* bit 4 set: file comment present */
	68	#define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */
	69	#define RESERVED 0xC0 /* bit 6,7: reserved */
	70
	71	#define get_byte() inbuf[inptr++]
	72
	73	/* Diagnostic functions */
	74	#ifdef DEBUG
	75	# define Assert(cond,msg) {if(!(cond)) error(msg);}
	76	# define Trace(x) fprintf x
	77	# define Tracev(x) {if (verbose) fprintf x ;}
	78	# define Tracevv(x) {if (verbose>1) fprintf x ;}
	79	# define Tracec(c,x) {if (verbose && (c)) fprintf x ;}
	80	# define Tracecv(c,x) {if (verbose>1 && (c)) fprintf x ;}
	81	#else
	82	# define Assert(cond,msg)
	83	# define Trace(x)
	84	# define Tracev(x)
	85	# define Tracevv(x)
	86	# define Tracec(c,x)
	87	# define Tracecv(c,x)
	88	#endif
	89
51533b61 MS	90	static void flush_window(void);
51533b61 MS	91	static void error(char *m);
51533b61 MS	92
	93	extern char input_data; / lives in head.S */
	94
2d6ffcca	95	static long bytes_out;
51533b61	96	static uch *output_data;
2d6ffcca	97	static unsigned long output_ptr;
51533b61	98
51533b61	99	static void error(char *m);
51533b61 MS	100
	101	static void puts(const char *);
	102
	103	/* the "heap" is put directly after the BSS ends, at end */
	104
	105	extern int _end;
	106	static long free_mem_ptr = (long)&_end;
2d6ffcca	107	static long free_mem_end_ptr;
51533b61 MS	108
	109	#include "../../../../../lib/inflate.c"
	110
51533b61 MS	111	/* decompressor info and error messages to serial console */
	112
	113	static inline void
	114	serout(const char *s, reg_scope_instances regi_ser)
	115	{
	116	reg_ser_rs_stat_din rs;
	117	reg_ser_rw_dout dout = {.data = *s};
	118
	119	do {
	120	rs = REG_RD(ser, regi_ser, rs_stat_din);
	121	}
49b4ff33	122	while (!rs.tr_rdy);/* Wait for transceiver. */
51533b61 MS	123
	124	REG_WR(ser, regi_ser, rw_dout, dout);
	125	}
	126
	127	static void
	128	puts(const char *s)
	129	{
	130	#ifndef CONFIG_ETRAX_DEBUG_PORT_NULL
	131	while (*s) {
	132	#ifdef CONFIG_ETRAX_DEBUG_PORT0
	133	serout(s, regi_ser0);
	134	#endif
	135	#ifdef CONFIG_ETRAX_DEBUG_PORT1
	136	serout(s, regi_ser1);
	137	#endif
	138	#ifdef CONFIG_ETRAX_DEBUG_PORT2
	139	serout(s, regi_ser2);
	140	#endif
	141	#ifdef CONFIG_ETRAX_DEBUG_PORT3
	142	serout(s, regi_ser3);
	143	#endif
	144	*s++;
	145	}
	146	/* CONFIG_ETRAX_DEBUG_PORT_NULL */
	147	#endif
	148	}
	149
	150	void*
	151	memset(void* s, int c, size_t n)
	152	{
	153	int i;
	154	char ss = (char)s;
	155
	156	for (i=0;i<n;i++) ss[i] = c;
a5d204bf JN	157
a5d204bf JN	158	return s;
51533b61 MS	159	}
	160
	161	void*
	162	memcpy(void* __dest, __const void* __src,
	163	size_t __n)
	164	{
	165	int i;
	166	char d = (char )__dest, s = (char )__src;
	167
	168	for (i=0;i<__n;i++) d[i] = s[i];
a5d204bf JN	169
a5d204bf JN	170	return __dest;
51533b61 MS	171	}
	172
	173	/* ===========================================================================
	174	* Write the output window window[0..outcnt-1] and update crc and bytes_out.
	175	* (Used for the decompressed data only.)
	176	*/
	177
	178	static void
	179	flush_window()
	180	{
	181	ulg c = crc; /* temporary variable */
	182	unsigned n;
	183	uch in, out, ch;
	184
	185	in = window;
	186	out = &output_data[output_ptr];
	187	for (n = 0; n < outcnt; n++) {
	188	ch = out++ = in++;
	189	c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
	190	}
	191	crc = c;
	192	bytes_out += (ulg)outcnt;
	193	output_ptr += (ulg)outcnt;
	194	outcnt = 0;
	195	}
	196
	197	static void
	198	error(char *x)
	199	{
a5d204bf	200	puts("\r\n\n");
51533b61	201	puts(x);
a5d204bf	202	puts("\r\n\n -- System halted\n");
51533b61 MS	203
	204	while(1); /* Halt */
	205	}
	206
	207	void
a5d204bf	208	setup_normal_output_buffer(void)
51533b61 MS	209	{
	210	output_data = (char *)KERNEL_LOAD_ADR;
	211	}
	212
	213	static inline void
	214	serial_setup(reg_scope_instances regi_ser)
	215	{
	216	reg_ser_rw_xoff xoff;
	217	reg_ser_rw_tr_ctrl tr_ctrl;
	218	reg_ser_rw_rec_ctrl rec_ctrl;
	219	reg_ser_rw_tr_baud_div tr_baud;
	220	reg_ser_rw_rec_baud_div rec_baud;
	221
	222	/* Turn off XOFF. */
	223	xoff = REG_RD(ser, regi_ser, rw_xoff);
	224
	225	xoff.chr = 0;
	226	xoff.automatic = regk_ser_no;
	227
	228	REG_WR(ser, regi_ser, rw_xoff, xoff);
	229
	230	/* Set baudrate and stopbits. */
	231	tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
	232	rec_ctrl = REG_RD(ser, regi_ser, rw_rec_ctrl);
	233	tr_baud = REG_RD(ser, regi_ser, rw_tr_baud_div);
	234	rec_baud = REG_RD(ser, regi_ser, rw_rec_baud_div);
	235
	236	tr_ctrl.stop_bits = 1; /* 2 stop bits. */
a5d204bf JN	237	tr_ctrl.en = 1; /* enable transmitter */
a5d204bf JN	238	rec_ctrl.en = 1; /* enabler receiver */
51533b61 MS	239
51533b61 MS	240	/*
a5d204bf JN	241	* The baudrate setup used to be a bit fishy, but now transmitter and
	242	* receiver are both set to the intended baud rate, 115200.
	243	* The magic value is 29.493 MHz.
51533b61 MS	244	*/
	245	tr_ctrl.base_freq = regk_ser_f29_493;
	246	rec_ctrl.base_freq = regk_ser_f29_493;
a5d204bf	247	tr_baud.div = (29493000 / 8) / 115200;
51533b61 MS	248	rec_baud.div = (29493000 / 8) / 115200;
	249
	250	REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
	251	REG_WR(ser, regi_ser, rw_tr_baud_div, tr_baud);
	252	REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl);
	253	REG_WR(ser, regi_ser, rw_rec_baud_div, rec_baud);
	254	}
	255
	256	void
a5d204bf	257	decompress_kernel(void)
51533b61 MS	258	{
	259	char revision;
	260
a5d204bf JN	261	#if defined(CONFIG_ETRAX_DEBUG_PORT1) \|\| \
	262	defined(CONFIG_ETRAX_DEBUG_PORT2) \|\| \
	263	defined(CONFIG_ETRAX_DEBUG_PORT3)
	264	reg_pinmux_rw_hwprot hwprot;
	265
	266	#ifdef CONFIG_CRIS_MACH_ARTPEC3
	267	reg_clkgen_rw_clk_ctrl clk_ctrl;
	268
	269	/* Enable corresponding clock region when serial 1..3 selected */
	270
	271	clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl);
	272	clk_ctrl.sser_ser_dma6_7 = regk_clkgen_yes;
	273	REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, clk_ctrl);
	274	#endif
	275
	276	/* pinmux setup for ports 1..3 */
	277	hwprot = REG_RD(pinmux, regi_pinmux, rw_hwprot);
	278	#endif
51533b61 MS	279
	280	#ifdef CONFIG_ETRAX_DEBUG_PORT0
	281	serial_setup(regi_ser0);
	282	#endif
	283	#ifdef CONFIG_ETRAX_DEBUG_PORT1
a5d204bf	284	hwprot.ser1 = regk_pinmux_yes;
51533b61 MS	285	serial_setup(regi_ser1);
	286	#endif
	287	#ifdef CONFIG_ETRAX_DEBUG_PORT2
a5d204bf	288	hwprot.ser2 = regk_pinmux_yes;
51533b61 MS	289	serial_setup(regi_ser2);
	290	#endif
	291	#ifdef CONFIG_ETRAX_DEBUG_PORT3
a5d204bf	292	hwprot.ser3 = regk_pinmux_yes;
51533b61 MS	293	serial_setup(regi_ser3);
51533b61 MS	294	#endif
a5d204bf JN	295	#if defined(CONFIG_ETRAX_DEBUG_PORT1) \|\| \
	296	defined(CONFIG_ETRAX_DEBUG_PORT2) \|\| \
	297	defined(CONFIG_ETRAX_DEBUG_PORT3)
	298	REG_WR(pinmux, regi_pinmux, rw_hwprot, hwprot);
	299	#endif
	300
	301	/* input_data is set in head.S */
	302	inbuf = input_data;
51533b61 MS	303
	304	setup_normal_output_buffer();
	305
	306	makecrc();
	307
	308	__asm__ volatile ("move $vr,%0" : "=rm" (revision));
	309	if (revision < 32)
	310	{
a5d204bf	311	puts("You need an ETRAX FS to run Linux 2.6/crisv32.\r\n");
51533b61 MS	312	while(1);
	313	}
	314
a5d204bf	315	puts("Uncompressing Linux...\r\n");
51533b61	316	gunzip();
a5d204bf	317	puts("Done. Now booting the kernel.\r\n");
51533b61	318	}