[mirror_ubuntu-artful-kernel.git] / arch / frv / include / asm / pgtable.h

/* pgtable.h: FR-V page table mangling
 *
 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
 * Written by David Howells (dhowells@redhat.com)
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 *
 * Derived from:
 *	include/asm-m68knommu/pgtable.h
 *	include/asm-i386/pgtable.h
 */

#ifndef _ASM_PGTABLE_H
#define _ASM_PGTABLE_H

#include <asm/mem-layout.h>
#include <asm/setup.h>
#include <asm/processor.h>

#ifndef __ASSEMBLY__
#include <linux/threads.h>
#include <linux/slab.h>
#include <linux/list.h>
#include <linux/spinlock.h>
#include <linux/sched.h>
struct vm_area_struct;
#endif

#ifndef __ASSEMBLY__
#if defined(CONFIG_HIGHPTE)
typedef unsigned long pte_addr_t;
#else
typedef pte_t *pte_addr_t;
#endif
#endif

/*****************************************************************************/
/*
 * MMU-less operation case first
 */
#ifndef CONFIG_MMU

#define pgd_present(pgd)	(1)		/* pages are always present on NO_MM */
#define pgd_none(pgd)		(0)
#define pgd_bad(pgd)		(0)
#define pgd_clear(pgdp)
#define kern_addr_valid(addr)	(1)
#define	pmd_offset(a, b)	((void *) 0)

#define PAGE_NONE		__pgprot(0)	/* these mean nothing to NO_MM */
#define PAGE_SHARED		__pgprot(0)	/* these mean nothing to NO_MM */
#define PAGE_COPY		__pgprot(0)	/* these mean nothing to NO_MM */
#define PAGE_READONLY		__pgprot(0)	/* these mean nothing to NO_MM */
#define PAGE_KERNEL		__pgprot(0)	/* these mean nothing to NO_MM */

#define __swp_type(x)		(0)
#define __swp_offset(x)		(0)
#define __swp_entry(typ,off)	((swp_entry_t) { ((typ) | ((off) << 7)) })
#define __pte_to_swp_entry(pte)	((swp_entry_t) { pte_val(pte) })
#define __swp_entry_to_pte(x)	((pte_t) { (x).val })

#define ZERO_PAGE(vaddr)	({ BUG(); NULL; })

#define swapper_pg_dir		((pgd_t *) NULL)

#define pgtable_cache_init()		do {} while (0)

#include <asm-generic/pgtable.h>

#else /* !CONFIG_MMU */
/*****************************************************************************/
/*
 * then MMU operation
 */

/*
 * ZERO_PAGE is a global shared page that is always zero: used
 * for zero-mapped memory areas etc..
 */
#ifndef __ASSEMBLY__
extern unsigned long empty_zero_page;
#define ZERO_PAGE(vaddr)	virt_to_page(empty_zero_page)
#endif

/*
 * we use 2-level page tables, folding the PMD (mid-level table) into the PGE (top-level entry)
 * [see Documentation/frv/mmu-layout.txt]
 *
 * Page Directory:
 *  - Size: 16KB
 *  - 64 PGEs per PGD
 *  - Each PGE holds 1 PUD and covers 64MB
 *
 * Page Upper Directory:
 *  - Size: 256B
 *  - 1 PUE per PUD
 *  - Each PUE holds 1 PMD and covers 64MB
 *
 * Page Mid-Level Directory
 *  - Size: 256B
 *  - 1 PME per PMD
 *  - Each PME holds 64 STEs, all of which point to separate chunks of the same Page Table
 *  - All STEs are instantiated at the same time
 *
 * Page Table
 *  - Size: 16KB
 *  - 4096 PTEs per PT
 *  - Each Linux PT is subdivided into 64 FR451 PT's, each of which holds 64 entries
 *
 * Pages
 *  - Size: 4KB
 *
 * total PTEs
 *	= 1 PML4E * 64 PGEs * 1 PUEs * 1 PMEs * 4096 PTEs
 *	= 1 PML4E * 64 PGEs * 64 STEs * 64 PTEs/FR451-PT
 *	= 262144 (or 256 * 1024)
 */
#define PGDIR_SHIFT		26
#define PGDIR_SIZE		(1UL << PGDIR_SHIFT)
#define PGDIR_MASK		(~(PGDIR_SIZE - 1))
#define PTRS_PER_PGD		64

#define PUD_SHIFT		26
#define PTRS_PER_PUD		1
#define PUD_SIZE		(1UL << PUD_SHIFT)
#define PUD_MASK		(~(PUD_SIZE - 1))
#define PUE_SIZE		256

#define PMD_SHIFT		26
#define PMD_SIZE		(1UL << PMD_SHIFT)
#define PMD_MASK		(~(PMD_SIZE - 1))
#define PTRS_PER_PMD		1
#define PME_SIZE		256

#define __frv_PT_SIZE		256

#define PTRS_PER_PTE		4096

#define USER_PGDS_IN_LAST_PML4	(TASK_SIZE / PGDIR_SIZE)
#define FIRST_USER_ADDRESS	0

#define USER_PGD_PTRS		(PAGE_OFFSET >> PGDIR_SHIFT)
#define KERNEL_PGD_PTRS		(PTRS_PER_PGD - USER_PGD_PTRS)

#define TWOLEVEL_PGDIR_SHIFT	26
#define BOOT_USER_PGD_PTRS	(__PAGE_OFFSET >> TWOLEVEL_PGDIR_SHIFT)
#define BOOT_KERNEL_PGD_PTRS	(PTRS_PER_PGD - BOOT_USER_PGD_PTRS)

#ifndef __ASSEMBLY__

extern pgd_t swapper_pg_dir[PTRS_PER_PGD];

#define pte_ERROR(e) \
	printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, (e).pte)
#define pmd_ERROR(e) \
	printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
#define pud_ERROR(e) \
	printk("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pmd_val(pud_val(e)))
#define pgd_ERROR(e) \
	printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pmd_val(pud_val(pgd_val(e))))

/*
 * Certain architectures need to do special things when PTEs
 * within a page table are directly modified.  Thus, the following
 * hook is made available.
 */
#define set_pte(pteptr, pteval)				\
do {							\
	*(pteptr) = (pteval);				\
	asm volatile("dcf %M0" :: "U"(*pteptr));	\
} while(0)
#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)

/*
 * pgd_offset() returns a (pgd_t *)
 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
 */
#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))

/*
 * a shortcut which implies the use of the kernel's pgd, instead
 * of a process's
 */
#define pgd_offset_k(address) pgd_offset(&init_mm, address)

/*
 * The "pgd_xxx()" functions here are trivial for a folded two-level
 * setup: the pud is never bad, and a pud always exists (as it's folded
 * into the pgd entry)
 */
static inline int pgd_none(pgd_t pgd)		{ return 0; }
static inline int pgd_bad(pgd_t pgd)		{ return 0; }
static inline int pgd_present(pgd_t pgd)	{ return 1; }
static inline void pgd_clear(pgd_t *pgd)	{ }

#define pgd_populate(mm, pgd, pud)		do { } while (0)
/*
 * (puds are folded into pgds so this doesn't get actually called,
 * but the define is needed for a generic inline function.)
 */
#define set_pgd(pgdptr, pgdval)				\
do {							\
	memcpy((pgdptr), &(pgdval), sizeof(pgd_t));	\
	asm volatile("dcf %M0" :: "U"(*(pgdptr)));	\
} while(0)

static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
{
	return (pud_t *) pgd;
}

#define pgd_page(pgd)				(pud_page((pud_t){ pgd }))
#define pgd_page_vaddr(pgd)			(pud_page_vaddr((pud_t){ pgd }))

/*
 * allocating and freeing a pud is trivial: the 1-entry pud is
 * inside the pgd, so has no extra memory associated with it.
 */
#define pud_alloc_one(mm, address)		NULL
#define pud_free(mm, x)				do { } while (0)
#define __pud_free_tlb(tlb, x, address)		do { } while (0)

/*
 * The "pud_xxx()" functions here are trivial for a folded two-level
 * setup: the pmd is never bad, and a pmd always exists (as it's folded
 * into the pud entry)
 */
static inline int pud_none(pud_t pud)		{ return 0; }
static inline int pud_bad(pud_t pud)		{ return 0; }
static inline int pud_present(pud_t pud)	{ return 1; }
static inline void pud_clear(pud_t *pud)	{ }

#define pud_populate(mm, pmd, pte)		do { } while (0)

/*
 * (pmds are folded into puds so this doesn't get actually called,
 * but the define is needed for a generic inline function.)
 */
#define set_pud(pudptr, pudval)			set_pmd((pmd_t *)(pudptr), (pmd_t) { pudval })

#define pud_page(pud)				(pmd_page((pmd_t){ pud }))
#define pud_page_vaddr(pud)			(pmd_page_vaddr((pmd_t){ pud }))

/*
 * (pmds are folded into pgds so this doesn't get actually called,
 * but the define is needed for a generic inline function.)
 */
extern void __set_pmd(pmd_t *pmdptr, unsigned long __pmd);

#define set_pmd(pmdptr, pmdval)			\
do {						\
	__set_pmd((pmdptr), (pmdval).ste[0]);	\
} while(0)

#define __pmd_index(address)			0

static inline pmd_t *pmd_offset(pud_t *dir, unsigned long address)
{
	return (pmd_t *) dir + __pmd_index(address);
}

#define pte_same(a, b)		((a).pte == (b).pte)
#define pte_page(x)		(mem_map + ((unsigned long)(((x).pte >> PAGE_SHIFT))))
#define pte_none(x)		(!(x).pte)
#define pte_pfn(x)		((unsigned long)(((x).pte >> PAGE_SHIFT)))
#define pfn_pte(pfn, prot)	__pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
#define pfn_pmd(pfn, prot)	__pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot))

#define VMALLOC_VMADDR(x)	((unsigned long) (x))

#endif /* !__ASSEMBLY__ */

/*
 * control flags in AMPR registers and TLB entries
 */
#define _PAGE_BIT_PRESENT	xAMPRx_V_BIT
#define _PAGE_BIT_WP		DAMPRx_WP_BIT
#define _PAGE_BIT_NOCACHE	xAMPRx_C_BIT
#define _PAGE_BIT_SUPER		xAMPRx_S_BIT
#define _PAGE_BIT_ACCESSED	xAMPRx_RESERVED8_BIT
#define _PAGE_BIT_DIRTY		xAMPRx_M_BIT
#define _PAGE_BIT_NOTGLOBAL	xAMPRx_NG_BIT

#define _PAGE_PRESENT		xAMPRx_V
#define _PAGE_WP		DAMPRx_WP
#define _PAGE_NOCACHE		xAMPRx_C
#define _PAGE_SUPER		xAMPRx_S
#define _PAGE_ACCESSED		xAMPRx_RESERVED8	/* accessed if set */
#define _PAGE_DIRTY		xAMPRx_M
#define _PAGE_NOTGLOBAL		xAMPRx_NG

#define _PAGE_RESERVED_MASK	(xAMPRx_RESERVED8 | xAMPRx_RESERVED13)

#define _PAGE_PROTNONE		0x000	/* If not present */

#define _PAGE_CHG_MASK		(PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)

#define __PGPROT_BASE \
	(_PAGE_PRESENT | xAMPRx_SS_16Kb | xAMPRx_D | _PAGE_NOTGLOBAL | _PAGE_ACCESSED)

#define PAGE_NONE	__pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
#define PAGE_SHARED	__pgprot(__PGPROT_BASE)
#define PAGE_COPY	__pgprot(__PGPROT_BASE | _PAGE_WP)
#define PAGE_READONLY	__pgprot(__PGPROT_BASE | _PAGE_WP)

#define __PAGE_KERNEL		(__PGPROT_BASE | _PAGE_SUPER | _PAGE_DIRTY)
#define __PAGE_KERNEL_NOCACHE	(__PGPROT_BASE | _PAGE_SUPER | _PAGE_DIRTY | _PAGE_NOCACHE)
#define __PAGE_KERNEL_RO	(__PGPROT_BASE | _PAGE_SUPER | _PAGE_DIRTY | _PAGE_WP)

#define MAKE_GLOBAL(x) __pgprot((x) & ~_PAGE_NOTGLOBAL)

#define PAGE_KERNEL		MAKE_GLOBAL(__PAGE_KERNEL)
#define PAGE_KERNEL_RO		MAKE_GLOBAL(__PAGE_KERNEL_RO)
#define PAGE_KERNEL_NOCACHE	MAKE_GLOBAL(__PAGE_KERNEL_NOCACHE)

#define _PAGE_TABLE		(_PAGE_PRESENT | xAMPRx_SS_16Kb)

#ifndef __ASSEMBLY__

/*
 * The FR451 can do execute protection by virtue of having separate TLB miss handlers for
 * instruction access and for data access. However, we don't have enough reserved bits to say
 * "execute only", so we don't bother. If you can read it, you can execute it and vice versa.
 */
#define __P000	PAGE_NONE
#define __P001	PAGE_READONLY
#define __P010	PAGE_COPY
#define __P011	PAGE_COPY
#define __P100	PAGE_READONLY
#define __P101	PAGE_READONLY
#define __P110	PAGE_COPY
#define __P111	PAGE_COPY

#define __S000	PAGE_NONE
#define __S001	PAGE_READONLY
#define __S010	PAGE_SHARED
#define __S011	PAGE_SHARED
#define __S100	PAGE_READONLY
#define __S101	PAGE_READONLY
#define __S110	PAGE_SHARED
#define __S111	PAGE_SHARED

/*
 * Define this to warn about kernel memory accesses that are
 * done without a 'access_ok(VERIFY_WRITE,..)'
 */
#undef TEST_ACCESS_OK

#define pte_present(x)	(pte_val(x) & _PAGE_PRESENT)
#define pte_clear(mm,addr,xp)	do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)

#define pmd_none(x)	(!pmd_val(x))
#define pmd_present(x)	(pmd_val(x) & _PAGE_PRESENT)
#define	pmd_bad(x)	(pmd_val(x) & xAMPRx_SS)
#define pmd_clear(xp)	do { __set_pmd(xp, 0); } while(0)

#define pmd_page_vaddr(pmd) \
	((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))

#ifndef CONFIG_DISCONTIGMEM
#define pmd_page(pmd)	(pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
#endif

#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))

/*
 * The following only work if pte_present() is true.
 * Undefined behaviour if not..
 */
static inline int pte_dirty(pte_t pte)		{ return (pte).pte & _PAGE_DIRTY; }
static inline int pte_young(pte_t pte)		{ return (pte).pte & _PAGE_ACCESSED; }
static inline int pte_write(pte_t pte)		{ return !((pte).pte & _PAGE_WP); }
static inline int pte_special(pte_t pte)	{ return 0; }

static inline pte_t pte_mkclean(pte_t pte)	{ (pte).pte &= ~_PAGE_DIRTY; return pte; }
static inline pte_t pte_mkold(pte_t pte)	{ (pte).pte &= ~_PAGE_ACCESSED; return pte; }
static inline pte_t pte_wrprotect(pte_t pte)	{ (pte).pte |= _PAGE_WP; return pte; }
static inline pte_t pte_mkdirty(pte_t pte)	{ (pte).pte |= _PAGE_DIRTY; return pte; }
static inline pte_t pte_mkyoung(pte_t pte)	{ (pte).pte |= _PAGE_ACCESSED; return pte; }
static inline pte_t pte_mkwrite(pte_t pte)	{ (pte).pte &= ~_PAGE_WP; return pte; }
static inline pte_t pte_mkspecial(pte_t pte)	{ return pte; }

static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
{
	int i = test_and_clear_bit(_PAGE_BIT_ACCESSED, ptep);
	asm volatile("dcf %M0" :: "U"(*ptep));
	return i;
}

static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
{
	unsigned long x = xchg(&ptep->pte, 0);
	asm volatile("dcf %M0" :: "U"(*ptep));
	return __pte(x);
}

static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
{
	set_bit(_PAGE_BIT_WP, ptep);
	asm volatile("dcf %M0" :: "U"(*ptep));
}

/*
 * Macro to mark a page protection value as "uncacheable"
 */
#define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_NOCACHE))

/*
 * Conversion functions: convert a page and protection to a page entry,
 * and a page entry and page directory to the page they refer to.
 */

#define mk_pte(page, pgprot)	pfn_pte(page_to_pfn(page), (pgprot))
#define mk_pte_huge(entry)	((entry).pte_low |= _PAGE_PRESENT | _PAGE_PSE)

/* This takes a physical page address that is used by the remapping functions */
#define mk_pte_phys(physpage, pgprot)	pfn_pte((physpage) >> PAGE_SHIFT, pgprot)

static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
{
	pte.pte &= _PAGE_CHG_MASK;
	pte.pte |= pgprot_val(newprot);
	return pte;
}

/* to find an entry in a page-table-directory. */
#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
#define pgd_index_k(addr) pgd_index(addr)

/* Find an entry in the bottom-level page table.. */
#define __pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))

/*
 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
 *
 * this macro returns the index of the entry in the pte page which would
 * control the given virtual address
 */
#define pte_index(address) \
		(((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
#define pte_offset_kernel(dir, address) \
	((pte_t *) pmd_page_vaddr(*(dir)) +  pte_index(address))

#if defined(CONFIG_HIGHPTE)
#define pte_offset_map(dir, address) \
	((pte_t *)kmap_atomic(pmd_page(*(dir))) + pte_index(address))
#define pte_unmap(pte) kunmap_atomic(pte)
#else
#define pte_offset_map(dir, address) \
	((pte_t *)page_address(pmd_page(*(dir))) + pte_index(address))
#define pte_unmap(pte) do { } while (0)
#endif

/*
 * Handle swap and file entries
 * - the PTE is encoded in the following format:
 *	bit 0:		Must be 0 (!_PAGE_PRESENT)
 *	bits 1-6:	Swap type
 *	bits 7-31:	Swap offset
 */
#define __swp_type(x)			(((x).val >> 1) & 0x1f)
#define __swp_offset(x)			((x).val >> 7)
#define __swp_entry(type, offset)	((swp_entry_t) { ((type) << 1) | ((offset) << 7) })
#define __pte_to_swp_entry(_pte)	((swp_entry_t) { (_pte).pte })
#define __swp_entry_to_pte(x)		((pte_t) { (x).val })

/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
#define PageSkip(page)		(0)
#define kern_addr_valid(addr)	(1)

#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
#define __HAVE_ARCH_PTEP_SET_WRPROTECT
#define __HAVE_ARCH_PTE_SAME
#include <asm-generic/pgtable.h>

/*
 * preload information about a newly instantiated PTE into the SCR0/SCR1 PGE cache
 */
static inline void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep)
{
	struct mm_struct *mm;
	unsigned long ampr;

	mm = current->mm;
	if (mm) {
		pgd_t *pge = pgd_offset(mm, address);
		pud_t *pue = pud_offset(pge, address);
		pmd_t *pme = pmd_offset(pue, address);

		ampr = pme->ste[0] & 0xffffff00;
		ampr |= xAMPRx_L | xAMPRx_SS_16Kb | xAMPRx_S | xAMPRx_C |
			xAMPRx_V;
	} else {
		address = ULONG_MAX;
		ampr = 0;
	}

	asm volatile("movgs %0,scr0\n"
		     "movgs %0,scr1\n"
		     "movgs %1,dampr4\n"
		     "movgs %1,dampr5\n"
		     :
		     : "r"(address), "r"(ampr)
		     );
}

#ifdef CONFIG_PROC_FS
extern char *proc_pid_status_frv_cxnr(struct mm_struct *mm, char *buffer);
#endif

extern void __init pgtable_cache_init(void);

#endif /* !__ASSEMBLY__ */
#endif /* !CONFIG_MMU */

#ifndef __ASSEMBLY__
extern void __init paging_init(void);
#endif /* !__ASSEMBLY__ */

#endif /* _ASM_PGTABLE_H */
Commit	Line	Data
1da177e4 LT	1	/* pgtable.h: FR-V page table mangling
	2	*
	3	* Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
	4	* Written by David Howells (dhowells@redhat.com)
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License
	8	* as published by the Free Software Foundation; either version
	9	* 2 of the License, or (at your option) any later version.
	10	*
	11	* Derived from:
	12	* include/asm-m68knommu/pgtable.h
	13	* include/asm-i386/pgtable.h
	14	*/
	15
	16	#ifndef _ASM_PGTABLE_H
	17	#define _ASM_PGTABLE_H
	18
1da177e4 LT	19	#include <asm/mem-layout.h>
	20	#include <asm/setup.h>
	21	#include <asm/processor.h>
	22
	23	#ifndef __ASSEMBLY__
	24	#include <linux/threads.h>
	25	#include <linux/slab.h>
	26	#include <linux/list.h>
	27	#include <linux/spinlock.h>
95203aec	28	#include <linux/sched.h>
8c65b4a6	29	struct vm_area_struct;
1da177e4 LT	30	#endif
	31
	32	#ifndef __ASSEMBLY__
	33	#if defined(CONFIG_HIGHPTE)
	34	typedef unsigned long pte_addr_t;
	35	#else
	36	typedef pte_t *pte_addr_t;
	37	#endif
	38	#endif
	39
	40	/*****************************************************************************/
	41	/*
	42	* MMU-less operation case first
	43	*/
	44	#ifndef CONFIG_MMU
	45
	46	#define pgd_present(pgd) (1) /* pages are always present on NO_MM */
	47	#define pgd_none(pgd) (0)
	48	#define pgd_bad(pgd) (0)
	49	#define pgd_clear(pgdp)
	50	#define kern_addr_valid(addr) (1)
	51	#define pmd_offset(a, b) ((void *) 0)
	52
	53	#define PAGE_NONE __pgprot(0) /* these mean nothing to NO_MM */
	54	#define PAGE_SHARED __pgprot(0) /* these mean nothing to NO_MM */
	55	#define PAGE_COPY __pgprot(0) /* these mean nothing to NO_MM */
	56	#define PAGE_READONLY __pgprot(0) /* these mean nothing to NO_MM */
	57	#define PAGE_KERNEL __pgprot(0) /* these mean nothing to NO_MM */
	58
	59	#define __swp_type(x) (0)
	60	#define __swp_offset(x) (0)
	61	#define __swp_entry(typ,off) ((swp_entry_t) { ((typ) \| ((off) << 7)) })
	62	#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
	63	#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
	64
1da177e4 LT	65	#define ZERO_PAGE(vaddr) ({ BUG(); NULL; })
	66
	67	#define swapper_pg_dir ((pgd_t *) NULL)
	68
28936117	69	#define pgtable_cache_init() do {} while (0)
6fde836b DH	70
6fde836b DH	71	#include <asm-generic/pgtable.h>
1da177e4 LT	72
	73	#else /* !CONFIG_MMU */
	74	/*****************************************************************************/
	75	/*
	76	* then MMU operation
	77	*/
	78
	79	/*
	80	* ZERO_PAGE is a global shared page that is always zero: used
	81	* for zero-mapped memory areas etc..
	82	*/
	83	#ifndef __ASSEMBLY__
	84	extern unsigned long empty_zero_page;
	85	#define ZERO_PAGE(vaddr) virt_to_page(empty_zero_page)
	86	#endif
	87
	88	/*
	89	* we use 2-level page tables, folding the PMD (mid-level table) into the PGE (top-level entry)
0868ff7a	90	* [see Documentation/frv/mmu-layout.txt]
1da177e4 LT	91	*
	92	* Page Directory:
	93	* - Size: 16KB
	94	* - 64 PGEs per PGD
	95	* - Each PGE holds 1 PUD and covers 64MB
	96	*
	97	* Page Upper Directory:
	98	* - Size: 256B
	99	* - 1 PUE per PUD
	100	* - Each PUE holds 1 PMD and covers 64MB
	101	*
	102	* Page Mid-Level Directory
	103	* - Size: 256B
	104	* - 1 PME per PMD
	105	* - Each PME holds 64 STEs, all of which point to separate chunks of the same Page Table
	106	* - All STEs are instantiated at the same time
	107	*
	108	* Page Table
	109	* - Size: 16KB
	110	* - 4096 PTEs per PT
	111	* - Each Linux PT is subdivided into 64 FR451 PT's, each of which holds 64 entries
	112	*
	113	* Pages
	114	* - Size: 4KB
	115	*
	116	* total PTEs
	117	* = 1 PML4E * 64 PGEs * 1 PUEs * 1 PMEs * 4096 PTEs
	118	* = 1 PML4E * 64 PGEs * 64 STEs * 64 PTEs/FR451-PT
	119	* = 262144 (or 256 * 1024)
	120	*/
	121	#define PGDIR_SHIFT 26
	122	#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
	123	#define PGDIR_MASK (~(PGDIR_SIZE - 1))
	124	#define PTRS_PER_PGD 64
	125
	126	#define PUD_SHIFT 26
	127	#define PTRS_PER_PUD 1
	128	#define PUD_SIZE (1UL << PUD_SHIFT)
	129	#define PUD_MASK (~(PUD_SIZE - 1))
	130	#define PUE_SIZE 256
	131
	132	#define PMD_SHIFT 26
	133	#define PMD_SIZE (1UL << PMD_SHIFT)
	134	#define PMD_MASK (~(PMD_SIZE - 1))
	135	#define PTRS_PER_PMD 1
	136	#define PME_SIZE 256
	137
	138	#define __frv_PT_SIZE 256
	139
	140	#define PTRS_PER_PTE 4096
	141
	142	#define USER_PGDS_IN_LAST_PML4 (TASK_SIZE / PGDIR_SIZE)
d455a369	143	#define FIRST_USER_ADDRESS 0
1da177e4 LT	144
	145	#define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
	146	#define KERNEL_PGD_PTRS (PTRS_PER_PGD - USER_PGD_PTRS)
	147
	148	#define TWOLEVEL_PGDIR_SHIFT 26
	149	#define BOOT_USER_PGD_PTRS (__PAGE_OFFSET >> TWOLEVEL_PGDIR_SHIFT)
	150	#define BOOT_KERNEL_PGD_PTRS (PTRS_PER_PGD - BOOT_USER_PGD_PTRS)
	151
	152	#ifndef __ASSEMBLY__
	153
	154	extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
	155
	156	#define pte_ERROR(e) \
	157	printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, (e).pte)
	158	#define pmd_ERROR(e) \
	159	printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
	160	#define pud_ERROR(e) \
	161	printk("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pmd_val(pud_val(e)))
	162	#define pgd_ERROR(e) \
	163	printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pmd_val(pud_val(pgd_val(e))))
	164
	165	/*
	166	* Certain architectures need to do special things when PTEs
	167	* within a page table are directly modified. Thus, the following
	168	* hook is made available.
	169	*/
	170	#define set_pte(pteptr, pteval) \
	171	do { \
	172	*(pteptr) = (pteval); \
	173	asm volatile("dcf %M0" :: "U"(*pteptr)); \
	174	} while(0)
	175	#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
	176
1da177e4 LT	177	/*
	178	* pgd_offset() returns a (pgd_t *)
	179	* pgd_index() is used get the offset into the pgd page's array of pgd_t's;
	180	*/
	181	#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
	182
	183	/*
	184	* a shortcut which implies the use of the kernel's pgd, instead
	185	* of a process's
	186	*/
	187	#define pgd_offset_k(address) pgd_offset(&init_mm, address)
	188
	189	/*
	190	* The "pgd_xxx()" functions here are trivial for a folded two-level
	191	* setup: the pud is never bad, and a pud always exists (as it's folded
	192	* into the pgd entry)
	193	*/
	194	static inline int pgd_none(pgd_t pgd) { return 0; }
	195	static inline int pgd_bad(pgd_t pgd) { return 0; }
	196	static inline int pgd_present(pgd_t pgd) { return 1; }
	197	static inline void pgd_clear(pgd_t *pgd) { }
	198
	199	#define pgd_populate(mm, pgd, pud) do { } while (0)
	200	/*
	201	* (puds are folded into pgds so this doesn't get actually called,
	202	* but the define is needed for a generic inline function.)
	203	*/
	204	#define set_pgd(pgdptr, pgdval) \
	205	do { \
	206	memcpy((pgdptr), &(pgdval), sizeof(pgd_t)); \
	207	asm volatile("dcf %M0" :: "U"(*(pgdptr))); \
	208	} while(0)
	209
	210	static inline pud_t pud_offset(pgd_t pgd, unsigned long address)
	211	{
	212	return (pud_t *) pgd;
	213	}
	214
	215	#define pgd_page(pgd) (pud_page((pud_t){ pgd }))
46a82b2d	216	#define pgd_page_vaddr(pgd) (pud_page_vaddr((pud_t){ pgd }))
1da177e4 LT	217
	218	/*
	219	* allocating and freeing a pud is trivial: the 1-entry pud is
	220	* inside the pgd, so has no extra memory associated with it.
	221	*/
	222	#define pud_alloc_one(mm, address) NULL
5e541973	223	#define pud_free(mm, x) do { } while (0)
9e1b32ca	224	#define __pud_free_tlb(tlb, x, address) do { } while (0)
1da177e4 LT	225
	226	/*
	227	* The "pud_xxx()" functions here are trivial for a folded two-level
	228	* setup: the pmd is never bad, and a pmd always exists (as it's folded
	229	* into the pud entry)
	230	*/
	231	static inline int pud_none(pud_t pud) { return 0; }
	232	static inline int pud_bad(pud_t pud) { return 0; }
	233	static inline int pud_present(pud_t pud) { return 1; }
	234	static inline void pud_clear(pud_t *pud) { }
	235
	236	#define pud_populate(mm, pmd, pte) do { } while (0)
	237
	238	/*
	239	* (pmds are folded into puds so this doesn't get actually called,
	240	* but the define is needed for a generic inline function.)
	241	*/
	242	#define set_pud(pudptr, pudval) set_pmd((pmd_t *)(pudptr), (pmd_t) { pudval })
	243
	244	#define pud_page(pud) (pmd_page((pmd_t){ pud }))
46a82b2d	245	#define pud_page_vaddr(pud) (pmd_page_vaddr((pmd_t){ pud }))
1da177e4 LT	246
	247	/*
	248	* (pmds are folded into pgds so this doesn't get actually called,
	249	* but the define is needed for a generic inline function.)
	250	*/
	251	extern void __set_pmd(pmd_t *pmdptr, unsigned long __pmd);
	252
	253	#define set_pmd(pmdptr, pmdval) \
	254	do { \
	255	__set_pmd((pmdptr), (pmdval).ste[0]); \
	256	} while(0)
	257
	258	#define __pmd_index(address) 0
	259
	260	static inline pmd_t pmd_offset(pud_t dir, unsigned long address)
	261	{
	262	return (pmd_t *) dir + __pmd_index(address);
	263	}
	264
	265	#define pte_same(a, b) ((a).pte == (b).pte)
	266	#define pte_page(x) (mem_map + ((unsigned long)(((x).pte >> PAGE_SHIFT))))
	267	#define pte_none(x) (!(x).pte)
	268	#define pte_pfn(x) ((unsigned long)(((x).pte >> PAGE_SHIFT)))
	269	#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) \| pgprot_val(prot))
	270	#define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) \| pgprot_val(prot))
	271
	272	#define VMALLOC_VMADDR(x) ((unsigned long) (x))
	273
	274	#endif /* !__ASSEMBLY__ */
	275
	276	/*
	277	* control flags in AMPR registers and TLB entries
	278	*/
	279	#define _PAGE_BIT_PRESENT xAMPRx_V_BIT
	280	#define _PAGE_BIT_WP DAMPRx_WP_BIT
	281	#define _PAGE_BIT_NOCACHE xAMPRx_C_BIT
	282	#define _PAGE_BIT_SUPER xAMPRx_S_BIT
	283	#define _PAGE_BIT_ACCESSED xAMPRx_RESERVED8_BIT
	284	#define _PAGE_BIT_DIRTY xAMPRx_M_BIT
	285	#define _PAGE_BIT_NOTGLOBAL xAMPRx_NG_BIT
	286
	287	#define _PAGE_PRESENT xAMPRx_V
	288	#define _PAGE_WP DAMPRx_WP
	289	#define _PAGE_NOCACHE xAMPRx_C
	290	#define _PAGE_SUPER xAMPRx_S
	291	#define _PAGE_ACCESSED xAMPRx_RESERVED8 /* accessed if set */
	292	#define _PAGE_DIRTY xAMPRx_M
	293	#define _PAGE_NOTGLOBAL xAMPRx_NG
	294
	295	#define _PAGE_RESERVED_MASK (xAMPRx_RESERVED8 \| xAMPRx_RESERVED13)
	296
1da177e4 LT	297	#define _PAGE_PROTNONE 0x000 /* If not present */
	298
	299	#define _PAGE_CHG_MASK (PTE_MASK \| _PAGE_ACCESSED \| _PAGE_DIRTY)
	300
	301	#define __PGPROT_BASE \
	302	(_PAGE_PRESENT \| xAMPRx_SS_16Kb \| xAMPRx_D \| _PAGE_NOTGLOBAL \| _PAGE_ACCESSED)
	303
	304	#define PAGE_NONE __pgprot(_PAGE_PROTNONE \| _PAGE_ACCESSED)
	305	#define PAGE_SHARED __pgprot(__PGPROT_BASE)
	306	#define PAGE_COPY __pgprot(__PGPROT_BASE \| _PAGE_WP)
	307	#define PAGE_READONLY __pgprot(__PGPROT_BASE \| _PAGE_WP)
	308
	309	#define __PAGE_KERNEL (__PGPROT_BASE \| _PAGE_SUPER \| _PAGE_DIRTY)
	310	#define __PAGE_KERNEL_NOCACHE (__PGPROT_BASE \| _PAGE_SUPER \| _PAGE_DIRTY \| _PAGE_NOCACHE)
	311	#define __PAGE_KERNEL_RO (__PGPROT_BASE \| _PAGE_SUPER \| _PAGE_DIRTY \| _PAGE_WP)
	312
	313	#define MAKE_GLOBAL(x) __pgprot((x) & ~_PAGE_NOTGLOBAL)
	314
	315	#define PAGE_KERNEL MAKE_GLOBAL(__PAGE_KERNEL)
	316	#define PAGE_KERNEL_RO MAKE_GLOBAL(__PAGE_KERNEL_RO)
	317	#define PAGE_KERNEL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_NOCACHE)
	318
	319	#define _PAGE_TABLE (_PAGE_PRESENT \| xAMPRx_SS_16Kb)
	320
	321	#ifndef __ASSEMBLY__
	322
	323	/*
	324	* The FR451 can do execute protection by virtue of having separate TLB miss handlers for
	325	* instruction access and for data access. However, we don't have enough reserved bits to say
	326	* "execute only", so we don't bother. If you can read it, you can execute it and vice versa.
	327	*/
	328	#define __P000 PAGE_NONE
	329	#define __P001 PAGE_READONLY
	330	#define __P010 PAGE_COPY
	331	#define __P011 PAGE_COPY
	332	#define __P100 PAGE_READONLY
	333	#define __P101 PAGE_READONLY
	334	#define __P110 PAGE_COPY
	335	#define __P111 PAGE_COPY
	336
	337	#define __S000 PAGE_NONE
	338	#define __S001 PAGE_READONLY
	339	#define __S010 PAGE_SHARED
	340	#define __S011 PAGE_SHARED
	341	#define __S100 PAGE_READONLY
	342	#define __S101 PAGE_READONLY
	343	#define __S110 PAGE_SHARED
	344	#define __S111 PAGE_SHARED
	345
	346	/*
	347	* Define this to warn about kernel memory accesses that are
e49332bd	348	* done without a 'access_ok(VERIFY_WRITE,..)'
1da177e4	349	*/
e49332bd	350	#undef TEST_ACCESS_OK
1da177e4 LT	351
	352	#define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
	353	#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
	354
	355	#define pmd_none(x) (!pmd_val(x))
	356	#define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
	357	#define pmd_bad(x) (pmd_val(x) & xAMPRx_SS)
	358	#define pmd_clear(xp) do { __set_pmd(xp, 0); } while(0)
	359
46a82b2d	360	#define pmd_page_vaddr(pmd) \
1da177e4 LT	361	((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
	362
	363	#ifndef CONFIG_DISCONTIGMEM
	364	#define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
	365	#endif
	366
	367	#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
	368
	369	/*
	370	* The following only work if pte_present() is true.
	371	* Undefined behaviour if not..
	372	*/
1da177e4 LT	373	static inline int pte_dirty(pte_t pte) { return (pte).pte & _PAGE_DIRTY; }
	374	static inline int pte_young(pte_t pte) { return (pte).pte & _PAGE_ACCESSED; }
	375	static inline int pte_write(pte_t pte) { return !((pte).pte & _PAGE_WP); }
7e675137	376	static inline int pte_special(pte_t pte) { return 0; }
1da177e4	377
1da177e4 LT	378	static inline pte_t pte_mkclean(pte_t pte) { (pte).pte &= ~_PAGE_DIRTY; return pte; }
	379	static inline pte_t pte_mkold(pte_t pte) { (pte).pte &= ~_PAGE_ACCESSED; return pte; }
	380	static inline pte_t pte_wrprotect(pte_t pte) { (pte).pte \|= _PAGE_WP; return pte; }
1da177e4 LT	381	static inline pte_t pte_mkdirty(pte_t pte) { (pte).pte \|= _PAGE_DIRTY; return pte; }
	382	static inline pte_t pte_mkyoung(pte_t pte) { (pte).pte \|= _PAGE_ACCESSED; return pte; }
	383	static inline pte_t pte_mkwrite(pte_t pte) { (pte).pte &= ~_PAGE_WP; return pte; }
7e675137	384	static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
1da177e4	385
1da177e4 LT	386	static inline int ptep_test_and_clear_young(struct vm_area_struct vma, unsigned long addr, pte_t ptep)
	387	{
	388	int i = test_and_clear_bit(_PAGE_BIT_ACCESSED, ptep);
	389	asm volatile("dcf %M0" :: "U"(*ptep));
	390	return i;
	391	}
	392
	393	static inline pte_t ptep_get_and_clear(struct mm_struct mm, unsigned long addr, pte_t ptep)
	394	{
	395	unsigned long x = xchg(&ptep->pte, 0);
	396	asm volatile("dcf %M0" :: "U"(*ptep));
	397	return __pte(x);
	398	}
	399
	400	static inline void ptep_set_wrprotect(struct mm_struct mm, unsigned long addr, pte_t ptep)
	401	{
	402	set_bit(_PAGE_BIT_WP, ptep);
	403	asm volatile("dcf %M0" :: "U"(*ptep));
	404	}
	405
41be6aef DH	406	/*
	407	* Macro to mark a page protection value as "uncacheable"
	408	*/
	409	#define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) \| _PAGE_NOCACHE))
	410
1da177e4 LT	411	/*
	412	* Conversion functions: convert a page and protection to a page entry,
	413	* and a page entry and page directory to the page they refer to.
	414	*/
	415
	416	#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
	417	#define mk_pte_huge(entry) ((entry).pte_low \|= _PAGE_PRESENT \| _PAGE_PSE)
	418
	419	/* This takes a physical page address that is used by the remapping functions */
	420	#define mk_pte_phys(physpage, pgprot) pfn_pte((physpage) >> PAGE_SHIFT, pgprot)
	421
	422	static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
	423	{
	424	pte.pte &= _PAGE_CHG_MASK;
	425	pte.pte \|= pgprot_val(newprot);
	426	return pte;
	427	}
	428
1da177e4 LT	429	/* to find an entry in a page-table-directory. */
	430	#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
	431	#define pgd_index_k(addr) pgd_index(addr)
	432
	433	/* Find an entry in the bottom-level page table.. */
	434	#define __pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
	435
	436	/*
	437	* the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
	438	*
	439	* this macro returns the index of the entry in the pte page which would
	440	* control the given virtual address
	441	*/
	442	#define pte_index(address) \
	443	(((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
	444	#define pte_offset_kernel(dir, address) \
46a82b2d	445	((pte_t ) pmd_page_vaddr((dir)) + pte_index(address))
1da177e4 LT	446
	447	#if defined(CONFIG_HIGHPTE)
	448	#define pte_offset_map(dir, address) \
ece0e2b6 PZ	449	((pte_t )kmap_atomic(pmd_page((dir))) + pte_index(address))
ece0e2b6 PZ	450	#define pte_unmap(pte) kunmap_atomic(pte)
1da177e4 LT	451	#else
	452	#define pte_offset_map(dir, address) \
	453	((pte_t )page_address(pmd_page((dir))) + pte_index(address))
1da177e4	454	#define pte_unmap(pte) do { } while (0)
1da177e4 LT	455	#endif
	456
	457	/*
	458	* Handle swap and file entries
	459	* - the PTE is encoded in the following format:
	460	* bit 0: Must be 0 (!_PAGE_PRESENT)
ca5bfa7b KS	461	* bits 1-6: Swap type
ca5bfa7b KS	462	* bits 7-31: Swap offset
1da177e4	463	*/
ca5bfa7b KS	464	#define __swp_type(x) (((x).val >> 1) & 0x1f)
	465	#define __swp_offset(x) ((x).val >> 7)
	466	#define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 1) \| ((offset) << 7) })
2f609712	467	#define __pte_to_swp_entry(_pte) ((swp_entry_t) { (_pte).pte })
1da177e4 LT	468	#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
1da177e4 LT	469
1da177e4 LT	470	/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
	471	#define PageSkip(page) (0)
	472	#define kern_addr_valid(addr) (1)
	473
1da177e4	474	#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
1da177e4 LT	475	#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
	476	#define __HAVE_ARCH_PTEP_SET_WRPROTECT
	477	#define __HAVE_ARCH_PTE_SAME
	478	#include <asm-generic/pgtable.h>
	479
	480	/*
	481	* preload information about a newly instantiated PTE into the SCR0/SCR1 PGE cache
	482	*/
4b3073e1	483	static inline void update_mmu_cache(struct vm_area_struct vma, unsigned long address, pte_t ptep)
1da177e4	484	{
a31b9dd8	485	struct mm_struct *mm;
1da177e4	486	unsigned long ampr;
1da177e4	487
a31b9dd8 DH	488	mm = current->mm;
	489	if (mm) {
	490	pgd_t *pge = pgd_offset(mm, address);
	491	pud_t *pue = pud_offset(pge, address);
	492	pmd_t *pme = pmd_offset(pue, address);
	493
	494	ampr = pme->ste[0] & 0xffffff00;
	495	ampr \|= xAMPRx_L \| xAMPRx_SS_16Kb \| xAMPRx_S \| xAMPRx_C \|
	496	xAMPRx_V;
	497	} else {
	498	address = ULONG_MAX;
	499	ampr = 0;
	500	}
1da177e4 LT	501
	502	asm volatile("movgs %0,scr0\n"
	503	"movgs %0,scr1\n"
	504	"movgs %1,dampr4\n"
	505	"movgs %1,dampr5\n"
	506	:
	507	: "r"(address), "r"(ampr)
	508	);
	509	}
	510
	511	#ifdef CONFIG_PROC_FS
	512	extern char proc_pid_status_frv_cxnr(struct mm_struct mm, char *buffer);
	513	#endif
	514
	515	extern void __init pgtable_cache_init(void);
	516
	517	#endif /* !__ASSEMBLY__ */
	518	#endif /* !CONFIG_MMU */
	519
	520	#ifndef __ASSEMBLY__
	521	extern void __init paging_init(void);
	522	#endif /* !__ASSEMBLY__ */
	523
	524	#endif /* _ASM_PGTABLE_H */