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1da177e4 LT |
1 | #ifndef _ASM_M32R_CACHEFLUSH_H |
2 | #define _ASM_M32R_CACHEFLUSH_H | |
3 | ||
1da177e4 LT |
4 | #include <linux/mm.h> |
5 | ||
6 | extern void _flush_cache_all(void); | |
7 | extern void _flush_cache_copyback_all(void); | |
8 | ||
9287d95e | 9 | #if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104) |
1da177e4 LT |
10 | #define flush_cache_all() do { } while (0) |
11 | #define flush_cache_mm(mm) do { } while (0) | |
ec8c0446 | 12 | #define flush_cache_dup_mm(mm) do { } while (0) |
1da177e4 LT |
13 | #define flush_cache_range(vma, start, end) do { } while (0) |
14 | #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) | |
2d4dc890 | 15 | #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0 |
1da177e4 LT |
16 | #define flush_dcache_page(page) do { } while (0) |
17 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | |
18 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | |
19 | #ifndef CONFIG_SMP | |
20 | #define flush_icache_range(start, end) _flush_cache_copyback_all() | |
21 | #define flush_icache_page(vma,pg) _flush_cache_copyback_all() | |
22 | #define flush_icache_user_range(vma,pg,adr,len) _flush_cache_copyback_all() | |
23 | #define flush_cache_sigtramp(addr) _flush_cache_copyback_all() | |
24 | #else /* CONFIG_SMP */ | |
25 | extern void smp_flush_cache_all(void); | |
26 | #define flush_icache_range(start, end) smp_flush_cache_all() | |
27 | #define flush_icache_page(vma,pg) smp_flush_cache_all() | |
28 | #define flush_icache_user_range(vma,pg,adr,len) smp_flush_cache_all() | |
29 | #define flush_cache_sigtramp(addr) _flush_cache_copyback_all() | |
30 | #endif /* CONFIG_SMP */ | |
31 | #elif defined(CONFIG_CHIP_M32102) | |
32 | #define flush_cache_all() do { } while (0) | |
33 | #define flush_cache_mm(mm) do { } while (0) | |
ec8c0446 | 34 | #define flush_cache_dup_mm(mm) do { } while (0) |
1da177e4 LT |
35 | #define flush_cache_range(vma, start, end) do { } while (0) |
36 | #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) | |
2d4dc890 | 37 | #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0 |
1da177e4 LT |
38 | #define flush_dcache_page(page) do { } while (0) |
39 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | |
40 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | |
41 | #define flush_icache_range(start, end) _flush_cache_all() | |
42 | #define flush_icache_page(vma,pg) _flush_cache_all() | |
43 | #define flush_icache_user_range(vma,pg,adr,len) _flush_cache_all() | |
44 | #define flush_cache_sigtramp(addr) _flush_cache_all() | |
45 | #else | |
46 | #define flush_cache_all() do { } while (0) | |
47 | #define flush_cache_mm(mm) do { } while (0) | |
ec8c0446 | 48 | #define flush_cache_dup_mm(mm) do { } while (0) |
1da177e4 LT |
49 | #define flush_cache_range(vma, start, end) do { } while (0) |
50 | #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) | |
2d4dc890 | 51 | #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0 |
1da177e4 LT |
52 | #define flush_dcache_page(page) do { } while (0) |
53 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | |
54 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | |
55 | #define flush_icache_range(start, end) do { } while (0) | |
56 | #define flush_icache_page(vma,pg) do { } while (0) | |
57 | #define flush_icache_user_range(vma,pg,adr,len) do { } while (0) | |
58 | #define flush_cache_sigtramp(addr) do { } while (0) | |
59 | #endif /* CONFIG_CHIP_* */ | |
60 | ||
61 | #define flush_cache_vmap(start, end) do { } while (0) | |
62 | #define flush_cache_vunmap(start, end) do { } while (0) | |
63 | ||
64 | #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ | |
65 | do { \ | |
66 | memcpy(dst, src, len); \ | |
67 | flush_icache_user_range(vma, page, vaddr, len); \ | |
68 | } while (0) | |
69 | #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ | |
70 | memcpy(dst, src, len) | |
71 | ||
72 | #endif /* _ASM_M32R_CACHEFLUSH_H */ |