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Commit | Line | Data |
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0e152d80 GU |
1 | comment "Processor Type" |
2 | ||
ad8f955d GU |
3 | choice |
4 | prompt "CPU family support" | |
5 | default M68KCLASSIC if MMU | |
6 | default COLDFIRE if !MMU | |
7 | help | |
8 | The Freescale (was Motorola) M68K family of processors implements | |
9 | the full 68000 processor instruction set. | |
6b2aac42 | 10 | The Freescale ColdFire family of processors is a modern derivative |
ad8f955d GU |
11 | of the 68000 processor family. They are mainly targeted at embedded |
12 | applications, and are all System-On-Chip (SOC) devices, as opposed | |
13 | to stand alone CPUs. They implement a subset of the original 68000 | |
14 | processor instruction set. | |
15 | If you anticipate running this kernel on a computer with a classic | |
16 | MC68xxx processor, select M68KCLASSIC. | |
17 | If you anticipate running this kernel on a computer with a ColdFire | |
18 | processor, select COLDFIRE. | |
19 | ||
20 | config M68KCLASSIC | |
21 | bool "Classic M68K CPU family support" | |
22 | ||
23 | config COLDFIRE | |
24 | bool "Coldfire CPU family support" | |
7563bbf8 | 25 | select ARCH_HAVE_CUSTOM_GPIO_H |
ad8f955d GU |
26 | select CPU_HAS_NO_BITFIELDS |
27 | select CPU_HAS_NO_MULDIV64 | |
28 | select GENERIC_CSUM | |
e05f2e18 | 29 | select GPIOLIB |
e7d6582e | 30 | select HAVE_CLK |
ad8f955d GU |
31 | |
32 | endchoice | |
33 | ||
34 | if M68KCLASSIC | |
35 | ||
0e152d80 | 36 | config M68000 |
4674e8d3 | 37 | bool "MC68000" |
9da1a84a | 38 | depends on !MMU |
0e152d80 | 39 | select CPU_HAS_NO_BITFIELDS |
84f3fb7a | 40 | select CPU_HAS_NO_MULDIV64 |
9f1f1180 | 41 | select CPU_HAS_NO_UNALIGNED |
7f73bafc | 42 | select GENERIC_CSUM |
0e152d80 GU |
43 | help |
44 | The Freescale (was Motorola) 68000 CPU is the first generation of | |
45 | the well known M68K family of processors. The CPU core as well as | |
46 | being available as a stand alone CPU was also used in many | |
47 | System-On-Chip devices (eg 68328, 68302, etc). It does not contain | |
48 | a paging MMU. | |
49 | ||
50 | config MCPU32 | |
51 | bool | |
52 | select CPU_HAS_NO_BITFIELDS | |
7df0d27f | 53 | select CPU_HAS_NO_UNALIGNED |
0e152d80 GU |
54 | help |
55 | The Freescale (was then Motorola) CPU32 is a CPU core that is | |
56 | based on the 68020 processor. For the most part it is used in | |
57 | System-On-Chip parts, and does not contain a paging MMU. | |
58 | ||
0e152d80 GU |
59 | config M68020 |
60 | bool "68020 support" | |
61 | depends on MMU | |
e08d703c | 62 | select CPU_HAS_ADDRESS_SPACES |
0e152d80 GU |
63 | help |
64 | If you anticipate running this kernel on a computer with a MC68020 | |
65 | processor, say Y. Otherwise, say N. Note that the 68020 requires a | |
66 | 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the | |
67 | Sun 3, which provides its own version. | |
68 | ||
69 | config M68030 | |
70 | bool "68030 support" | |
71 | depends on MMU && !MMU_SUN3 | |
e08d703c | 72 | select CPU_HAS_ADDRESS_SPACES |
0e152d80 GU |
73 | help |
74 | If you anticipate running this kernel on a computer with a MC68030 | |
75 | processor, say Y. Otherwise, say N. Note that a MC68EC030 will not | |
76 | work, as it does not include an MMU (Memory Management Unit). | |
77 | ||
78 | config M68040 | |
79 | bool "68040 support" | |
80 | depends on MMU && !MMU_SUN3 | |
e08d703c | 81 | select CPU_HAS_ADDRESS_SPACES |
0e152d80 GU |
82 | help |
83 | If you anticipate running this kernel on a computer with a MC68LC040 | |
84 | or MC68040 processor, say Y. Otherwise, say N. Note that an | |
85 | MC68EC040 will not work, as it does not include an MMU (Memory | |
86 | Management Unit). | |
87 | ||
88 | config M68060 | |
89 | bool "68060 support" | |
90 | depends on MMU && !MMU_SUN3 | |
e08d703c | 91 | select CPU_HAS_ADDRESS_SPACES |
0e152d80 GU |
92 | help |
93 | If you anticipate running this kernel on a computer with a MC68060 | |
94 | processor, say Y. Otherwise, say N. | |
95 | ||
96 | config M68328 | |
97 | bool "MC68328" | |
98 | depends on !MMU | |
99 | select M68000 | |
100 | help | |
101 | Motorola 68328 processor support. | |
102 | ||
103 | config M68EZ328 | |
104 | bool "MC68EZ328" | |
105 | depends on !MMU | |
106 | select M68000 | |
107 | help | |
108 | Motorola 68EX328 processor support. | |
109 | ||
110 | config M68VZ328 | |
111 | bool "MC68VZ328" | |
112 | depends on !MMU | |
113 | select M68000 | |
114 | help | |
115 | Motorola 68VZ328 processor support. | |
116 | ||
ad8f955d GU |
117 | endif # M68KCLASSIC |
118 | ||
119 | if COLDFIRE | |
120 | ||
fa95a1dd GU |
121 | choice |
122 | prompt "ColdFire SoC type" | |
123 | default M520x | |
124 | help | |
125 | Select the type of ColdFire System-on-Chip (SoC) that you want | |
126 | to build for. | |
127 | ||
0e152d80 GU |
128 | config M5206 |
129 | bool "MCF5206" | |
130 | depends on !MMU | |
0e152d80 GU |
131 | select COLDFIRE_SW_A7 |
132 | select HAVE_MBAR | |
133 | help | |
134 | Motorola ColdFire 5206 processor support. | |
135 | ||
136 | config M5206e | |
137 | bool "MCF5206e" | |
138 | depends on !MMU | |
0e152d80 GU |
139 | select COLDFIRE_SW_A7 |
140 | select HAVE_MBAR | |
141 | help | |
142 | Motorola ColdFire 5206e processor support. | |
143 | ||
144 | config M520x | |
145 | bool "MCF520x" | |
146 | depends on !MMU | |
0e152d80 GU |
147 | select GENERIC_CLOCKEVENTS |
148 | select HAVE_CACHE_SPLIT | |
149 | help | |
150 | Freescale Coldfire 5207/5208 processor support. | |
151 | ||
152 | config M523x | |
153 | bool "MCF523x" | |
154 | depends on !MMU | |
0e152d80 GU |
155 | select GENERIC_CLOCKEVENTS |
156 | select HAVE_CACHE_SPLIT | |
157 | select HAVE_IPSBAR | |
158 | help | |
159 | Freescale Coldfire 5230/1/2/4/5 processor support | |
160 | ||
161 | config M5249 | |
162 | bool "MCF5249" | |
163 | depends on !MMU | |
0e152d80 GU |
164 | select COLDFIRE_SW_A7 |
165 | select HAVE_MBAR | |
166 | help | |
167 | Motorola ColdFire 5249 processor support. | |
168 | ||
04e037aa SK |
169 | config M525x |
170 | bool "MCF525x" | |
171 | depends on !MMU | |
172 | select COLDFIRE_SW_A7 | |
173 | select HAVE_MBAR | |
174 | help | |
175 | Freescale (Motorola) Coldfire 5251/5253 processor support. | |
176 | ||
0e152d80 GU |
177 | config M5271 |
178 | bool "MCF5271" | |
179 | depends on !MMU | |
0e152d80 GU |
180 | select M527x |
181 | select HAVE_CACHE_SPLIT | |
182 | select HAVE_IPSBAR | |
183 | select GENERIC_CLOCKEVENTS | |
184 | help | |
185 | Freescale (Motorola) ColdFire 5270/5271 processor support. | |
186 | ||
187 | config M5272 | |
188 | bool "MCF5272" | |
189 | depends on !MMU | |
0e152d80 GU |
190 | select COLDFIRE_SW_A7 |
191 | select HAVE_MBAR | |
192 | help | |
193 | Motorola ColdFire 5272 processor support. | |
194 | ||
195 | config M5275 | |
196 | bool "MCF5275" | |
197 | depends on !MMU | |
0e152d80 GU |
198 | select M527x |
199 | select HAVE_CACHE_SPLIT | |
200 | select HAVE_IPSBAR | |
201 | select GENERIC_CLOCKEVENTS | |
202 | help | |
203 | Freescale (Motorola) ColdFire 5274/5275 processor support. | |
204 | ||
205 | config M528x | |
206 | bool "MCF528x" | |
207 | depends on !MMU | |
0e152d80 GU |
208 | select GENERIC_CLOCKEVENTS |
209 | select HAVE_CACHE_SPLIT | |
210 | select HAVE_IPSBAR | |
211 | help | |
212 | Motorola ColdFire 5280/5282 processor support. | |
213 | ||
214 | config M5307 | |
215 | bool "MCF5307" | |
216 | depends on !MMU | |
0e152d80 GU |
217 | select COLDFIRE_SW_A7 |
218 | select HAVE_CACHE_CB | |
219 | select HAVE_MBAR | |
220 | help | |
221 | Motorola ColdFire 5307 processor support. | |
222 | ||
223 | config M532x | |
224 | bool "MCF532x" | |
225 | depends on !MMU | |
6eac4027 | 226 | select M53xx |
0e152d80 GU |
227 | select HAVE_CACHE_CB |
228 | help | |
229 | Freescale (Motorola) ColdFire 532x processor support. | |
230 | ||
e9d9dc6a GU |
231 | config M537x |
232 | bool "MCF537x" | |
233 | depends on !MMU | |
234 | select M53xx | |
235 | select HAVE_CACHE_CB | |
236 | help | |
237 | Freescale ColdFire 537x processor support. | |
238 | ||
0e152d80 GU |
239 | config M5407 |
240 | bool "MCF5407" | |
241 | depends on !MMU | |
0e152d80 GU |
242 | select COLDFIRE_SW_A7 |
243 | select HAVE_CACHE_CB | |
244 | select HAVE_MBAR | |
245 | help | |
246 | Motorola ColdFire 5407 processor support. | |
247 | ||
0e152d80 GU |
248 | config M547x |
249 | bool "MCF547x" | |
0e152d80 | 250 | select M54xx |
1f7034b9 | 251 | select MMU_COLDFIRE if MMU |
0e152d80 GU |
252 | select HAVE_CACHE_CB |
253 | select HAVE_MBAR | |
254 | help | |
255 | Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support. | |
256 | ||
257 | config M548x | |
258 | bool "MCF548x" | |
1f7034b9 | 259 | select MMU_COLDFIRE if MMU |
0e152d80 GU |
260 | select M54xx |
261 | select HAVE_CACHE_CB | |
262 | select HAVE_MBAR | |
263 | help | |
264 | Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support. | |
265 | ||
bea8bcb1 SK |
266 | config M5441x |
267 | bool "MCF5441x" | |
268 | depends on !MMU | |
269 | select GENERIC_CLOCKEVENTS | |
270 | select HAVE_CACHE_CB | |
271 | help | |
272 | Freescale Coldfire 54410/54415/54416/54417/54418 processor support. | |
273 | ||
fa95a1dd GU |
274 | endchoice |
275 | ||
276 | config M527x | |
277 | bool | |
278 | ||
279 | config M53xx | |
280 | bool | |
281 | ||
282 | config M54xx | |
283 | bool | |
284 | ||
ad8f955d GU |
285 | endif # COLDFIRE |
286 | ||
0e152d80 GU |
287 | |
288 | comment "Processor Specific Options" | |
289 | ||
290 | config M68KFPU_EMU | |
112f8b12 | 291 | bool "Math emulation support" |
0e152d80 | 292 | depends on MMU |
0e152d80 GU |
293 | help |
294 | At some point in the future, this will cause floating-point math | |
295 | instructions to be emulated by the kernel on machines that lack a | |
296 | floating-point math coprocessor. Thrill-seekers and chronically | |
297 | sleep-deprived psychotic hacker types can say Y now, everyone else | |
298 | should probably wait a while. | |
299 | ||
300 | config M68KFPU_EMU_EXTRAPREC | |
301 | bool "Math emulation extra precision" | |
302 | depends on M68KFPU_EMU | |
303 | help | |
304 | The fpu uses normally a few bit more during calculations for | |
305 | correct rounding, the emulator can (often) do the same but this | |
306 | extra calculation can cost quite some time, so you can disable | |
307 | it here. The emulator will then "only" calculate with a 64 bit | |
308 | mantissa and round slightly incorrect, what is more than enough | |
309 | for normal usage. | |
310 | ||
311 | config M68KFPU_EMU_ONLY | |
312 | bool "Math emulation only kernel" | |
313 | depends on M68KFPU_EMU | |
314 | help | |
315 | This option prevents any floating-point instructions from being | |
316 | compiled into the kernel, thereby the kernel doesn't save any | |
317 | floating point context anymore during task switches, so this | |
318 | kernel will only be usable on machines without a floating-point | |
319 | math coprocessor. This makes the kernel a bit faster as no tests | |
320 | needs to be executed whether a floating-point instruction in the | |
321 | kernel should be executed or not. | |
322 | ||
323 | config ADVANCED | |
324 | bool "Advanced configuration options" | |
325 | depends on MMU | |
326 | ---help--- | |
327 | This gives you access to some advanced options for the CPU. The | |
328 | defaults should be fine for most users, but these options may make | |
329 | it possible for you to improve performance somewhat if you know what | |
330 | you are doing. | |
331 | ||
332 | Note that the answer to this question won't directly affect the | |
333 | kernel: saying N will just cause the configurator to skip all | |
334 | the questions about these options. | |
335 | ||
336 | Most users should say N to this question. | |
337 | ||
338 | config RMW_INSNS | |
339 | bool "Use read-modify-write instructions" | |
340 | depends on ADVANCED | |
341 | ---help--- | |
342 | This allows to use certain instructions that work with indivisible | |
343 | read-modify-write bus cycles. While this is faster than the | |
344 | workaround of disabling interrupts, it can conflict with DMA | |
345 | ( = direct memory access) on many Amiga systems, and it is also said | |
346 | to destabilize other machines. It is very likely that this will | |
347 | cause serious problems on any Amiga or Atari Medusa if set. The only | |
348 | configuration where it should work are 68030-based Ataris, where it | |
349 | apparently improves performance. But you've been warned! Unless you | |
350 | really know what you are doing, say N. Try Y only if you're quite | |
351 | adventurous. | |
352 | ||
353 | config SINGLE_MEMORY_CHUNK | |
354 | bool "Use one physical chunk of memory only" if ADVANCED && !SUN3 | |
355 | depends on MMU | |
356 | default y if SUN3 | |
357 | select NEED_MULTIPLE_NODES | |
358 | help | |
359 | Ignore all but the first contiguous chunk of physical memory for VM | |
360 | purposes. This will save a few bytes kernel size and may speed up | |
361 | some operations. Say N if not sure. | |
362 | ||
363 | config ARCH_DISCONTIGMEM_ENABLE | |
364 | def_bool MMU && !SINGLE_MEMORY_CHUNK | |
365 | ||
366 | config 060_WRITETHROUGH | |
367 | bool "Use write-through caching for 68060 supervisor accesses" | |
368 | depends on ADVANCED && M68060 | |
369 | ---help--- | |
370 | The 68060 generally uses copyback caching of recently accessed data. | |
371 | Copyback caching means that memory writes will be held in an on-chip | |
372 | cache and only written back to memory some time later. Saying Y | |
373 | here will force supervisor (kernel) accesses to use writethrough | |
374 | caching. Writethrough caching means that data is written to memory | |
375 | straight away, so that cache and memory data always agree. | |
376 | Writethrough caching is less efficient, but is needed for some | |
377 | drivers on 68060 based systems where the 68060 bus snooping signal | |
378 | is hardwired on. The 53c710 SCSI driver is known to suffer from | |
379 | this problem. | |
380 | ||
381 | config M68K_L2_CACHE | |
382 | bool | |
383 | depends on MAC | |
384 | default y | |
385 | ||
386 | config NODES_SHIFT | |
387 | int | |
388 | default "3" | |
389 | depends on !SINGLE_MEMORY_CHUNK | |
390 | ||
022613e0 GU |
391 | config CPU_HAS_NO_BITFIELDS |
392 | bool | |
393 | ||
394 | config CPU_HAS_NO_MULDIV64 | |
395 | bool | |
396 | ||
9f1f1180 GU |
397 | config CPU_HAS_NO_UNALIGNED |
398 | bool | |
399 | ||
022613e0 GU |
400 | config CPU_HAS_ADDRESS_SPACES |
401 | bool | |
402 | ||
0e152d80 GU |
403 | config FPU |
404 | bool | |
405 | ||
406 | config COLDFIRE_SW_A7 | |
407 | bool | |
408 | ||
409 | config HAVE_CACHE_SPLIT | |
410 | bool | |
411 | ||
412 | config HAVE_CACHE_CB | |
413 | bool | |
414 | ||
415 | config HAVE_MBAR | |
416 | bool | |
417 | ||
418 | config HAVE_IPSBAR | |
419 | bool | |
420 | ||
0e152d80 GU |
421 | config CLOCK_FREQ |
422 | int "Set the core clock frequency" | |
15c2ca4e GU |
423 | default "25000000" if M5206 |
424 | default "54000000" if M5206e | |
425 | default "166666666" if M520x | |
426 | default "140000000" if M5249 | |
427 | default "150000000" if M527x || M523x | |
428 | default "90000000" if M5307 | |
429 | default "50000000" if M5407 | |
430 | default "266000000" if M54xx | |
0e152d80 | 431 | default "66666666" |
d9ee4896 | 432 | depends on COLDFIRE |
0e152d80 GU |
433 | help |
434 | Define the CPU clock frequency in use. This is the core clock | |
435 | frequency, it may or may not be the same as the external clock | |
436 | crystal fitted to your board. Some processors have an internal | |
437 | PLL and can have their frequency programmed at run time, others | |
438 | use internal dividers. In general the kernel won't setup a PLL | |
439 | if it is fitted (there are some exceptions). This value will be | |
440 | specific to the exact CPU that you are using. | |
441 | ||
442 | config OLDMASK | |
443 | bool "Old mask 5307 (1H55J) silicon" | |
444 | depends on M5307 | |
445 | help | |
446 | Build support for the older revision ColdFire 5307 silicon. | |
447 | Specifically this is the 1H55J mask revision. | |
448 | ||
449 | if HAVE_CACHE_SPLIT | |
450 | choice | |
451 | prompt "Split Cache Configuration" | |
452 | default CACHE_I | |
453 | ||
454 | config CACHE_I | |
455 | bool "Instruction" | |
456 | help | |
457 | Use all of the ColdFire CPU cache memory as an instruction cache. | |
458 | ||
459 | config CACHE_D | |
460 | bool "Data" | |
461 | help | |
462 | Use all of the ColdFire CPU cache memory as a data cache. | |
463 | ||
464 | config CACHE_BOTH | |
465 | bool "Both" | |
466 | help | |
467 | Split the ColdFire CPU cache, and use half as an instruction cache | |
468 | and half as a data cache. | |
469 | endchoice | |
470 | endif | |
471 | ||
472 | if HAVE_CACHE_CB | |
473 | choice | |
474 | prompt "Data cache mode" | |
475 | default CACHE_WRITETHRU | |
476 | ||
477 | config CACHE_WRITETHRU | |
478 | bool "Write-through" | |
479 | help | |
480 | The ColdFire CPU cache is set into Write-through mode. | |
481 | ||
482 | config CACHE_COPYBACK | |
483 | bool "Copy-back" | |
484 | help | |
485 | The ColdFire CPU cache is set into Copy-back mode. | |
486 | endchoice | |
487 | endif | |
488 |