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5b3b1688 DD |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Copyright (C) 2007 by Ralf Baechle | |
70a26a21 | 7 | * Copyright (C) 2009, 2012 Cavium, Inc. |
5b3b1688 DD |
8 | */ |
9 | #include <linux/clocksource.h> | |
cae39d13 | 10 | #include <linux/export.h> |
5b3b1688 | 11 | #include <linux/init.h> |
54954a6d | 12 | #include <linux/smp.h> |
5b3b1688 | 13 | |
54954a6d | 14 | #include <asm/cpu-info.h> |
5b3b1688 DD |
15 | #include <asm/time.h> |
16 | ||
17 | #include <asm/octeon/octeon.h> | |
18 | #include <asm/octeon/cvmx-ipd-defs.h> | |
54954a6d | 19 | #include <asm/octeon/cvmx-mio-defs.h> |
5b3b1688 | 20 | |
70a26a21 DD |
21 | |
22 | static u64 f; | |
23 | static u64 rdiv; | |
24 | static u64 sdiv; | |
25 | static u64 octeon_udelay_factor; | |
26 | static u64 octeon_ndelay_factor; | |
27 | ||
28 | void __init octeon_setup_delays(void) | |
29 | { | |
30 | octeon_udelay_factor = octeon_get_clock_rate() / 1000000; | |
31 | /* | |
32 | * For __ndelay we divide by 2^16, so the factor is multiplied | |
33 | * by the same amount. | |
34 | */ | |
35 | octeon_ndelay_factor = (octeon_udelay_factor * 0x10000ull) / 1000ull; | |
36 | ||
37 | preset_lpj = octeon_get_clock_rate() / HZ; | |
38 | ||
39 | if (current_cpu_type() == CPU_CAVIUM_OCTEON2) { | |
40 | union cvmx_mio_rst_boot rst_boot; | |
41 | rst_boot.u64 = cvmx_read_csr(CVMX_MIO_RST_BOOT); | |
42 | rdiv = rst_boot.s.c_mul; /* CPU clock */ | |
43 | sdiv = rst_boot.s.pnr_mul; /* I/O clock */ | |
44 | f = (0x8000000000000000ull / sdiv) * 2; | |
45 | } | |
46 | } | |
47 | ||
5b3b1688 DD |
48 | /* |
49 | * Set the current core's cvmcount counter to the value of the | |
50 | * IPD_CLK_COUNT. We do this on all cores as they are brought | |
51 | * on-line. This allows for a read from a local cpu register to | |
52 | * access a synchronized counter. | |
53 | * | |
54954a6d | 54 | * On CPU_CAVIUM_OCTEON2 the IPD_CLK_COUNT is scaled by rdiv/sdiv. |
5b3b1688 DD |
55 | */ |
56 | void octeon_init_cvmcount(void) | |
57 | { | |
58 | unsigned long flags; | |
59 | unsigned loops = 2; | |
60 | ||
61 | /* Clobber loops so GCC will not unroll the following while loop. */ | |
62 | asm("" : "+r" (loops)); | |
63 | ||
64 | local_irq_save(flags); | |
65 | /* | |
66 | * Loop several times so we are executing from the cache, | |
67 | * which should give more deterministic timing. | |
68 | */ | |
54954a6d DD |
69 | while (loops--) { |
70 | u64 ipd_clk_count = cvmx_read_csr(CVMX_IPD_CLK_COUNT); | |
71 | if (rdiv != 0) { | |
72 | ipd_clk_count *= rdiv; | |
73 | if (f != 0) { | |
74 | asm("dmultu\t%[cnt],%[f]\n\t" | |
75 | "mfhi\t%[cnt]" | |
70a26a21 DD |
76 | : [cnt] "+r" (ipd_clk_count) |
77 | : [f] "r" (f) | |
78 | : "hi", "lo"); | |
54954a6d DD |
79 | } |
80 | } | |
81 | write_c0_cvmcount(ipd_clk_count); | |
82 | } | |
5b3b1688 DD |
83 | local_irq_restore(flags); |
84 | } | |
85 | ||
d0ce9a5a | 86 | static cycle_t octeon_cvmcount_read(struct clocksource *cs) |
5b3b1688 DD |
87 | { |
88 | return read_c0_cvmcount(); | |
89 | } | |
90 | ||
91 | static struct clocksource clocksource_mips = { | |
92 | .name = "OCTEON_CVMCOUNT", | |
93 | .read = octeon_cvmcount_read, | |
94 | .mask = CLOCKSOURCE_MASK(64), | |
95 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | |
96 | }; | |
97 | ||
c6a3c851 DD |
98 | unsigned long long notrace sched_clock(void) |
99 | { | |
0e8a1d82 | 100 | /* 64-bit arithmatic can overflow, so use 128-bit. */ |
0e8a1d82 DD |
101 | u64 t1, t2, t3; |
102 | unsigned long long rv; | |
103 | u64 mult = clocksource_mips.mult; | |
104 | u64 shift = clocksource_mips.shift; | |
105 | u64 cnt = read_c0_cvmcount(); | |
106 | ||
107 | asm ( | |
108 | "dmultu\t%[cnt],%[mult]\n\t" | |
109 | "nor\t%[t1],$0,%[shift]\n\t" | |
110 | "mfhi\t%[t2]\n\t" | |
111 | "mflo\t%[t3]\n\t" | |
112 | "dsll\t%[t2],%[t2],1\n\t" | |
113 | "dsrlv\t%[rv],%[t3],%[shift]\n\t" | |
114 | "dsllv\t%[t1],%[t2],%[t1]\n\t" | |
115 | "or\t%[rv],%[t1],%[rv]\n\t" | |
116 | : [rv] "=&r" (rv), [t1] "=&r" (t1), [t2] "=&r" (t2), [t3] "=&r" (t3) | |
117 | : [cnt] "r" (cnt), [mult] "r" (mult), [shift] "r" (shift) | |
118 | : "hi", "lo"); | |
119 | return rv; | |
c6a3c851 DD |
120 | } |
121 | ||
5b3b1688 DD |
122 | void __init plat_time_init(void) |
123 | { | |
124 | clocksource_mips.rating = 300; | |
75c4fd8c | 125 | clocksource_register_hz(&clocksource_mips, octeon_get_clock_rate()); |
5b3b1688 | 126 | } |
ca148125 | 127 | |
ca148125 DD |
128 | void __udelay(unsigned long us) |
129 | { | |
130 | u64 cur, end, inc; | |
131 | ||
132 | cur = read_c0_cvmcount(); | |
133 | ||
134 | inc = us * octeon_udelay_factor; | |
135 | end = cur + inc; | |
136 | ||
137 | while (end > cur) | |
138 | cur = read_c0_cvmcount(); | |
139 | } | |
140 | EXPORT_SYMBOL(__udelay); | |
141 | ||
142 | void __ndelay(unsigned long ns) | |
143 | { | |
144 | u64 cur, end, inc; | |
145 | ||
146 | cur = read_c0_cvmcount(); | |
147 | ||
148 | inc = ((ns * octeon_ndelay_factor) >> 16); | |
149 | end = cur + inc; | |
150 | ||
151 | while (end > cur) | |
152 | cur = read_c0_cvmcount(); | |
153 | } | |
154 | EXPORT_SYMBOL(__ndelay); | |
155 | ||
156 | void __delay(unsigned long loops) | |
157 | { | |
158 | u64 cur, end; | |
159 | ||
160 | cur = read_c0_cvmcount(); | |
161 | end = cur + loops; | |
162 | ||
163 | while (end > cur) | |
164 | cur = read_c0_cvmcount(); | |
165 | } | |
166 | EXPORT_SYMBOL(__delay); | |
70a26a21 DD |
167 | |
168 | ||
169 | /** | |
170 | * octeon_io_clk_delay - wait for a given number of io clock cycles to pass. | |
171 | * | |
172 | * We scale the wait by the clock ratio, and then wait for the | |
173 | * corresponding number of core clocks. | |
174 | * | |
175 | * @count: The number of clocks to wait. | |
176 | */ | |
177 | void octeon_io_clk_delay(unsigned long count) | |
178 | { | |
179 | u64 cur, end; | |
180 | ||
181 | cur = read_c0_cvmcount(); | |
182 | if (rdiv != 0) { | |
183 | end = count * rdiv; | |
184 | if (f != 0) { | |
185 | asm("dmultu\t%[cnt],%[f]\n\t" | |
186 | "mfhi\t%[cnt]" | |
187 | : [cnt] "+r" (end) | |
188 | : [f] "r" (f) | |
189 | : "hi", "lo"); | |
190 | } | |
191 | end = cur + end; | |
192 | } else { | |
193 | end = cur + count; | |
194 | } | |
195 | while (end > cur) | |
196 | cur = read_c0_cvmcount(); | |
197 | } | |
198 | EXPORT_SYMBOL(octeon_io_clk_delay); |