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2874c5fd 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4
LT
2/*
3** SMP Support
4**
5** Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
6** Copyright (C) 1999 David Mosberger-Tang <davidm@hpl.hp.com>
7** Copyright (C) 2001,2004 Grant Grundler <grundler@parisc-linux.org>
8**
9** Lots of stuff stolen from arch/alpha/kernel/smp.c
10** ...and then parisc stole from arch/ia64/kernel/smp.c. Thanks David! :^)
11**
7022672e 12** Thanks to John Curry and Ullas Ponnadi. I learned a lot from their work.
1da177e4
LT
13** -grant (1/12/2001)
14**
1da177e4 15*/
1da177e4
LT
16#include <linux/types.h>
17#include <linux/spinlock.h>
1da177e4
LT
18
19#include <linux/kernel.h>
20#include <linux/module.h>
68e21be2 21#include <linux/sched/mm.h>
1da177e4
LT
22#include <linux/init.h>
23#include <linux/interrupt.h>
24#include <linux/smp.h>
25#include <linux/kernel_stat.h>
26#include <linux/mm.h>
4e950f6f 27#include <linux/err.h>
1da177e4
LT
28#include <linux/delay.h>
29#include <linux/bitops.h>
d75f054a 30#include <linux/ftrace.h>
ec2e0f98 31#include <linux/cpu.h>
1251b34e 32#include <linux/kgdb.h>
1da177e4 33
60063497 34#include <linux/atomic.h>
1da177e4
LT
35#include <asm/current.h>
36#include <asm/delay.h>
1b2425e3 37#include <asm/tlbflush.h>
1da177e4
LT
38
39#include <asm/io.h>
40#include <asm/irq.h> /* for CPU_IRQ_REGION and friends */
41#include <asm/mmu_context.h>
42#include <asm/page.h>
1da177e4
LT
43#include <asm/processor.h>
44#include <asm/ptrace.h>
45#include <asm/unistd.h>
46#include <asm/cacheflush.h>
47
5492a0f0
KM
48#undef DEBUG_SMP
49#ifdef DEBUG_SMP
50static int smp_debug_lvl = 0;
51#define smp_debug(lvl, printargs...) \
52 if (lvl >= smp_debug_lvl) \
53 printk(printargs);
54#else
ef017beb 55#define smp_debug(lvl, ...) do { } while(0)
5492a0f0 56#endif /* DEBUG_SMP */
1da177e4 57
1da177e4
LT
58volatile struct task_struct *smp_init_current_idle_task;
59
ef017beb 60/* track which CPU is booting */
60ffef06 61static volatile int cpu_now_booting;
1da177e4 62
60ffef06 63static int parisc_max_cpus = 1;
1da177e4 64
6ad6c424 65static DEFINE_PER_CPU(spinlock_t, ipi_lock);
1da177e4 66
1da177e4
LT
67enum ipi_message_type {
68 IPI_NOP=0,
69 IPI_RESCHEDULE=1,
70 IPI_CALL_FUNC,
71 IPI_CPU_START,
72 IPI_CPU_STOP,
1251b34e
SS
73 IPI_CPU_TEST,
74#ifdef CONFIG_KGDB
75 IPI_ENTER_KGDB,
76#endif
1da177e4
LT
77};
78
79
80/********** SMP inter processor interrupt and communication routines */
81
82#undef PER_CPU_IRQ_REGION
83#ifdef PER_CPU_IRQ_REGION
84/* XXX REVISIT Ignore for now.
85** *May* need this "hook" to register IPI handler
86** once we have perCPU ExtIntr switch tables.
87*/
88static void
89ipi_init(int cpuid)
90{
1da177e4
LT
91#error verify IRQ_OFFSET(IPI_IRQ) is ipi_interrupt() in new IRQ region
92
93 if(cpu_online(cpuid) )
94 {
95 switch_to_idle_task(current);
96 }
97
98 return;
99}
100#endif
101
102
103/*
104** Yoink this CPU from the runnable list...
105**
106*/
107static void
108halt_processor(void)
109{
1da177e4
LT
110 /* REVISIT : redirect I/O Interrupts to another CPU? */
111 /* REVISIT : does PM *know* this CPU isn't available? */
9bc181d8 112 set_cpu_online(smp_processor_id(), false);
1da177e4 113 local_irq_disable();
507efd63 114 __pdc_cpu_rendezvous();
1da177e4
LT
115 for (;;)
116 ;
1da177e4
LT
117}
118
119
d75f054a 120irqreturn_t __irq_entry
c7753f18 121ipi_interrupt(int irq, void *dev_id)
1da177e4
LT
122{
123 int this_cpu = smp_processor_id();
ef017beb 124 struct cpuinfo_parisc *p = &per_cpu(cpu_data, this_cpu);
1da177e4
LT
125 unsigned long ops;
126 unsigned long flags;
127
1da177e4 128 for (;;) {
3c97b5e9
KM
129 spinlock_t *lock = &per_cpu(ipi_lock, this_cpu);
130 spin_lock_irqsave(lock, flags);
1da177e4
LT
131 ops = p->pending_ipi;
132 p->pending_ipi = 0;
3c97b5e9 133 spin_unlock_irqrestore(lock, flags);
1da177e4
LT
134
135 mb(); /* Order bit clearing and data access. */
136
137 if (!ops)
138 break;
139
140 while (ops) {
141 unsigned long which = ffz(~ops);
142
d911aed8
JB
143 ops &= ~(1 << which);
144
1da177e4 145 switch (which) {
d911aed8 146 case IPI_NOP:
5492a0f0 147 smp_debug(100, KERN_DEBUG "CPU%d IPI_NOP\n", this_cpu);
d911aed8
JB
148 break;
149
1da177e4 150 case IPI_RESCHEDULE:
5492a0f0 151 smp_debug(100, KERN_DEBUG "CPU%d IPI_RESCHEDULE\n", this_cpu);
cd85d551 152 inc_irq_stat(irq_resched_count);
184748cc 153 scheduler_ipi();
1da177e4
LT
154 break;
155
156 case IPI_CALL_FUNC:
5492a0f0 157 smp_debug(100, KERN_DEBUG "CPU%d IPI_CALL_FUNC\n", this_cpu);
b102f29b 158 inc_irq_stat(irq_call_count);
dbcf4787
JA
159 generic_smp_call_function_interrupt();
160 break;
161
1da177e4 162 case IPI_CPU_START:
5492a0f0 163 smp_debug(100, KERN_DEBUG "CPU%d IPI_CPU_START\n", this_cpu);
1da177e4
LT
164 break;
165
166 case IPI_CPU_STOP:
5492a0f0 167 smp_debug(100, KERN_DEBUG "CPU%d IPI_CPU_STOP\n", this_cpu);
1da177e4 168 halt_processor();
1da177e4
LT
169 break;
170
171 case IPI_CPU_TEST:
5492a0f0 172 smp_debug(100, KERN_DEBUG "CPU%d is alive!\n", this_cpu);
1da177e4 173 break;
1251b34e
SS
174#ifdef CONFIG_KGDB
175 case IPI_ENTER_KGDB:
176 smp_debug(100, KERN_DEBUG "CPU%d ENTER_KGDB\n", this_cpu);
177 kgdb_nmicallback(raw_smp_processor_id(), get_irq_regs());
178 break;
179#endif
1da177e4
LT
180 default:
181 printk(KERN_CRIT "Unknown IPI num on CPU%d: %lu\n",
182 this_cpu, which);
1da177e4
LT
183 return IRQ_NONE;
184 } /* Switch */
f4d0d40c
HD
185
186 /* before doing more, let in any pending interrupts */
187 if (ops) {
188 local_irq_enable();
189 local_irq_disable();
190 }
1da177e4
LT
191 } /* while (ops) */
192 }
193 return IRQ_HANDLED;
194}
195
196
197static inline void
198ipi_send(int cpu, enum ipi_message_type op)
199{
ef017beb 200 struct cpuinfo_parisc *p = &per_cpu(cpu_data, cpu);
3c97b5e9 201 spinlock_t *lock = &per_cpu(ipi_lock, cpu);
1da177e4
LT
202 unsigned long flags;
203
3c97b5e9 204 spin_lock_irqsave(lock, flags);
1da177e4 205 p->pending_ipi |= 1 << op;
ef017beb 206 gsc_writel(IPI_IRQ - CPU_IRQ_BASE, p->hpa);
3c97b5e9 207 spin_unlock_irqrestore(lock, flags);
1da177e4
LT
208}
209
dbcf4787 210static void
91887a36 211send_IPI_mask(const struct cpumask *mask, enum ipi_message_type op)
dbcf4787
JA
212{
213 int cpu;
214
91887a36 215 for_each_cpu(cpu, mask)
dbcf4787
JA
216 ipi_send(cpu, op);
217}
1da177e4
LT
218
219static inline void
220send_IPI_single(int dest_cpu, enum ipi_message_type op)
221{
7f2347a4 222 BUG_ON(dest_cpu == NO_PROC_ID);
1da177e4
LT
223
224 ipi_send(dest_cpu, op);
225}
226
227static inline void
228send_IPI_allbutself(enum ipi_message_type op)
229{
230 int i;
231
394e3902
AM
232 for_each_online_cpu(i) {
233 if (i != smp_processor_id())
1da177e4
LT
234 send_IPI_single(i, op);
235 }
236}
237
1251b34e
SS
238#ifdef CONFIG_KGDB
239void kgdb_roundup_cpus(void)
240{
241 send_IPI_allbutself(IPI_ENTER_KGDB);
242}
243#endif
1da177e4
LT
244
245inline void
246smp_send_stop(void) { send_IPI_allbutself(IPI_CPU_STOP); }
247
1da177e4
LT
248void
249smp_send_reschedule(int cpu) { send_IPI_single(cpu, IPI_RESCHEDULE); }
250
d911aed8
JB
251void
252smp_send_all_nop(void)
253{
254 send_IPI_allbutself(IPI_NOP);
255}
256
91887a36 257void arch_send_call_function_ipi_mask(const struct cpumask *mask)
1da177e4 258{
dbcf4787 259 send_IPI_mask(mask, IPI_CALL_FUNC);
1da177e4
LT
260}
261
dbcf4787
JA
262void arch_send_call_function_single_ipi(int cpu)
263{
528d8eb2 264 send_IPI_single(cpu, IPI_CALL_FUNC);
dbcf4787 265}
1da177e4 266
1da177e4
LT
267/*
268 * Called by secondaries to update state and initialize CPU registers.
269 */
270static void __init
271smp_cpu_init(int cpunum)
272{
1da177e4 273 extern void init_IRQ(void); /* arch/parisc/kernel/irq.c */
56f335c8 274 extern void start_cpu_itimer(void); /* arch/parisc/kernel/time.c */
1da177e4
LT
275
276 /* Set modes and Enable floating point coprocessor */
a7e6601f 277 init_per_cpu(cpunum);
1da177e4
LT
278
279 disable_sr_hashing();
280
281 mb();
282
283 /* Well, support 2.4 linux scheme as well. */
7ec6118c 284 if (cpu_online(cpunum)) {
1da177e4
LT
285 extern void machine_halt(void); /* arch/parisc.../process.c */
286
287 printk(KERN_CRIT "CPU#%d already initialized!\n", cpunum);
288 machine_halt();
ec2e0f98
SB
289 }
290
291 notify_cpu_starting(cpunum);
292
9bc181d8 293 set_cpu_online(cpunum, true);
1da177e4
LT
294
295 /* Initialise the idle task for this CPU */
f1f10076 296 mmgrab(&init_mm);
1da177e4 297 current->active_mm = &init_mm;
7f2347a4 298 BUG_ON(current->mm);
1da177e4
LT
299 enter_lazy_tlb(&init_mm, current);
300
7022672e 301 init_IRQ(); /* make sure no IRQs are enabled or pending */
56f335c8 302 start_cpu_itimer();
1da177e4
LT
303}
304
305
306/*
307 * Slaves start using C here. Indirectly called from smp_slave_stext.
308 * Do what start_kernel() and main() do for boot strap processor (aka monarch)
309 */
0ed1fe4a 310void __init smp_callin(unsigned long pdce_proc)
1da177e4
LT
311{
312 int slave_id = cpu_now_booting;
1da177e4 313
0ed1fe4a
HD
314#ifdef CONFIG_64BIT
315 WARN_ON(((unsigned long)(PAGE0->mem_pdc_hi) << 32
316 | PAGE0->mem_pdc) != pdce_proc);
317#endif
318
1da177e4
LT
319 smp_cpu_init(slave_id);
320
1da177e4 321 flush_cache_all_local(); /* start with known state */
1b2425e3 322 flush_tlb_all_local(NULL);
1da177e4
LT
323
324 local_irq_enable(); /* Interrupts have been off until now */
325
fc6d73d6 326 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
1da177e4
LT
327
328 /* NOTREACHED */
329 panic("smp_callin() AAAAaaaaahhhh....\n");
330}
331
332/*
333 * Bring one cpu online.
334 */
60ffef06 335int smp_boot_one_cpu(int cpuid, struct task_struct *idle)
1da177e4 336{
ef017beb 337 const struct cpuinfo_parisc *p = &per_cpu(cpu_data, cpuid);
1da177e4
LT
338 long timeout;
339
40f1f0de 340 task_thread_info(idle)->cpu = cpuid;
1da177e4
LT
341
342 /* Let _start know what logical CPU we're booting
343 ** (offset into init_tasks[],cpu_data[])
344 */
345 cpu_now_booting = cpuid;
346
347 /*
348 ** boot strap code needs to know the task address since
349 ** it also contains the process stack.
350 */
351 smp_init_current_idle_task = idle ;
352 mb();
353
ef017beb 354 printk(KERN_INFO "Releasing cpu %d now, hpa=%lx\n", cpuid, p->hpa);
1da177e4
LT
355
356 /*
357 ** This gets PDC to release the CPU from a very tight loop.
358 **
359 ** From the PA-RISC 2.0 Firmware Architecture Reference Specification:
360 ** "The MEM_RENDEZ vector specifies the location of OS_RENDEZ which
361 ** is executed after receiving the rendezvous signal (an interrupt to
362 ** EIR{0}). MEM_RENDEZ is valid only when it is nonzero and the
363 ** contents of memory are valid."
364 */
ef017beb 365 gsc_writel(TIMER_IRQ - CPU_IRQ_BASE, p->hpa);
1da177e4
LT
366 mb();
367
368 /*
369 * OK, wait a bit for that CPU to finish staggering about.
370 * Slave will set a bit when it reaches smp_cpu_init().
371 * Once the "monarch CPU" sees the bit change, it can move on.
372 */
373 for (timeout = 0; timeout < 10000; timeout++) {
374 if(cpu_online(cpuid)) {
375 /* Which implies Slave has started up */
376 cpu_now_booting = 0;
377 smp_init_current_idle_task = NULL;
378 goto alive ;
379 }
380 udelay(100);
381 barrier();
382 }
1da177e4
LT
383 printk(KERN_CRIT "SMP: CPU:%d is stuck.\n", cpuid);
384 return -1;
385
386alive:
387 /* Remember the Slave data */
5492a0f0 388 smp_debug(100, KERN_DEBUG "SMP: CPU:%d came alive after %ld _us\n",
1da177e4 389 cpuid, timeout * 100);
1da177e4
LT
390 return 0;
391}
392
ef017beb 393void __init smp_prepare_boot_cpu(void)
1da177e4 394{
ef017beb 395 int bootstrap_processor = per_cpu(cpu_data, 0).cpuid;
1da177e4 396
1da177e4 397 /* Setup BSP mappings */
ef017beb 398 printk(KERN_INFO "SMP: bootstrap CPU ID is %d\n", bootstrap_processor);
1da177e4 399
9bc181d8
RR
400 set_cpu_online(bootstrap_processor, true);
401 set_cpu_present(bootstrap_processor, true);
1da177e4
LT
402}
403
404
405
406/*
407** inventory.c:do_inventory() hasn't yet been run and thus we
7022672e 408** don't 'discover' the additional CPUs until later.
1da177e4
LT
409*/
410void __init smp_prepare_cpus(unsigned int max_cpus)
411{
6ad6c424
TG
412 int cpu;
413
414 for_each_possible_cpu(cpu)
415 spin_lock_init(&per_cpu(ipi_lock, cpu));
416
9bc181d8 417 init_cpu_present(cpumask_of(0));
1da177e4
LT
418
419 parisc_max_cpus = max_cpus;
420 if (!max_cpus)
421 printk(KERN_INFO "SMP mode deactivated.\n");
422}
423
424
425void smp_cpus_done(unsigned int cpu_max)
426{
427 return;
428}
429
430
60ffef06 431int __cpu_up(unsigned int cpu, struct task_struct *tidle)
1da177e4 432{
5baf919d
HD
433 if (cpu != 0 && cpu < parisc_max_cpus && smp_boot_one_cpu(cpu, tidle))
434 return -ENOSYS;
1da177e4
LT
435
436 return cpu_online(cpu) ? 0 : -ENOSYS;
437}
438
1da177e4 439#ifdef CONFIG_PROC_FS
01f56832 440int setup_profiling_timer(unsigned int multiplier)
1da177e4
LT
441{
442 return -EINVAL;
443}
444#endif