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9b6b563c PM |
1 | /* |
2 | * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation | |
3 | * Rewrite, cleanup: | |
91f14480 | 4 | * Copyright (C) 2004 Olof Johansson <olof@lixom.net>, IBM Corporation |
9b6b563c PM |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | */ | |
20 | ||
21 | #ifndef _ASM_IOMMU_H | |
22 | #define _ASM_IOMMU_H | |
88ced031 | 23 | #ifdef __KERNEL__ |
9b6b563c | 24 | |
5d2efba6 | 25 | #include <linux/compiler.h> |
9b6b563c PM |
26 | #include <linux/spinlock.h> |
27 | #include <linux/device.h> | |
28 | #include <linux/dma-mapping.h> | |
1977f032 | 29 | #include <linux/bitops.h> |
7e11580b | 30 | #include <asm/machdep.h> |
5d2efba6 | 31 | #include <asm/types.h> |
5d2efba6 | 32 | |
e589a440 AP |
33 | #define IOMMU_PAGE_SHIFT_4K 12 |
34 | #define IOMMU_PAGE_SIZE_4K (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K) | |
35 | #define IOMMU_PAGE_MASK_4K (~((1 << IOMMU_PAGE_SHIFT_4K) - 1)) | |
36 | #define IOMMU_PAGE_ALIGN_4K(addr) _ALIGN_UP(addr, IOMMU_PAGE_SIZE_4K) | |
5d2efba6 | 37 | |
165785e5 JK |
38 | /* Boot time flags */ |
39 | extern int iommu_is_off; | |
40 | extern int iommu_force_on; | |
5d2efba6 LV |
41 | |
42 | /* Pure 2^n version of get_order */ | |
43 | static __inline__ __attribute_const__ int get_iommu_order(unsigned long size) | |
44 | { | |
e589a440 | 45 | return __ilog2((size - 1) >> IOMMU_PAGE_SHIFT_4K) + 1; |
5d2efba6 LV |
46 | } |
47 | ||
9b6b563c PM |
48 | |
49 | /* | |
50 | * IOMAP_MAX_ORDER defines the largest contiguous block | |
51 | * of dma space we can get. IOMAP_MAX_ORDER = 13 | |
52 | * allows up to 2**12 pages (4096 * 4096) = 16 MB | |
53 | */ | |
5d2efba6 | 54 | #define IOMAP_MAX_ORDER 13 |
9b6b563c | 55 | |
b4c3a872 AB |
56 | #define IOMMU_POOL_HASHBITS 2 |
57 | #define IOMMU_NR_POOLS (1 << IOMMU_POOL_HASHBITS) | |
58 | ||
59 | struct iommu_pool { | |
60 | unsigned long start; | |
61 | unsigned long end; | |
62 | unsigned long hint; | |
63 | spinlock_t lock; | |
64 | } ____cacheline_aligned_in_smp; | |
65 | ||
9b6b563c PM |
66 | struct iommu_table { |
67 | unsigned long it_busno; /* Bus number this table belongs to */ | |
68 | unsigned long it_size; /* Size of iommu table in entries */ | |
69 | unsigned long it_offset; /* Offset into global table */ | |
70 | unsigned long it_base; /* mapped address of tce table */ | |
71 | unsigned long it_index; /* which iommu table this is */ | |
72 | unsigned long it_type; /* type: PCI or Virtual Bus */ | |
73 | unsigned long it_blocksize; /* Entries in each block (cacheline) */ | |
b4c3a872 AB |
74 | unsigned long poolsize; |
75 | unsigned long nr_pools; | |
76 | struct iommu_pool large_pool; | |
77 | struct iommu_pool pools[IOMMU_NR_POOLS]; | |
9b6b563c | 78 | unsigned long *it_map; /* A simple allocation bitmap for now */ |
3a553170 | 79 | unsigned long it_page_shift;/* table iommu page size */ |
4e13c1ac AK |
80 | #ifdef CONFIG_IOMMU_API |
81 | struct iommu_group *it_group; | |
82 | #endif | |
9b6b563c PM |
83 | }; |
84 | ||
85 | struct scatterlist; | |
9b6b563c | 86 | |
738ef42e BB |
87 | static inline void set_iommu_table_base(struct device *dev, void *base) |
88 | { | |
89 | dev->archdata.dma_data.iommu_table_base = base; | |
90 | } | |
91 | ||
92 | static inline void *get_iommu_table_base(struct device *dev) | |
93 | { | |
94 | return dev->archdata.dma_data.iommu_table_base; | |
95 | } | |
96 | ||
9b6b563c | 97 | /* Frees table for an individual device node */ |
68d315f5 | 98 | extern void iommu_free_table(struct iommu_table *tbl, const char *node_name); |
9b6b563c | 99 | |
9b6b563c PM |
100 | /* Initializes an iommu_table based in values set in the passed-in |
101 | * structure | |
102 | */ | |
ca1588e7 AB |
103 | extern struct iommu_table *iommu_init_table(struct iommu_table * tbl, |
104 | int nid); | |
d905c5df | 105 | #ifdef CONFIG_IOMMU_API |
4e13c1ac AK |
106 | extern void iommu_register_group(struct iommu_table *tbl, |
107 | int pci_domain_number, unsigned long pe_num); | |
d905c5df AK |
108 | extern int iommu_add_device(struct device *dev); |
109 | extern void iommu_del_device(struct device *dev); | |
110 | #else | |
111 | static inline void iommu_register_group(struct iommu_table *tbl, | |
112 | int pci_domain_number, | |
113 | unsigned long pe_num) | |
114 | { | |
115 | } | |
116 | ||
117 | static inline int iommu_add_device(struct device *dev) | |
118 | { | |
119 | return 0; | |
120 | } | |
121 | ||
122 | static inline void iommu_del_device(struct device *dev) | |
123 | { | |
124 | } | |
125 | #endif /* !CONFIG_IOMMU_API */ | |
126 | ||
127 | static inline void set_iommu_table_base_and_group(struct device *dev, | |
128 | void *base) | |
129 | { | |
130 | set_iommu_table_base(dev, base); | |
131 | iommu_add_device(dev); | |
132 | } | |
9b6b563c | 133 | |
c8692362 MN |
134 | extern int iommu_map_sg(struct device *dev, struct iommu_table *tbl, |
135 | struct scatterlist *sglist, int nelems, | |
3affedc4 MN |
136 | unsigned long mask, enum dma_data_direction direction, |
137 | struct dma_attrs *attrs); | |
9b6b563c | 138 | extern void iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist, |
3affedc4 MN |
139 | int nelems, enum dma_data_direction direction, |
140 | struct dma_attrs *attrs); | |
9b6b563c | 141 | |
fb3475e9 FT |
142 | extern void *iommu_alloc_coherent(struct device *dev, struct iommu_table *tbl, |
143 | size_t size, dma_addr_t *dma_handle, | |
144 | unsigned long mask, gfp_t flag, int node); | |
9b6b563c | 145 | extern void iommu_free_coherent(struct iommu_table *tbl, size_t size, |
12d04eef | 146 | void *vaddr, dma_addr_t dma_handle); |
f9226d57 MN |
147 | extern dma_addr_t iommu_map_page(struct device *dev, struct iommu_table *tbl, |
148 | struct page *page, unsigned long offset, | |
149 | size_t size, unsigned long mask, | |
150 | enum dma_data_direction direction, | |
151 | struct dma_attrs *attrs); | |
152 | extern void iommu_unmap_page(struct iommu_table *tbl, dma_addr_t dma_handle, | |
153 | size_t size, enum dma_data_direction direction, | |
154 | struct dma_attrs *attrs); | |
9b6b563c PM |
155 | |
156 | extern void iommu_init_early_pSeries(void); | |
1beb6a7d | 157 | extern void iommu_init_early_dart(void); |
31c56d82 | 158 | extern void iommu_init_early_pasemi(void); |
9b6b563c | 159 | |
1beb6a7d | 160 | extern void alloc_dart_table(void); |
7e11580b JB |
161 | #if defined(CONFIG_PPC64) && defined(CONFIG_PM) |
162 | static inline void iommu_save(void) | |
163 | { | |
164 | if (ppc_md.iommu_save) | |
165 | ppc_md.iommu_save(); | |
166 | } | |
167 | ||
168 | static inline void iommu_restore(void) | |
169 | { | |
170 | if (ppc_md.iommu_restore) | |
171 | ppc_md.iommu_restore(); | |
172 | } | |
173 | #endif | |
9b6b563c | 174 | |
4e13c1ac AK |
175 | /* The API to support IOMMU operations for VFIO */ |
176 | extern int iommu_tce_clear_param_check(struct iommu_table *tbl, | |
177 | unsigned long ioba, unsigned long tce_value, | |
178 | unsigned long npages); | |
179 | extern int iommu_tce_put_param_check(struct iommu_table *tbl, | |
180 | unsigned long ioba, unsigned long tce); | |
181 | extern int iommu_tce_build(struct iommu_table *tbl, unsigned long entry, | |
182 | unsigned long hwaddr, enum dma_data_direction direction); | |
183 | extern unsigned long iommu_clear_tce(struct iommu_table *tbl, | |
184 | unsigned long entry); | |
185 | extern int iommu_clear_tces_and_put_pages(struct iommu_table *tbl, | |
186 | unsigned long entry, unsigned long pages); | |
187 | extern int iommu_put_tce_user_mode(struct iommu_table *tbl, | |
188 | unsigned long entry, unsigned long tce); | |
189 | ||
190 | extern void iommu_flush_tce(struct iommu_table *tbl); | |
191 | extern int iommu_take_ownership(struct iommu_table *tbl); | |
192 | extern void iommu_release_ownership(struct iommu_table *tbl); | |
193 | ||
194 | extern enum dma_data_direction iommu_tce_direction(unsigned long tce); | |
195 | ||
88ced031 | 196 | #endif /* __KERNEL__ */ |
9b6b563c | 197 | #endif /* _ASM_IOMMU_H */ |