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b2441318 1# SPDX-License-Identifier: GPL-2.0
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2config CPM1
3 bool
c374e00e 4 select CPM
df34403d 5
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6choice
7 prompt "8xx Machine Type"
c8a55f3d 8 depends on PPC_8xx
df34403d 9 default MPC885ADS
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10
11config MPC8XXFADS
12 bool "FADS"
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13
14config MPC86XADS
15 bool "MPC86XADS"
df34403d 16 select CPM1
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17 help
18 MPC86x Application Development System by Freescale Semiconductor.
19 The MPC86xADS is meant to serve as a platform for s/w and h/w
20 development around the MPC86X processor families.
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21
22config MPC885ADS
23 bool "MPC885ADS"
df34403d 24 select CPM1
0f22dd39 25 select OF_DYNAMIC
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26 help
27 Freescale Semiconductor MPC885 Application Development System (ADS).
28 Also known as DUET.
29 The MPC885ADS is meant to serve as a platform for s/w and h/w
30 development around the MPC885 processor family.
31
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32config PPC_EP88XC
33 bool "Embedded Planet EP88xC (a.k.a. CWH-PPC-885XN-VE)"
34 select CPM1
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35 help
36 This enables support for the Embedded Planet EP88xC board.
37
38 This board is also resold by Freescale as the QUICCStart
39 MPC885 Evaluation System and/or the CWH-PPC-885XN-VE.
40
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41config PPC_ADDER875
42 bool "Analogue & Micro Adder 875"
43 select CPM1
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44 help
45 This enables support for the Analogue & Micro Adder 875
46 board.
47
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48config TQM8XX
49 bool "TQM8XX"
50 select CPM1
51 help
52 support for the mpc8xx based boards from TQM.
53
df34403d 54endchoice
14cf11af 55
df34403d 56menu "Freescale Ethernet driver platform-specific options"
c8a55f3d 57 depends on (FS_ENET && MPC885ADS)
14cf11af 58
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59 config MPC8xx_SECOND_ETH
60 bool "Second Ethernet channel"
61 depends on MPC885ADS
62 default y
63 help
64 This enables support for second Ethernet on MPC885ADS and MPC86xADS boards.
65 The latter will use SCC1, for 885ADS you can select it below.
66
67 choice
68 prompt "Second Ethernet channel"
69 depends on MPC8xx_SECOND_ETH
70 default MPC8xx_SECOND_ETH_FEC2
71
72 config MPC8xx_SECOND_ETH_FEC2
73 bool "FEC2"
74 depends on MPC885ADS
75 help
76 Enable FEC2 to serve as 2-nd Ethernet channel. Note that SMC2
77 (often 2-nd UART) will not work if this is enabled.
78
79 config MPC8xx_SECOND_ETH_SCC3
80 bool "SCC3"
81 depends on MPC885ADS
82 help
83 Enable SCC3 to serve as 2-nd Ethernet channel. Note that SMC1
84 (often 1-nd UART) will not work if this is enabled.
85
86 endchoice
14cf11af 87
df34403d 88endmenu
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89
90#
91# MPC8xx Communication options
92#
93
94menu "MPC8xx CPM Options"
ab2675d6 95 depends on PPC_8xx
14cf11af 96
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97# This doesn't really belong here, but it is convenient to ask
98# 8xx specific questions.
99comment "Generic MPC8xx Options"
100
101config 8xx_COPYBACK
102 bool "Copy-Back Data Cache (else Writethrough)"
103 help
104 Saying Y here will cause the cache on an MPC8xx processor to be used
105 in Copy-Back mode. If you say N here, it is used in Writethrough
106 mode.
107
108 If in doubt, say Y here.
109
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110config 8xx_GPIO
111 bool "GPIO API Support"
86c55af4 112 select GPIOLIB
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113 help
114 Saying Y here will cause the ports on an MPC8xx processor to be used
115 with the GPIO API. If you say N here, the kernel needs less memory.
116
117 If in doubt, say Y here.
118
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119config 8xx_CPU6
120 bool "CPU6 Silicon Errata (860 Pre Rev. C)"
121 help
122 MPC860 CPUs, prior to Rev C have some bugs in the silicon, which
123 require workarounds for Linux (and most other OSes to work). If you
124 get a BUG() very early in boot, this might fix the problem. For
125 more details read the document entitled "MPC860 Family Device Errata
c8a55f3d 126 Reference" on Freescale's website. This option also incurs a
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127 performance hit.
128
129 If in doubt, say N here.
130
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131config 8xx_CPU15
132 bool "CPU15 Silicon Errata"
4b914286 133 depends on !HUGETLB_PAGE
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134 default y
135 help
136 This enables a workaround for erratum CPU15 on MPC8xx chips.
137 This bug can cause incorrect code execution under certain
138 circumstances. This workaround adds some overhead (a TLB miss
139 every time execution crosses a page boundary), and you may wish
140 to disable it if you have worked around the bug in the compiler
141 (by not placing conditional branches or branches to LR or CTR
142 in the last word of a page, with a target of the last cache
143 line in the next page), or if you have used some other
144 workaround.
145
146 If in doubt, say Y here.
147
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148choice
149 prompt "Microcode patch selection"
150 default NO_UCODE_PATCH
151 help
152 Help not implemented yet, coming soon.
153
154config NO_UCODE_PATCH
155 bool "None"
156
157config USB_SOF_UCODE_PATCH
158 bool "USB SOF patch"
159 help
160 Help not implemented yet, coming soon.
161
162config I2C_SPI_UCODE_PATCH
163 bool "I2C/SPI relocation patch"
164 help
165 Help not implemented yet, coming soon.
166
167config I2C_SPI_SMC1_UCODE_PATCH
168 bool "I2C/SPI/SMC1 relocation patch"
169 help
170 Help not implemented yet, coming soon.
171
172endchoice
173
174config UCODE_PATCH
175 bool
176 default y
177 depends on !NO_UCODE_PATCH
178
179endmenu