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Merge branch 'x86/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux...
[mirror_ubuntu-artful-kernel.git] / arch / ppc / platforms / prpmc800.c
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1da177e4 1/*
1da177e4
LT		 2 * Author: Dale Farnsworth <dale.farnsworth@mvista.com>
3 *
4 * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
5 * the terms of the GNU General Public License version 2. This program
6 * is licensed "as is" without any warranty of any kind, whether express
7 * or implied.
8 */
9
1da177e4
LT		 10#include <linux/stddef.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/errno.h>
14#include <linux/reboot.h>
15#include <linux/pci.h>
16#include <linux/kdev_t.h>
17#include <linux/types.h>
18#include <linux/major.h>
19#include <linux/initrd.h>
20#include <linux/console.h>
21#include <linux/delay.h>
1da177e4 22#include <linux/seq_file.h>
1da177e4
LT		 23#include <linux/root_dev.h>
24#include <linux/harrier_defs.h>
25
26#include <asm/byteorder.h>
27#include <asm/system.h>
28#include <asm/pgtable.h>
29#include <asm/page.h>
30#include <asm/dma.h>
31#include <asm/io.h>
32#include <asm/irq.h>
33#include <asm/machdep.h>
34#include <asm/time.h>
35#include <asm/pci-bridge.h>
36#include <asm/open_pic.h>
37#include <asm/bootinfo.h>
38#include <asm/harrier.h>
39
40#include "prpmc800.h"
41
42#define HARRIER_REVI_REG (PRPMC800_HARRIER_XCSR_BASE+HARRIER_REVI_OFF)
43#define HARRIER_UCTL_REG (PRPMC800_HARRIER_XCSR_BASE+HARRIER_UCTL_OFF)
44#define HARRIER_MISC_CSR_REG (PRPMC800_HARRIER_XCSR_BASE+HARRIER_MISC_CSR_OFF)
45#define HARRIER_IFEVP_REG (PRPMC800_HARRIER_MPIC_BASE+HARRIER_MPIC_IFEVP_OFF)
46#define HARRIER_IFEDE_REG (PRPMC800_HARRIER_MPIC_BASE+HARRIER_MPIC_IFEDE_OFF)
47#define HARRIER_FEEN_REG (PRPMC800_HARRIER_XCSR_BASE+HARRIER_FEEN_OFF)
48#define HARRIER_FEMA_REG (PRPMC800_HARRIER_XCSR_BASE+HARRIER_FEMA_OFF)
49
50#define HARRIER_VENI_REG (PRPMC800_HARRIER_XCSR_BASE + HARRIER_VENI_OFF)
51#define HARRIER_MISC_CSR (PRPMC800_HARRIER_XCSR_BASE + \
52 HARRIER_MISC_CSR_OFF)
53
54#define MONARCH (monarch != 0)
55#define NON_MONARCH (monarch == 0)
56
57extern int mpic_init(void);
58extern unsigned long loops_per_jiffy;
59extern void gen550_progress(char *, unsigned short);
60
61static int monarch = 0;
62static int found_self = 0;
63static int self = 0;
64
65static u_char prpmc800_openpic_initsenses[] __initdata =
66{
67 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_HOSTINT0 */
68 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_UNUSED */
69 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_DEBUGINT */
70 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_HARRIER_WDT */
71 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_UNUSED */
72 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_UNUSED */
73 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_HOSTINT1 */
74 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_HOSTINT2 */
75 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_HOSTINT3 */
76 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_PMC_INTA */
77 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_PMC_INTB */
78 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_PMC_INTC */
79 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_PMC_INTD */
80 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_UNUSED */
81 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_UNUSED */
82 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_UNUSED */
83 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_HARRIER_INT (UARTS, ABORT, DMA) */
84};
85
86/*
87 * Motorola PrPMC750/PrPMC800 in PrPMCBASE or PrPMC-Carrier
88 * Combined irq tables. Only Base has IDSEL 14, only Carrier has 21 and 22.
89 */
90static inline int
91prpmc_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
92{
93 static char pci_irq_table[][4] =
94 /*
95 * PCI IDSEL/INTPIN->INTLINE
96 * A B C D
97 */
98 {
99 {12, 0, 0, 0}, /* IDSEL 14 - Ethernet, base */
100 {0, 0, 0, 0}, /* IDSEL 15 - unused */
101 {10, 11, 12, 9}, /* IDSEL 16 - PMC A1, PMC1 */
102 {10, 11, 12, 9}, /* IDSEL 17 - PrPMC-A-B, PMC2-B */
103 {11, 12, 9, 10}, /* IDSEL 18 - PMC A1-B, PMC1-B */
104 {0, 0, 0, 0}, /* IDSEL 19 - unused */
105 {9, 10, 11, 12}, /* IDSEL 20 - P2P Bridge */
106 {11, 12, 9, 10}, /* IDSEL 21 - PMC A2, carrier */
107 {12, 9, 10, 11}, /* IDSEL 22 - PMC A2-B, carrier */
108 };
109 const long min_idsel = 14, max_idsel = 22, irqs_per_slot = 4;
110 return PCI_IRQ_TABLE_LOOKUP;
111};
112
113static int
114prpmc_read_config_dword(struct pci_controller *hose, u8 bus, u8 devfn,
115 int offset, u32 * val)
116{
117 /* paranoia */
118 if ((hose == NULL) ||
119 (hose->cfg_addr == NULL) || (hose->cfg_data == NULL))
120 return PCIBIOS_DEVICE_NOT_FOUND;
121
122 out_be32(hose->cfg_addr, ((offset & 0xfc) << 24) | (devfn << 16)
123 | ((bus - hose->bus_offset) << 8) | 0x80);
124 *val = in_le32((u32 *) (hose->cfg_data + (offset & 3)));
125
126 return PCIBIOS_SUCCESSFUL;
127}
128
129#define HARRIER_PCI_VEND_DEV_ID (PCI_VENDOR_ID_MOTOROLA | \
130 (PCI_DEVICE_ID_MOTOROLA_HARRIER << 16))
131static int prpmc_self(u8 bus, u8 devfn)
132{
133 /*
134 * Harriers always view themselves as being on bus 0. If we're not
135 * looking at bus 0, we're not going to find ourselves.
136 */
137 if (bus != 0)
138 return PCIBIOS_DEVICE_NOT_FOUND;
139 else {
140 int result;
141 int val;
142 struct pci_controller *hose;
143
144 hose = pci_bus_to_hose(bus);
145
146 /* See if target device is a Harrier */
147 result = prpmc_read_config_dword(hose, bus, devfn,
148 PCI_VENDOR_ID, &val);
149 if ((result != PCIBIOS_SUCCESSFUL) ||
150 (val != HARRIER_PCI_VEND_DEV_ID))
151 return PCIBIOS_DEVICE_NOT_FOUND;
152
153 /*
154 * LBA bit is set if target Harrier == initiating Harrier
155 * (i.e. if we are reading our own PCI header).
156 */
157 result = prpmc_read_config_dword(hose, bus, devfn,
158 HARRIER_LBA_OFF, &val);
159 if ((result != PCIBIOS_SUCCESSFUL) ||
160 ((val & HARRIER_LBA_MSK) != HARRIER_LBA_MSK))
161 return PCIBIOS_DEVICE_NOT_FOUND;
162
163 /* It's us, save our location for later */
164 self = devfn;
165 found_self = 1;
166 return PCIBIOS_SUCCESSFUL;
167 }
168}
169
170static int prpmc_exclude_device(u8 bus, u8 devfn)
171{
172 /*
173 * Monarch is allowed to access all PCI devices. Non-monarch is
174 * only allowed to access its own Harrier.
175 */
176
177 if (MONARCH)
178 return PCIBIOS_SUCCESSFUL;
179 if (found_self)
180 if ((bus == 0) && (devfn == self))
181 return PCIBIOS_SUCCESSFUL;
182 else
183 return PCIBIOS_DEVICE_NOT_FOUND;
184 else
185 return prpmc_self(bus, devfn);
186}
187
188void __init prpmc800_find_bridges(void)
189{
190 struct pci_controller *hose;
191 int host_bridge;
192
193 hose = pcibios_alloc_controller();
194 if (!hose)
195 return;
196
197 hose->first_busno = 0;
198 hose->last_busno = 0xff;
199
200 ppc_md.pci_exclude_device = prpmc_exclude_device;
201 ppc_md.pcibios_fixup = NULL;
202 ppc_md.pcibios_fixup_bus = NULL;
203 ppc_md.pci_swizzle = common_swizzle;
204 ppc_md.pci_map_irq = prpmc_map_irq;
205
206 setup_indirect_pci(hose,
207 PRPMC800_PCI_CONFIG_ADDR, PRPMC800_PCI_CONFIG_DATA);
208
209 /* Get host bridge vendor/dev id */
210
211 host_bridge = in_be32((uint *) (HARRIER_VENI_REG));
212
213 if (host_bridge != HARRIER_VEND_DEV_ID) {
214 printk(KERN_CRIT "Host bridge 0x%x not supported\n",
215 host_bridge);
216 return;
217 }
218
219 monarch = in_be32((uint *) HARRIER_MISC_CSR) & HARRIER_SYSCON;
220
221 printk(KERN_INFO "Running as %s.\n",
222 MONARCH ? "Monarch" : "Non-Monarch");
223
224 hose->io_space.start = PRPMC800_PCI_IO_START;
225 hose->io_space.end = PRPMC800_PCI_IO_END;
226 hose->io_base_virt = (void *)PRPMC800_ISA_IO_BASE;
227 hose->pci_mem_offset = PRPMC800_PCI_PHY_MEM_OFFSET;
228
229 pci_init_resource(&hose->io_resource,
230 PRPMC800_PCI_IO_START, PRPMC800_PCI_IO_END,
231 IORESOURCE_IO, "PCI host bridge");
232
233 if (MONARCH) {
234 hose->mem_space.start = PRPMC800_PCI_MEM_START;
235 hose->mem_space.end = PRPMC800_PCI_MEM_END;
236
237 pci_init_resource(&hose->mem_resources[0],
238 PRPMC800_PCI_MEM_START,
239 PRPMC800_PCI_MEM_END,
240 IORESOURCE_MEM, "PCI host bridge");
241
242 if (harrier_init(hose,
243 PRPMC800_HARRIER_XCSR_BASE,
244 PRPMC800_PROC_PCI_MEM_START,
245 PRPMC800_PROC_PCI_MEM_END,
246 PRPMC800_PROC_PCI_IO_START,
247 PRPMC800_PROC_PCI_IO_END,
248 PRPMC800_HARRIER_MPIC_BASE) != 0)
249 printk(KERN_CRIT "Could not initialize HARRIER "
250 "bridge\n");
251
252 harrier_release_eready(PRPMC800_HARRIER_XCSR_BASE);
253 harrier_wait_eready(PRPMC800_HARRIER_XCSR_BASE);
254 hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
255
256 } else {
257 pci_init_resource(&hose->mem_resources[0],
258 PRPMC800_NM_PCI_MEM_START,
259 PRPMC800_NM_PCI_MEM_END,
260 IORESOURCE_MEM, "PCI host bridge");
261
262 hose->mem_space.start = PRPMC800_NM_PCI_MEM_START;
263 hose->mem_space.end = PRPMC800_NM_PCI_MEM_END;
264
265 if (harrier_init(hose,
266 PRPMC800_HARRIER_XCSR_BASE,
267 PRPMC800_NM_PROC_PCI_MEM_START,
268 PRPMC800_NM_PROC_PCI_MEM_END,
269 PRPMC800_PROC_PCI_IO_START,
270 PRPMC800_PROC_PCI_IO_END,
271 PRPMC800_HARRIER_MPIC_BASE) != 0)
272 printk(KERN_CRIT "Could not initialize HARRIER "
273 "bridge\n");
274
275 harrier_setup_nonmonarch(PRPMC800_HARRIER_XCSR_BASE,
276 HARRIER_ITSZ_1MB);
277 harrier_release_eready(PRPMC800_HARRIER_XCSR_BASE);
278 }
279}
280
281static int prpmc800_show_cpuinfo(struct seq_file *m)
282{
283 seq_printf(m, "machine\t\t: PrPMC800\n");
284
285 return 0;
286}
287
288static void __init prpmc800_setup_arch(void)
289{
290 /* init to some ~sane value until calibrate_delay() runs */
291 loops_per_jiffy = 50000000 / HZ;
292
293 /* Lookup PCI host bridges */
294 prpmc800_find_bridges();
295
296#ifdef CONFIG_BLK_DEV_INITRD
297 if (initrd_start)
298 ROOT_DEV = Root_RAM0;
299 else
300#endif
301#ifdef CONFIG_ROOT_NFS
302 ROOT_DEV = Root_NFS;
303#else
304 ROOT_DEV = Root_SDA2;
305#endif
306
307 printk(KERN_INFO "Port by MontaVista Software, Inc. "
308 "(source@mvista.com)\n");
309}
310
311/*
312 * Compute the PrPMC800's tbl frequency using the baud clock as a reference.
313 */
314static void __init prpmc800_calibrate_decr(void)
315{
316 unsigned long tbl_start, tbl_end;
317 unsigned long current_state, old_state, tb_ticks_per_second;
318 unsigned int count;
319 unsigned int harrier_revision;
320
321 harrier_revision = readb(HARRIER_REVI_REG);
322 if (harrier_revision < 2) {
323 /* XTAL64 was broken in harrier revision 1 */
324 printk(KERN_INFO "time_init: Harrier revision %d, assuming "
325 "100 Mhz bus\n", harrier_revision);
326 tb_ticks_per_second = 100000000 / 4;
327 tb_ticks_per_jiffy = tb_ticks_per_second / HZ;
328 tb_to_us = mulhwu_scale_factor(tb_ticks_per_second, 1000000);
329 return;
330 }
331
332 /*
333 * The XTAL64 bit oscillates at the 1/64 the base baud clock
334 * Set count to XTAL64 cycles per second. Since we'll count
335 * half-cycles, we'll reach the count in half a second.
336 */
337 count = PRPMC800_BASE_BAUD / 64;
338
339 /* Find the first edge of the baud clock */
340 old_state = readb(HARRIER_UCTL_REG) & HARRIER_XTAL64_MASK;
341 do {
342 current_state = readb(HARRIER_UCTL_REG) & HARRIER_XTAL64_MASK;
343 } while (old_state == current_state);
344
345 old_state = current_state;
346
347 /* Get the starting time base value */
348 tbl_start = get_tbl();
349
350 /*
351 * Loop until we have found a number of edges (half-cycles)
352 * equal to the count (half a second)
353 */
354 do {
355 do {
356 current_state = readb(HARRIER_UCTL_REG) &
357 HARRIER_XTAL64_MASK;
358 } while (old_state == current_state);
359 old_state = current_state;
360 } while (--count);
361
362 /* Get the ending time base value */
363 tbl_end = get_tbl();
364
365 /* We only counted for half a second, so double to get ticks/second */
366 tb_ticks_per_second = (tbl_end - tbl_start) * 2;
367 tb_ticks_per_jiffy = tb_ticks_per_second / HZ;
368 tb_to_us = mulhwu_scale_factor(tb_ticks_per_second, 1000000);
369}
370
371static void prpmc800_restart(char *cmd)
372{
373 ulong temp;
374
375 local_irq_disable();
376 temp = in_be32((uint *) HARRIER_MISC_CSR_REG);
377 temp |= HARRIER_RSTOUT;
378 out_be32((uint *) HARRIER_MISC_CSR_REG, temp);
379 while (1) ;
380}
381
382static void prpmc800_halt(void)
383{
384 local_irq_disable();
385 while (1) ;
386}
387
388static void prpmc800_power_off(void)
389{
390 prpmc800_halt();
391}
392
393static void __init prpmc800_init_IRQ(void)
394{
395 OpenPIC_InitSenses = prpmc800_openpic_initsenses;
396 OpenPIC_NumInitSenses = sizeof(prpmc800_openpic_initsenses);
397
398 /* Setup external interrupt sources. */
399 openpic_set_sources(0, 16, OpenPIC_Addr + 0x10000);
400 /* Setup internal UART interrupt source. */
401 openpic_set_sources(16, 1, OpenPIC_Addr + 0x10200);
402
403 /* Do the MPIC initialization based on the above settings. */
404 openpic_init(0);
405
406 /* enable functional exceptions for uarts and abort */
407 out_8((u8 *) HARRIER_FEEN_REG, (HARRIER_FE_UA0 | HARRIER_FE_UA1));
408 out_8((u8 *) HARRIER_FEMA_REG, ~(HARRIER_FE_UA0 | HARRIER_FE_UA1));
409}
410
411/*
412 * Set BAT 3 to map 0xf0000000 to end of physical memory space.
413 */
414static __inline__ void prpmc800_set_bat(void)
415{
416 mb();
417 mtspr(SPRN_DBAT1U, 0xf0001ffe);
418 mtspr(SPRN_DBAT1L, 0xf000002a);
419 mb();
420}
421
422/*
423 * We need to read the Harrier memory controller
424 * to properly determine this value
425 */
426static unsigned long __init prpmc800_find_end_of_memory(void)
427{
428 /* Read the memory size from the Harrier XCSR */
429 return harrier_get_mem_size(PRPMC800_HARRIER_XCSR_BASE);
430}
431
432static void __init prpmc800_map_io(void)
433{
434 io_block_mapping(0x80000000, 0x80000000, 0x10000000, _PAGE_IO);
435 io_block_mapping(0xf0000000, 0xf0000000, 0x10000000, _PAGE_IO);
436}
437
438void __init
439platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
440 unsigned long r6, unsigned long r7)
441{
442 parse_bootinfo(find_bootinfo());
443
444 prpmc800_set_bat();
445
446 isa_io_base = PRPMC800_ISA_IO_BASE;
447 isa_mem_base = PRPMC800_ISA_MEM_BASE;
448 pci_dram_offset = PRPMC800_PCI_DRAM_OFFSET;
449
450 ppc_md.setup_arch = prpmc800_setup_arch;
451 ppc_md.show_cpuinfo = prpmc800_show_cpuinfo;
452 ppc_md.init_IRQ = prpmc800_init_IRQ;
453 ppc_md.get_irq = openpic_get_irq;
454
455 ppc_md.find_end_of_memory = prpmc800_find_end_of_memory;
456 ppc_md.setup_io_mappings = prpmc800_map_io;
457
458 ppc_md.restart = prpmc800_restart;
459 ppc_md.power_off = prpmc800_power_off;
460 ppc_md.halt = prpmc800_halt;
461
462 /* PrPMC800 has no timekeeper part */
463 ppc_md.time_init = NULL;
464 ppc_md.get_rtc_time = NULL;
465 ppc_md.set_rtc_time = NULL;
466 ppc_md.calibrate_decr = prpmc800_calibrate_decr;
467#ifdef CONFIG_SERIAL_TEXT_DEBUG
468 ppc_md.progress = gen550_progress;
469#else /* !CONFIG_SERIAL_TEXT_DEBUG */
470 ppc_md.progress = NULL;
471#endif /* CONFIG_SERIAL_TEXT_DEBUG */
472}
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