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b0c632db | 1 | /* |
a53c8fab | 2 | * definition for kernel virtual machines on s390 |
b0c632db | 3 | * |
a53c8fab | 4 | * Copyright IBM Corp. 2008, 2009 |
b0c632db HC |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License (version 2 only) | |
8 | * as published by the Free Software Foundation. | |
9 | * | |
10 | * Author(s): Carsten Otte <cotte@de.ibm.com> | |
11 | */ | |
12 | ||
13 | ||
14 | #ifndef ASM_KVM_HOST_H | |
15 | #define ASM_KVM_HOST_H | |
65647300 PB |
16 | |
17 | #include <linux/types.h> | |
ca872302 CB |
18 | #include <linux/hrtimer.h> |
19 | #include <linux/interrupt.h> | |
65647300 | 20 | #include <linux/kvm_types.h> |
b0c632db | 21 | #include <linux/kvm_host.h> |
81aa8efe | 22 | #include <linux/kvm.h> |
9c23a131 | 23 | #include <linux/seqlock.h> |
b0c632db | 24 | #include <asm/debug.h> |
e86a6ed6 | 25 | #include <asm/cpu.h> |
b0753902 | 26 | #include <asm/fpu/api.h> |
841b91c5 | 27 | #include <asm/isc.h> |
b0c632db | 28 | |
bc784cce ED |
29 | #define KVM_S390_BSCA_CPU_SLOTS 64 |
30 | #define KVM_S390_ESCA_CPU_SLOTS 248 | |
fe0edcb7 | 31 | #define KVM_MAX_VCPUS KVM_S390_ESCA_CPU_SLOTS |
bbacc0c1 | 32 | #define KVM_USER_MEM_SLOTS 32 |
b0c632db | 33 | |
84223598 CH |
34 | /* |
35 | * These seem to be used for allocating ->chip in the routing table, | |
36 | * which we don't use. 4096 is an out-of-thin-air value. If we need | |
37 | * to look at ->chip later on, we'll need to revisit this. | |
38 | */ | |
39 | #define KVM_NR_IRQCHIPS 1 | |
40 | #define KVM_IRQCHIP_NUM_PINS 4096 | |
c4a8de35 | 41 | #define KVM_HALT_POLL_NS_DEFAULT 80000 |
84223598 | 42 | |
2860c4b1 PB |
43 | /* s390-specific vcpu->requests bit members */ |
44 | #define KVM_REQ_ENABLE_IBS 8 | |
45 | #define KVM_REQ_DISABLE_IBS 9 | |
46 | ||
ea5f4969 DH |
47 | #define SIGP_CTRL_C 0x80 |
48 | #define SIGP_CTRL_SCN_MASK 0x3f | |
4953919f | 49 | |
bc784cce ED |
50 | union bsca_sigp_ctrl { |
51 | __u8 value; | |
52 | struct { | |
53 | __u8 c : 1; | |
54 | __u8 r : 1; | |
55 | __u8 scn : 6; | |
56 | }; | |
57 | } __packed; | |
58 | ||
59 | union esca_sigp_ctrl { | |
60 | __u16 value; | |
61 | struct { | |
62 | __u8 c : 1; | |
63 | __u8 reserved: 7; | |
64 | __u8 scn; | |
65 | }; | |
66 | } __packed; | |
67 | ||
68 | struct esca_entry { | |
69 | union esca_sigp_ctrl sigp_ctrl; | |
70 | __u16 reserved1[3]; | |
71 | __u64 sda; | |
72 | __u64 reserved2[6]; | |
73 | } __packed; | |
74 | ||
75 | struct bsca_entry { | |
ea5f4969 | 76 | __u8 reserved0; |
bc784cce | 77 | union bsca_sigp_ctrl sigp_ctrl; |
ea5f4969 | 78 | __u16 reserved[3]; |
b0c632db HC |
79 | __u64 sda; |
80 | __u64 reserved2[2]; | |
81 | } __attribute__((packed)); | |
82 | ||
8a242234 HC |
83 | union ipte_control { |
84 | unsigned long val; | |
85 | struct { | |
86 | unsigned long k : 1; | |
87 | unsigned long kh : 31; | |
88 | unsigned long kg : 32; | |
89 | }; | |
90 | }; | |
b0c632db | 91 | |
bc784cce | 92 | struct bsca_block { |
8a242234 | 93 | union ipte_control ipte_control; |
b0c632db HC |
94 | __u64 reserved[5]; |
95 | __u64 mcn; | |
96 | __u64 reserved2; | |
bc784cce | 97 | struct bsca_entry cpu[KVM_S390_BSCA_CPU_SLOTS]; |
b0c632db HC |
98 | } __attribute__((packed)); |
99 | ||
bc784cce ED |
100 | struct esca_block { |
101 | union ipte_control ipte_control; | |
102 | __u64 reserved1[7]; | |
103 | __u64 mcn[4]; | |
104 | __u64 reserved2[20]; | |
105 | struct esca_entry cpu[KVM_S390_ESCA_CPU_SLOTS]; | |
106 | } __packed; | |
107 | ||
9e6dabef | 108 | #define CPUSTAT_STOPPED 0x80000000 |
b0c632db HC |
109 | #define CPUSTAT_WAIT 0x10000000 |
110 | #define CPUSTAT_ECALL_PEND 0x08000000 | |
111 | #define CPUSTAT_STOP_INT 0x04000000 | |
112 | #define CPUSTAT_IO_INT 0x02000000 | |
113 | #define CPUSTAT_EXT_INT 0x01000000 | |
114 | #define CPUSTAT_RUNNING 0x00800000 | |
115 | #define CPUSTAT_RETAINED 0x00400000 | |
116 | #define CPUSTAT_TIMING_SUB 0x00020000 | |
117 | #define CPUSTAT_SIE_SUB 0x00010000 | |
118 | #define CPUSTAT_RRF 0x00008000 | |
119 | #define CPUSTAT_SLSV 0x00004000 | |
120 | #define CPUSTAT_SLSR 0x00002000 | |
121 | #define CPUSTAT_ZARCH 0x00000800 | |
122 | #define CPUSTAT_MCDS 0x00000100 | |
123 | #define CPUSTAT_SM 0x00000080 | |
8ad35755 | 124 | #define CPUSTAT_IBS 0x00000040 |
53df84f8 | 125 | #define CPUSTAT_GED2 0x00000010 |
b0c632db | 126 | #define CPUSTAT_G 0x00000008 |
69d0d3a3 | 127 | #define CPUSTAT_GED 0x00000004 |
b0c632db HC |
128 | #define CPUSTAT_J 0x00000002 |
129 | #define CPUSTAT_P 0x00000001 | |
130 | ||
180c12fb | 131 | struct kvm_s390_sie_block { |
b0c632db | 132 | atomic_t cpuflags; /* 0x0000 */ |
fda902cb MM |
133 | __u32 : 1; /* 0x0004 */ |
134 | __u32 prefix : 18; | |
658b6eda MM |
135 | __u32 : 1; |
136 | __u32 ibc : 12; | |
95d38fd0 CB |
137 | __u8 reserved08[4]; /* 0x0008 */ |
138 | #define PROG_IN_SIE (1<<0) | |
139 | __u32 prog0c; /* 0x000c */ | |
49b99e1e | 140 | __u8 reserved10[16]; /* 0x0010 */ |
8e236546 CB |
141 | #define PROG_BLOCK_SIE (1<<0) |
142 | #define PROG_REQUEST (1<<1) | |
49b99e1e CB |
143 | atomic_t prog20; /* 0x0020 */ |
144 | __u8 reserved24[4]; /* 0x0024 */ | |
b0c632db HC |
145 | __u64 cputm; /* 0x0028 */ |
146 | __u64 ckc; /* 0x0030 */ | |
147 | __u64 epoch; /* 0x0038 */ | |
a3508fbe | 148 | __u32 svcc; /* 0x0040 */ |
ba5c1e9b | 149 | #define LCTL_CR0 0x8000 |
d8346b7d | 150 | #define LCTL_CR6 0x0200 |
27291e21 DH |
151 | #define LCTL_CR9 0x0040 |
152 | #define LCTL_CR10 0x0020 | |
153 | #define LCTL_CR11 0x0010 | |
48a3e950 | 154 | #define LCTL_CR14 0x0002 |
b0c632db HC |
155 | __u16 lctl; /* 0x0044 */ |
156 | __s16 icpua; /* 0x0046 */ | |
95ca2cb5 | 157 | #define ICTL_OPEREXC 0x80000000 |
27291e21 DH |
158 | #define ICTL_PINT 0x20000000 |
159 | #define ICTL_LPSW 0x00400000 | |
160 | #define ICTL_STCTL 0x00040000 | |
161 | #define ICTL_ISKE 0x00004000 | |
162 | #define ICTL_SSKE 0x00002000 | |
163 | #define ICTL_RRBE 0x00001000 | |
5a5e6536 | 164 | #define ICTL_TPROT 0x00000200 |
b0c632db HC |
165 | __u32 ictl; /* 0x0048 */ |
166 | __u32 eca; /* 0x004c */ | |
8712836b DH |
167 | #define ICPT_INST 0x04 |
168 | #define ICPT_PROGI 0x08 | |
169 | #define ICPT_INSTPROGI 0x0C | |
a3508fbe DH |
170 | #define ICPT_EXTINT 0x14 |
171 | #define ICPT_VALIDITY 0x20 | |
172 | #define ICPT_STOP 0x28 | |
8712836b DH |
173 | #define ICPT_OPEREXC 0x2C |
174 | #define ICPT_PARTEXEC 0x38 | |
175 | #define ICPT_IOINST 0x40 | |
b0c632db | 176 | __u8 icptcode; /* 0x0050 */ |
04b41acd | 177 | __u8 icptstatus; /* 0x0051 */ |
b0c632db HC |
178 | __u16 ihcpu; /* 0x0052 */ |
179 | __u8 reserved54[2]; /* 0x0054 */ | |
180 | __u16 ipa; /* 0x0056 */ | |
181 | __u32 ipb; /* 0x0058 */ | |
182 | __u32 scaoh; /* 0x005c */ | |
183 | __u8 reserved60; /* 0x0060 */ | |
184 | __u8 ecb; /* 0x0061 */ | |
69d0d3a3 | 185 | __u8 ecb2; /* 0x0062 */ |
a374e892 TK |
186 | #define ECB3_AES 0x04 |
187 | #define ECB3_DEA 0x08 | |
188 | __u8 ecb3; /* 0x0063 */ | |
b0c632db HC |
189 | __u32 scaol; /* 0x0064 */ |
190 | __u8 reserved68[4]; /* 0x0068 */ | |
191 | __u32 todpr; /* 0x006c */ | |
efed1104 DH |
192 | __u8 reserved70[16]; /* 0x0070 */ |
193 | __u64 mso; /* 0x0080 */ | |
194 | __u64 msl; /* 0x0088 */ | |
b0c632db HC |
195 | psw_t gpsw; /* 0x0090 */ |
196 | __u64 gg14; /* 0x00a0 */ | |
197 | __u64 gg15; /* 0x00a8 */ | |
f14d82e0 TH |
198 | __u8 reservedb0[20]; /* 0x00b0 */ |
199 | __u16 extcpuaddr; /* 0x00c4 */ | |
200 | __u16 eic; /* 0x00c6 */ | |
201 | __u32 reservedc8; /* 0x00c8 */ | |
439716a5 DH |
202 | __u16 pgmilc; /* 0x00cc */ |
203 | __u16 iprcc; /* 0x00ce */ | |
204 | __u32 dxc; /* 0x00d0 */ | |
205 | __u16 mcn; /* 0x00d4 */ | |
206 | __u8 perc; /* 0x00d6 */ | |
207 | __u8 peratmid; /* 0x00d7 */ | |
208 | __u64 peraddr; /* 0x00d8 */ | |
209 | __u8 eai; /* 0x00e0 */ | |
210 | __u8 peraid; /* 0x00e1 */ | |
211 | __u8 oai; /* 0x00e2 */ | |
212 | __u8 armid; /* 0x00e3 */ | |
213 | __u8 reservede4[4]; /* 0x00e4 */ | |
214 | __u64 tecmc; /* 0x00e8 */ | |
5102ee87 TK |
215 | __u8 reservedf0[12]; /* 0x00f0 */ |
216 | #define CRYCB_FORMAT1 0x00000001 | |
45c9b47c | 217 | #define CRYCB_FORMAT2 0x00000003 |
5102ee87 | 218 | __u32 crycbd; /* 0x00fc */ |
b0c632db HC |
219 | __u64 gcr[16]; /* 0x0100 */ |
220 | __u64 gbea; /* 0x0180 */ | |
ef50f7ac CB |
221 | __u8 reserved188[24]; /* 0x0188 */ |
222 | __u32 fac; /* 0x01a0 */ | |
b31288fa KW |
223 | __u8 reserved1a4[20]; /* 0x01a4 */ |
224 | __u64 cbrlo; /* 0x01b8 */ | |
13211ea7 EF |
225 | __u8 reserved1c0[8]; /* 0x01c0 */ |
226 | __u32 ecd; /* 0x01c8 */ | |
227 | __u8 reserved1cc[18]; /* 0x01cc */ | |
672550fb CB |
228 | __u64 pp; /* 0x01de */ |
229 | __u8 reserved1e6[2]; /* 0x01e6 */ | |
7feb6bb8 | 230 | __u64 itdba; /* 0x01e8 */ |
c6e5f166 | 231 | __u64 riccbd; /* 0x01f0 */ |
c9bc1eab | 232 | __u64 gvrd; /* 0x01f8 */ |
b0c632db HC |
233 | } __attribute__((packed)); |
234 | ||
7feb6bb8 MM |
235 | struct kvm_s390_itdb { |
236 | __u8 data[256]; | |
237 | } __packed; | |
238 | ||
239 | struct sie_page { | |
240 | struct kvm_s390_sie_block sie_block; | |
241 | __u8 reserved200[1024]; /* 0x0200 */ | |
242 | struct kvm_s390_itdb itdb; /* 0x0600 */ | |
efa48163 | 243 | __u8 reserved700[2304]; /* 0x0700 */ |
7feb6bb8 MM |
244 | } __packed; |
245 | ||
b0c632db HC |
246 | struct kvm_vcpu_stat { |
247 | u32 exit_userspace; | |
0eaeafa1 | 248 | u32 exit_null; |
8f2abe6a CB |
249 | u32 exit_external_request; |
250 | u32 exit_external_interrupt; | |
251 | u32 exit_stop_request; | |
252 | u32 exit_validity; | |
ba5c1e9b | 253 | u32 exit_instruction; |
f7819512 | 254 | u32 halt_successful_poll; |
62bea5bf | 255 | u32 halt_attempted_poll; |
3491caf2 | 256 | u32 halt_poll_invalid; |
ce2e4f0b | 257 | u32 halt_wakeup; |
ba5c1e9b | 258 | u32 instruction_lctl; |
f5e10b09 | 259 | u32 instruction_lctlg; |
aba07508 DH |
260 | u32 instruction_stctl; |
261 | u32 instruction_stctg; | |
ba5c1e9b CO |
262 | u32 exit_program_interruption; |
263 | u32 exit_instr_and_program; | |
a011eeb2 | 264 | u32 exit_operation_exception; |
7697e71f | 265 | u32 deliver_external_call; |
ba5c1e9b CO |
266 | u32 deliver_emergency_signal; |
267 | u32 deliver_service_signal; | |
268 | u32 deliver_virtio_interrupt; | |
269 | u32 deliver_stop_signal; | |
270 | u32 deliver_prefix_signal; | |
271 | u32 deliver_restart_signal; | |
272 | u32 deliver_program_int; | |
d8346b7d | 273 | u32 deliver_io_int; |
ba5c1e9b | 274 | u32 exit_wait_state; |
69d0d3a3 | 275 | u32 instruction_pfmf; |
453423dc CB |
276 | u32 instruction_stidp; |
277 | u32 instruction_spx; | |
278 | u32 instruction_stpx; | |
279 | u32 instruction_stap; | |
280 | u32 instruction_storage_key; | |
8a242234 | 281 | u32 instruction_ipte_interlock; |
453423dc CB |
282 | u32 instruction_stsch; |
283 | u32 instruction_chsc; | |
284 | u32 instruction_stsi; | |
285 | u32 instruction_stfl; | |
bb25b9ba | 286 | u32 instruction_tprot; |
a3508fbe | 287 | u32 instruction_sie; |
b31288fa | 288 | u32 instruction_essa; |
95ca2cb5 | 289 | u32 instruction_sthyi; |
5288fbf0 | 290 | u32 instruction_sigp_sense; |
bd59d3a4 | 291 | u32 instruction_sigp_sense_running; |
7697e71f | 292 | u32 instruction_sigp_external_call; |
5288fbf0 | 293 | u32 instruction_sigp_emergency; |
42cb0c9f DH |
294 | u32 instruction_sigp_cond_emergency; |
295 | u32 instruction_sigp_start; | |
5288fbf0 | 296 | u32 instruction_sigp_stop; |
42cb0c9f DH |
297 | u32 instruction_sigp_stop_store_status; |
298 | u32 instruction_sigp_store_status; | |
cd7b4b61 | 299 | u32 instruction_sigp_store_adtl_status; |
5288fbf0 CB |
300 | u32 instruction_sigp_arch; |
301 | u32 instruction_sigp_prefix; | |
302 | u32 instruction_sigp_restart; | |
42cb0c9f DH |
303 | u32 instruction_sigp_init_cpu_reset; |
304 | u32 instruction_sigp_cpu_reset; | |
305 | u32 instruction_sigp_unknown; | |
388186bc | 306 | u32 diagnose_10; |
e28acfea | 307 | u32 diagnose_44; |
41628d33 | 308 | u32 diagnose_9c; |
175a5c9e CB |
309 | u32 diagnose_258; |
310 | u32 diagnose_308; | |
311 | u32 diagnose_500; | |
b0c632db HC |
312 | }; |
313 | ||
bcd84683 JF |
314 | #define PGM_OPERATION 0x01 |
315 | #define PGM_PRIVILEGED_OP 0x02 | |
316 | #define PGM_EXECUTE 0x03 | |
317 | #define PGM_PROTECTION 0x04 | |
318 | #define PGM_ADDRESSING 0x05 | |
319 | #define PGM_SPECIFICATION 0x06 | |
320 | #define PGM_DATA 0x07 | |
321 | #define PGM_FIXED_POINT_OVERFLOW 0x08 | |
322 | #define PGM_FIXED_POINT_DIVIDE 0x09 | |
323 | #define PGM_DECIMAL_OVERFLOW 0x0a | |
324 | #define PGM_DECIMAL_DIVIDE 0x0b | |
325 | #define PGM_HFP_EXPONENT_OVERFLOW 0x0c | |
326 | #define PGM_HFP_EXPONENT_UNDERFLOW 0x0d | |
327 | #define PGM_HFP_SIGNIFICANCE 0x0e | |
328 | #define PGM_HFP_DIVIDE 0x0f | |
329 | #define PGM_SEGMENT_TRANSLATION 0x10 | |
330 | #define PGM_PAGE_TRANSLATION 0x11 | |
331 | #define PGM_TRANSLATION_SPEC 0x12 | |
332 | #define PGM_SPECIAL_OPERATION 0x13 | |
333 | #define PGM_OPERAND 0x15 | |
334 | #define PGM_TRACE_TABEL 0x16 | |
403c8648 | 335 | #define PGM_VECTOR_PROCESSING 0x1b |
bcd84683 JF |
336 | #define PGM_SPACE_SWITCH 0x1c |
337 | #define PGM_HFP_SQUARE_ROOT 0x1d | |
338 | #define PGM_PC_TRANSLATION_SPEC 0x1f | |
339 | #define PGM_AFX_TRANSLATION 0x20 | |
340 | #define PGM_ASX_TRANSLATION 0x21 | |
341 | #define PGM_LX_TRANSLATION 0x22 | |
342 | #define PGM_EX_TRANSLATION 0x23 | |
343 | #define PGM_PRIMARY_AUTHORITY 0x24 | |
344 | #define PGM_SECONDARY_AUTHORITY 0x25 | |
345 | #define PGM_LFX_TRANSLATION 0x26 | |
346 | #define PGM_LSX_TRANSLATION 0x27 | |
347 | #define PGM_ALET_SPECIFICATION 0x28 | |
348 | #define PGM_ALEN_TRANSLATION 0x29 | |
349 | #define PGM_ALE_SEQUENCE 0x2a | |
350 | #define PGM_ASTE_VALIDITY 0x2b | |
351 | #define PGM_ASTE_SEQUENCE 0x2c | |
352 | #define PGM_EXTENDED_AUTHORITY 0x2d | |
353 | #define PGM_LSTE_SEQUENCE 0x2e | |
354 | #define PGM_ASTE_INSTANCE 0x2f | |
355 | #define PGM_STACK_FULL 0x30 | |
356 | #define PGM_STACK_EMPTY 0x31 | |
357 | #define PGM_STACK_SPECIFICATION 0x32 | |
358 | #define PGM_STACK_TYPE 0x33 | |
359 | #define PGM_STACK_OPERATION 0x34 | |
360 | #define PGM_ASCE_TYPE 0x38 | |
361 | #define PGM_REGION_FIRST_TRANS 0x39 | |
362 | #define PGM_REGION_SECOND_TRANS 0x3a | |
363 | #define PGM_REGION_THIRD_TRANS 0x3b | |
364 | #define PGM_MONITOR 0x40 | |
365 | #define PGM_PER 0x80 | |
366 | #define PGM_CRYPTO_OPERATION 0x119 | |
ba5c1e9b | 367 | |
c0e6159d JF |
368 | /* irq types in order of priority */ |
369 | enum irq_types { | |
370 | IRQ_PEND_MCHK_EX = 0, | |
371 | IRQ_PEND_SVC, | |
372 | IRQ_PEND_PROG, | |
373 | IRQ_PEND_MCHK_REP, | |
374 | IRQ_PEND_EXT_IRQ_KEY, | |
375 | IRQ_PEND_EXT_MALFUNC, | |
376 | IRQ_PEND_EXT_EMERGENCY, | |
377 | IRQ_PEND_EXT_EXTERNAL, | |
378 | IRQ_PEND_EXT_CLOCK_COMP, | |
379 | IRQ_PEND_EXT_CPU_TIMER, | |
380 | IRQ_PEND_EXT_TIMING, | |
381 | IRQ_PEND_EXT_SERVICE, | |
382 | IRQ_PEND_EXT_HOST, | |
383 | IRQ_PEND_PFAULT_INIT, | |
384 | IRQ_PEND_PFAULT_DONE, | |
385 | IRQ_PEND_VIRTIO, | |
386 | IRQ_PEND_IO_ISC_0, | |
387 | IRQ_PEND_IO_ISC_1, | |
388 | IRQ_PEND_IO_ISC_2, | |
389 | IRQ_PEND_IO_ISC_3, | |
390 | IRQ_PEND_IO_ISC_4, | |
391 | IRQ_PEND_IO_ISC_5, | |
392 | IRQ_PEND_IO_ISC_6, | |
393 | IRQ_PEND_IO_ISC_7, | |
394 | IRQ_PEND_SIGP_STOP, | |
395 | IRQ_PEND_RESTART, | |
396 | IRQ_PEND_SET_PREFIX, | |
397 | IRQ_PEND_COUNT | |
398 | }; | |
399 | ||
6d3da241 JF |
400 | /* We have 2M for virtio device descriptor pages. Smallest amount of |
401 | * memory per page is 24 bytes (1 queue), so (2048*1024) / 24 = 87381 | |
402 | */ | |
403 | #define KVM_S390_MAX_VIRTIO_IRQS 87381 | |
404 | ||
c0e6159d JF |
405 | /* |
406 | * Repressible (non-floating) machine check interrupts | |
407 | * subclass bits in MCIC | |
408 | */ | |
409 | #define MCHK_EXTD_BIT 58 | |
410 | #define MCHK_DEGR_BIT 56 | |
411 | #define MCHK_WARN_BIT 55 | |
412 | #define MCHK_REP_MASK ((1UL << MCHK_DEGR_BIT) | \ | |
413 | (1UL << MCHK_EXTD_BIT) | \ | |
414 | (1UL << MCHK_WARN_BIT)) | |
415 | ||
416 | /* Exigent machine check interrupts subclass bits in MCIC */ | |
417 | #define MCHK_SD_BIT 63 | |
418 | #define MCHK_PD_BIT 62 | |
419 | #define MCHK_EX_MASK ((1UL << MCHK_SD_BIT) | (1UL << MCHK_PD_BIT)) | |
420 | ||
421 | #define IRQ_PEND_EXT_MASK ((1UL << IRQ_PEND_EXT_IRQ_KEY) | \ | |
422 | (1UL << IRQ_PEND_EXT_CLOCK_COMP) | \ | |
423 | (1UL << IRQ_PEND_EXT_CPU_TIMER) | \ | |
424 | (1UL << IRQ_PEND_EXT_MALFUNC) | \ | |
425 | (1UL << IRQ_PEND_EXT_EMERGENCY) | \ | |
426 | (1UL << IRQ_PEND_EXT_EXTERNAL) | \ | |
427 | (1UL << IRQ_PEND_EXT_TIMING) | \ | |
428 | (1UL << IRQ_PEND_EXT_HOST) | \ | |
429 | (1UL << IRQ_PEND_EXT_SERVICE) | \ | |
430 | (1UL << IRQ_PEND_VIRTIO) | \ | |
431 | (1UL << IRQ_PEND_PFAULT_INIT) | \ | |
432 | (1UL << IRQ_PEND_PFAULT_DONE)) | |
433 | ||
434 | #define IRQ_PEND_IO_MASK ((1UL << IRQ_PEND_IO_ISC_0) | \ | |
435 | (1UL << IRQ_PEND_IO_ISC_1) | \ | |
436 | (1UL << IRQ_PEND_IO_ISC_2) | \ | |
437 | (1UL << IRQ_PEND_IO_ISC_3) | \ | |
438 | (1UL << IRQ_PEND_IO_ISC_4) | \ | |
439 | (1UL << IRQ_PEND_IO_ISC_5) | \ | |
440 | (1UL << IRQ_PEND_IO_ISC_6) | \ | |
441 | (1UL << IRQ_PEND_IO_ISC_7)) | |
442 | ||
443 | #define IRQ_PEND_MCHK_MASK ((1UL << IRQ_PEND_MCHK_REP) | \ | |
444 | (1UL << IRQ_PEND_MCHK_EX)) | |
445 | ||
180c12fb | 446 | struct kvm_s390_interrupt_info { |
ba5c1e9b CO |
447 | struct list_head list; |
448 | u64 type; | |
449 | union { | |
180c12fb CB |
450 | struct kvm_s390_io_info io; |
451 | struct kvm_s390_ext_info ext; | |
452 | struct kvm_s390_pgm_info pgm; | |
8bb3a2eb | 453 | struct kvm_s390_emerg_info emerg; |
7697e71f | 454 | struct kvm_s390_extcall_info extcall; |
180c12fb | 455 | struct kvm_s390_prefix_info prefix; |
2822545f | 456 | struct kvm_s390_stop_info stop; |
48a3e950 | 457 | struct kvm_s390_mchk_info mchk; |
ba5c1e9b CO |
458 | }; |
459 | }; | |
460 | ||
c0e6159d JF |
461 | struct kvm_s390_irq_payload { |
462 | struct kvm_s390_io_info io; | |
463 | struct kvm_s390_ext_info ext; | |
464 | struct kvm_s390_pgm_info pgm; | |
465 | struct kvm_s390_emerg_info emerg; | |
466 | struct kvm_s390_extcall_info extcall; | |
467 | struct kvm_s390_prefix_info prefix; | |
2822545f | 468 | struct kvm_s390_stop_info stop; |
c0e6159d JF |
469 | struct kvm_s390_mchk_info mchk; |
470 | }; | |
471 | ||
180c12fb | 472 | struct kvm_s390_local_interrupt { |
ba5c1e9b | 473 | spinlock_t lock; |
180c12fb | 474 | struct kvm_s390_float_interrupt *float_int; |
8577370f | 475 | struct swait_queue_head *wq; |
5288fbf0 | 476 | atomic_t *cpuflags; |
c0e6159d JF |
477 | DECLARE_BITMAP(sigp_emerg_pending, KVM_MAX_VCPUS); |
478 | struct kvm_s390_irq_payload irq; | |
479 | unsigned long pending_irqs; | |
ba5c1e9b CO |
480 | }; |
481 | ||
6d3da241 JF |
482 | #define FIRQ_LIST_IO_ISC_0 0 |
483 | #define FIRQ_LIST_IO_ISC_1 1 | |
484 | #define FIRQ_LIST_IO_ISC_2 2 | |
485 | #define FIRQ_LIST_IO_ISC_3 3 | |
486 | #define FIRQ_LIST_IO_ISC_4 4 | |
487 | #define FIRQ_LIST_IO_ISC_5 5 | |
488 | #define FIRQ_LIST_IO_ISC_6 6 | |
489 | #define FIRQ_LIST_IO_ISC_7 7 | |
490 | #define FIRQ_LIST_PFAULT 8 | |
491 | #define FIRQ_LIST_VIRTIO 9 | |
492 | #define FIRQ_LIST_COUNT 10 | |
493 | #define FIRQ_CNTR_IO 0 | |
494 | #define FIRQ_CNTR_SERVICE 1 | |
495 | #define FIRQ_CNTR_VIRTIO 2 | |
496 | #define FIRQ_CNTR_PFAULT 3 | |
497 | #define FIRQ_MAX_COUNT 4 | |
498 | ||
180c12fb | 499 | struct kvm_s390_float_interrupt { |
6d3da241 | 500 | unsigned long pending_irqs; |
ba5c1e9b | 501 | spinlock_t lock; |
6d3da241 JF |
502 | struct list_head lists[FIRQ_LIST_COUNT]; |
503 | int counters[FIRQ_MAX_COUNT]; | |
504 | struct kvm_s390_mchk_info mchk; | |
505 | struct kvm_s390_ext_info srv_signal; | |
ba5c1e9b | 506 | int next_rr_cpu; |
609433fb | 507 | unsigned long idle_mask[BITS_TO_LONGS(KVM_MAX_VCPUS)]; |
ba5c1e9b CO |
508 | }; |
509 | ||
27291e21 DH |
510 | struct kvm_hw_wp_info_arch { |
511 | unsigned long addr; | |
512 | unsigned long phys_addr; | |
513 | int len; | |
514 | char *old_data; | |
515 | }; | |
516 | ||
517 | struct kvm_hw_bp_info_arch { | |
518 | unsigned long addr; | |
519 | int len; | |
520 | }; | |
521 | ||
522 | /* | |
523 | * Only the upper 16 bits of kvm_guest_debug->control are arch specific. | |
524 | * Further KVM_GUESTDBG flags which an be used from userspace can be found in | |
525 | * arch/s390/include/uapi/asm/kvm.h | |
526 | */ | |
527 | #define KVM_GUESTDBG_EXIT_PENDING 0x10000000 | |
528 | ||
529 | #define guestdbg_enabled(vcpu) \ | |
530 | (vcpu->guest_debug & KVM_GUESTDBG_ENABLE) | |
531 | #define guestdbg_sstep_enabled(vcpu) \ | |
532 | (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) | |
533 | #define guestdbg_hw_bp_enabled(vcpu) \ | |
534 | (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) | |
535 | #define guestdbg_exit_pending(vcpu) (guestdbg_enabled(vcpu) && \ | |
536 | (vcpu->guest_debug & KVM_GUESTDBG_EXIT_PENDING)) | |
537 | ||
538 | struct kvm_guestdbg_info_arch { | |
539 | unsigned long cr0; | |
540 | unsigned long cr9; | |
541 | unsigned long cr10; | |
542 | unsigned long cr11; | |
543 | struct kvm_hw_bp_info_arch *hw_bp_info; | |
544 | struct kvm_hw_wp_info_arch *hw_wp_info; | |
545 | int nr_hw_bp; | |
546 | int nr_hw_wp; | |
547 | unsigned long last_bp; | |
548 | }; | |
ba5c1e9b | 549 | |
b0c632db | 550 | struct kvm_vcpu_arch { |
180c12fb | 551 | struct kvm_s390_sie_block *sie_block; |
b0c632db | 552 | unsigned int host_acrs[NUM_ACRS]; |
9977e886 | 553 | struct fpu host_fpregs; |
180c12fb | 554 | struct kvm_s390_local_interrupt local_int; |
ca872302 | 555 | struct hrtimer ckc_timer; |
1b0462e5 | 556 | struct kvm_s390_pgm_info pgm; |
598841ca | 557 | struct gmap *gmap; |
37d9df98 DH |
558 | /* backup location for the currently enabled gmap when scheduled out */ |
559 | struct gmap *enabled_gmap; | |
27291e21 | 560 | struct kvm_guestdbg_info_arch guestdbg; |
3c038e6b DD |
561 | unsigned long pfault_token; |
562 | unsigned long pfault_select; | |
563 | unsigned long pfault_compare; | |
db0758b2 | 564 | bool cputm_enabled; |
9c23a131 DH |
565 | /* |
566 | * The seqcount protects updates to cputm_start and sie_block.cputm, | |
567 | * this way we can have non-blocking reads with consistent values. | |
568 | * Only the owning VCPU thread (vcpu->cpu) is allowed to change these | |
569 | * values and to start/stop/enable/disable cpu timer accounting. | |
570 | */ | |
571 | seqcount_t cputm_seqcount; | |
db0758b2 | 572 | __u64 cputm_start; |
b0c632db HC |
573 | }; |
574 | ||
575 | struct kvm_vm_stat { | |
576 | u32 remote_tlb_flush; | |
577 | }; | |
578 | ||
db3fe4eb TY |
579 | struct kvm_arch_memory_slot { |
580 | }; | |
581 | ||
841b91c5 CH |
582 | struct s390_map_info { |
583 | struct list_head list; | |
584 | __u64 guest_addr; | |
585 | __u64 addr; | |
586 | struct page *page; | |
587 | }; | |
588 | ||
589 | struct s390_io_adapter { | |
590 | unsigned int id; | |
591 | int isc; | |
592 | bool maskable; | |
593 | bool masked; | |
594 | bool swap; | |
595 | struct rw_semaphore maps_lock; | |
596 | struct list_head maps; | |
597 | atomic_t nr_maps; | |
598 | }; | |
599 | ||
600 | #define MAX_S390_IO_ADAPTERS ((MAX_ISC + 1) * 8) | |
601 | #define MAX_S390_ADAPTER_MAPS 256 | |
602 | ||
9d8d5786 MM |
603 | /* maximum size of facilities and facility mask is 2k bytes */ |
604 | #define S390_ARCH_FAC_LIST_SIZE_BYTE (1<<11) | |
605 | #define S390_ARCH_FAC_LIST_SIZE_U64 \ | |
606 | (S390_ARCH_FAC_LIST_SIZE_BYTE / sizeof(u64)) | |
607 | #define S390_ARCH_FAC_MASK_SIZE_BYTE S390_ARCH_FAC_LIST_SIZE_BYTE | |
608 | #define S390_ARCH_FAC_MASK_SIZE_U64 \ | |
609 | (S390_ARCH_FAC_MASK_SIZE_BYTE / sizeof(u64)) | |
610 | ||
9d8d5786 | 611 | struct kvm_s390_cpu_model { |
c54f0d6a DH |
612 | /* facility mask supported by kvm & hosting machine */ |
613 | __u64 fac_mask[S390_ARCH_FAC_LIST_SIZE_U64]; | |
614 | /* facility list requested by guest (in dma page) */ | |
615 | __u64 *fac_list; | |
9bb0ec09 | 616 | u64 cpuid; |
658b6eda | 617 | unsigned short ibc; |
9d8d5786 MM |
618 | }; |
619 | ||
5102ee87 TK |
620 | struct kvm_s390_crypto { |
621 | struct kvm_s390_crypto_cb *crycb; | |
622 | __u32 crycbd; | |
a374e892 TK |
623 | __u8 aes_kw; |
624 | __u8 dea_kw; | |
5102ee87 TK |
625 | }; |
626 | ||
627 | struct kvm_s390_crypto_cb { | |
a374e892 TK |
628 | __u8 reserved00[72]; /* 0x0000 */ |
629 | __u8 dea_wrapping_key_mask[24]; /* 0x0048 */ | |
630 | __u8 aes_wrapping_key_mask[32]; /* 0x0060 */ | |
45c9b47c | 631 | __u8 reserved80[128]; /* 0x0080 */ |
5102ee87 TK |
632 | }; |
633 | ||
c54f0d6a DH |
634 | /* |
635 | * sie_page2 has to be allocated as DMA because fac_list and crycb need | |
636 | * 31bit addresses in the sie control block. | |
637 | */ | |
638 | struct sie_page2 { | |
639 | __u64 fac_list[S390_ARCH_FAC_LIST_SIZE_U64]; /* 0x0000 */ | |
640 | struct kvm_s390_crypto_cb crycb; /* 0x0800 */ | |
641 | u8 reserved900[0x1000 - 0x900]; /* 0x0900 */ | |
642 | } __packed; | |
643 | ||
a3508fbe DH |
644 | struct kvm_s390_vsie { |
645 | struct mutex mutex; | |
646 | struct radix_tree_root addr_to_page; | |
647 | int page_count; | |
648 | int next; | |
649 | struct page *pages[KVM_MAX_VCPUS]; | |
650 | }; | |
651 | ||
b0c632db | 652 | struct kvm_arch{ |
7d43bafc ED |
653 | void *sca; |
654 | int use_esca; | |
5e044315 | 655 | rwlock_t sca_lock; |
b0c632db | 656 | debug_info_t *dbf; |
180c12fb | 657 | struct kvm_s390_float_interrupt float_int; |
c05c4186 | 658 | struct kvm_device *flic; |
598841ca | 659 | struct gmap *gmap; |
a3a92c31 | 660 | unsigned long mem_limit; |
fa6b7fe9 | 661 | int css_support; |
84223598 | 662 | int use_irqchip; |
b31605c1 | 663 | int use_cmma; |
6352e4d2 | 664 | int user_cpu_state_ctrl; |
2444b352 | 665 | int user_sigp; |
e44fc8c9 | 666 | int user_stsi; |
841b91c5 | 667 | struct s390_io_adapter *adapters[MAX_S390_IO_ADAPTERS]; |
8a242234 | 668 | wait_queue_head_t ipte_wq; |
a6b7e459 TH |
669 | int ipte_lock_count; |
670 | struct mutex ipte_mutex; | |
7d0a5e62 | 671 | struct ratelimit_state sthyi_limit; |
8ad35755 | 672 | spinlock_t start_stop_lock; |
c54f0d6a | 673 | struct sie_page2 *sie_page2; |
9d8d5786 | 674 | struct kvm_s390_cpu_model model; |
5102ee87 | 675 | struct kvm_s390_crypto crypto; |
a3508fbe | 676 | struct kvm_s390_vsie vsie; |
72f25020 | 677 | u64 epoch; |
15c9705f DH |
678 | /* subset of available cpu features enabled by user space */ |
679 | DECLARE_BITMAP(cpu_feat, KVM_S390_VM_CPU_FEAT_NR_BITS); | |
b0c632db HC |
680 | }; |
681 | ||
bf640876 DD |
682 | #define KVM_HVA_ERR_BAD (-1UL) |
683 | #define KVM_HVA_ERR_RO_BAD (-2UL) | |
684 | ||
685 | static inline bool kvm_is_error_hva(unsigned long addr) | |
686 | { | |
687 | return IS_ERR_VALUE(addr); | |
688 | } | |
689 | ||
3c038e6b | 690 | #define ASYNC_PF_PER_VCPU 64 |
3c038e6b DD |
691 | struct kvm_arch_async_pf { |
692 | unsigned long pfault_token; | |
693 | }; | |
694 | ||
695 | bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu); | |
696 | ||
697 | void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, | |
698 | struct kvm_async_pf *work); | |
699 | ||
700 | void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, | |
701 | struct kvm_async_pf *work); | |
702 | ||
703 | void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, | |
704 | struct kvm_async_pf *work); | |
705 | ||
5a32c1af | 706 | extern int sie64a(struct kvm_s390_sie_block *, u64 *); |
b764bb1c | 707 | extern char sie_exit; |
0865e636 | 708 | |
13a34e06 | 709 | static inline void kvm_arch_hardware_disable(void) {} |
0865e636 | 710 | static inline void kvm_arch_check_processor_compat(void *rtn) {} |
0865e636 RK |
711 | static inline void kvm_arch_sync_events(struct kvm *kvm) {} |
712 | static inline void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) {} | |
713 | static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {} | |
714 | static inline void kvm_arch_free_memslot(struct kvm *kvm, | |
715 | struct kvm_memory_slot *free, struct kvm_memory_slot *dont) {} | |
15f46015 | 716 | static inline void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots) {} |
0865e636 RK |
717 | static inline void kvm_arch_flush_shadow_all(struct kvm *kvm) {} |
718 | static inline void kvm_arch_flush_shadow_memslot(struct kvm *kvm, | |
719 | struct kvm_memory_slot *slot) {} | |
3217f7c2 CD |
720 | static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) {} |
721 | static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) {} | |
0865e636 | 722 | |
3491caf2 CB |
723 | void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu); |
724 | ||
b0c632db | 725 | #endif |